blob: 9371c30ea2751c51b25451bd8cc8223f12b631a2 [file] [log] [blame]
Michal Simek4b066a12018-08-22 14:55:27 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2014 - 2018 Xilinx, Inc.
Michal Simeka8c94362023-07-10 14:35:49 +02004 * Michal Simek <michal.simek@amd.com>
Michal Simek4b066a12018-08-22 14:55:27 +02005 */
6
Algapally Santosh Sagar3c351b22023-01-19 22:36:16 -07007#include <command.h>
Simon Glassafb02152019-12-28 10:45:01 -07008#include <cpu_func.h>
Venkatesh Yadav Abbarapu88990e92025-01-06 14:36:30 +05309#include <dfu.h>
Simon Glassed38aef2020-05-10 11:40:03 -060010#include <env.h>
Michal Simek806be2d2025-02-26 16:35:45 -060011#include <efi_loader.h>
Michal Simek4b066a12018-08-22 14:55:27 +020012#include <fdtdec.h>
Simon Glassa7b51302019-11-14 12:57:46 -070013#include <init.h>
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -070014#include <env_internal.h>
Simon Glass0f2af882020-05-10 11:40:05 -060015#include <log.h>
Michal Simek4b066a12018-08-22 14:55:27 +020016#include <malloc.h>
Michal Simek444a70e2024-10-25 13:56:08 +020017#include <memalign.h>
18#include <mmc.h>
Michal Simek754b53c2024-12-05 11:38:15 +010019#include <mtd.h>
Simon Glass495a5dc2019-11-14 12:57:30 -070020#include <time.h>
Simon Glass274e0b02020-05-10 11:39:56 -060021#include <asm/cache.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060022#include <asm/global_data.h>
Michal Simek4b066a12018-08-22 14:55:27 +020023#include <asm/io.h>
24#include <asm/arch/hardware.h>
Michal Simek21eb5cc2019-04-29 09:39:09 -070025#include <asm/arch/sys_proto.h>
Michal Simek444a70e2024-10-25 13:56:08 +020026#include <linux/sizes.h>
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +053027#include <dm/device.h>
28#include <dm/uclass.h>
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053029#include <versalpl.h>
Prasad Kummari011a7462025-02-19 17:23:01 +053030#include <zynqmp_firmware.h>
Michal Simek705d44a2020-03-31 12:39:37 +020031#include "../common/board.h"
Michal Simek4b066a12018-08-22 14:55:27 +020032
33DECLARE_GLOBAL_DATA_PTR;
34
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053035#if defined(CONFIG_FPGA_VERSALPL)
Oleksandr Suvorovdae95a42022-07-22 17:16:04 +030036static xilinx_desc versalpl = {
37 xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op, NULL,
38 FPGA_LEGACY
39};
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053040#endif
41
Michal Simekfec54762025-01-06 10:20:40 +010042static u8 versal_get_bootmode(void)
43{
44 u8 bootmode;
45 u32 reg = 0;
46
Prasad Kummari011a7462025-02-19 17:23:01 +053047 if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE) && current_el() != 3) {
48 reg = zynqmp_pm_get_bootmode_reg();
49 } else {
50 reg = readl(&crp_base->boot_mode_usr);
51 }
Michal Simekfec54762025-01-06 10:20:40 +010052
53 if (reg >> BOOT_MODE_ALT_SHIFT)
54 reg >>= BOOT_MODE_ALT_SHIFT;
55
56 bootmode = reg & BOOT_MODES_MASK;
57
58 return bootmode;
59}
60
Michal Simek76fdafa2024-12-05 11:38:16 +010061static u32 versal_multi_boot(void)
62{
Michal Simekfec54762025-01-06 10:20:40 +010063 u8 bootmode = versal_get_bootmode();
Prasad Kummarid3feab02025-03-05 19:18:46 +053064 u32 reg = 0;
Michal Simekfec54762025-01-06 10:20:40 +010065
66 /* Mostly workaround for QEMU CI pipeline */
67 if (bootmode == JTAG_MODE)
68 return 0;
69
Prasad Kummarid3feab02025-03-05 19:18:46 +053070 if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE) && current_el() != 3)
71 reg = zynqmp_pm_get_pmc_multi_boot_reg();
72 else
73 reg = readl(PMC_MULTI_BOOT_REG);
74
75 return reg & PMC_MULTI_BOOT_MASK;
Michal Simek76fdafa2024-12-05 11:38:16 +010076}
77
Michal Simek4b066a12018-08-22 14:55:27 +020078int board_init(void)
79{
80 printf("EL Level:\tEL%d\n", current_el());
Michal Simek76fdafa2024-12-05 11:38:16 +010081 printf("Multiboot:\t%d\n", versal_multi_boot());
Michal Simek4b066a12018-08-22 14:55:27 +020082
Siva Durga Prasad Paladugub7398972019-08-05 15:54:59 +053083#if defined(CONFIG_FPGA_VERSALPL)
84 fpga_init();
85 fpga_add(fpga_xilinx, &versalpl);
86#endif
87
Michal Simek394ee242020-08-03 13:01:45 +020088 if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM))
89 xilinx_read_eeprom();
90
Michal Simek4b066a12018-08-22 14:55:27 +020091 return 0;
92}
93
94int board_early_init_r(void)
95{
Michal Simek19f6c972019-01-28 11:08:00 +010096 u32 val;
Michal Simek4b066a12018-08-22 14:55:27 +020097
Michal Simek19f6c972019-01-28 11:08:00 +010098 if (current_el() != 3)
99 return 0;
Michal Simek4b066a12018-08-22 14:55:27 +0200100
Michal Simekf56f7d12019-01-28 11:12:41 +0100101 debug("iou_switch ctrl div0 %x\n",
102 readl(&crlapb_base->iou_switch_ctrl));
103
Michal Simek19f6c972019-01-28 11:08:00 +0100104 writel(IOU_SWITCH_CTRL_CLKACT_BIT |
Michal Simekf56f7d12019-01-28 11:12:41 +0100105 (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
Michal Simek19f6c972019-01-28 11:08:00 +0100106 &crlapb_base->iou_switch_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +0200107
Michal Simek19f6c972019-01-28 11:08:00 +0100108 /* Global timer init - Program time stamp reference clk */
109 val = readl(&crlapb_base->timestamp_ref_ctrl);
110 val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
111 writel(val, &crlapb_base->timestamp_ref_ctrl);
Michal Simek4b066a12018-08-22 14:55:27 +0200112
Michal Simek19f6c972019-01-28 11:08:00 +0100113 debug("ref ctrl 0x%x\n",
114 readl(&crlapb_base->timestamp_ref_ctrl));
Michal Simek4b066a12018-08-22 14:55:27 +0200115
Michal Simek19f6c972019-01-28 11:08:00 +0100116 /* Clear reset of timestamp reg */
117 writel(0, &crlapb_base->rst_timestamp);
Michal Simek4b066a12018-08-22 14:55:27 +0200118
Michal Simek19f6c972019-01-28 11:08:00 +0100119 /*
120 * Program freq register in System counter and
121 * enable system counter.
122 */
Peng Fan4b3a1822022-04-13 17:47:17 +0800123 writel(CONFIG_COUNTER_FREQUENCY,
Michal Simek19f6c972019-01-28 11:08:00 +0100124 &iou_scntr_secure->base_frequency_id_register);
Michal Simek4b066a12018-08-22 14:55:27 +0200125
Michal Simek19f6c972019-01-28 11:08:00 +0100126 debug("counter val 0x%x\n",
127 readl(&iou_scntr_secure->base_frequency_id_register));
128
129 writel(IOU_SCNTRS_CONTROL_EN,
130 &iou_scntr_secure->counter_control_register);
Michal Simek4b066a12018-08-22 14:55:27 +0200131
Michal Simek19f6c972019-01-28 11:08:00 +0100132 debug("scntrs control 0x%x\n",
133 readl(&iou_scntr_secure->counter_control_register));
134 debug("timer 0x%llx\n", get_ticks());
135 debug("timer 0x%llx\n", get_ticks());
Michal Simek4b066a12018-08-22 14:55:27 +0200136
137 return 0;
138}
139
Ashok Reddy Soma6c191052022-05-05 23:53:45 -0600140unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
141 char *const argv[])
142{
143 int ret = 0;
144
145 if (current_el() > 1) {
146 smp_kick_all_cpus();
147 dcache_disable();
148 armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry,
149 ES_TO_AARCH64);
150 } else {
151 printf("FAIL: current EL is not above EL1\n");
152 ret = EINVAL;
153 }
154 return ret;
155}
156
Michal Simekb1634762023-09-05 13:30:07 +0200157static int boot_targets_setup(void)
Michal Simek9c91e612020-04-08 11:04:41 +0200158{
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530159 u8 bootmode;
160 struct udevice *dev;
161 int bootseq = -1;
162 int bootseq_len = 0;
163 int env_targets_len = 0;
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530164 const char *mode = NULL;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530165 char *new_targets;
166 char *env_targets;
167
Michal Simek9c91e612020-04-08 11:04:41 +0200168 bootmode = versal_get_bootmode();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530169
170 puts("Bootmode: ");
171 switch (bootmode) {
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530172 case USB_MODE:
173 puts("USB_MODE\n");
T Karthik Reddy1104faf2021-03-30 23:24:57 -0600174 mode = "usb_dfu0 usb_dfu1";
T Karthik Reddyfacca9a2019-07-11 16:07:57 +0530175 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530176 case JTAG_MODE:
177 puts("JTAG_MODE\n");
Siva Durga Prasad Paladugu00784e02019-06-25 17:13:14 +0530178 mode = "jtag pxe dhcp";
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530179 break;
180 case QSPI_MODE_24BIT:
181 puts("QSPI_MODE_24\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200182 if (uclass_get_device_by_name(UCLASS_SPI,
183 "spi@f1030000", &dev)) {
184 debug("QSPI driver for QSPI device is not present\n");
185 break;
186 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530187 mode = "xspi0";
188 break;
189 case QSPI_MODE_32BIT:
190 puts("QSPI_MODE_32\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200191 if (uclass_get_device_by_name(UCLASS_SPI,
192 "spi@f1030000", &dev)) {
193 debug("QSPI driver for QSPI device is not present\n");
194 break;
195 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530196 mode = "xspi0";
197 break;
198 case OSPI_MODE:
199 puts("OSPI_MODE\n");
Venkatesh Yadav Abbarapubf6e0412024-05-10 08:22:38 +0200200 if (uclass_get_device_by_name(UCLASS_SPI,
201 "spi@f1010000", &dev)) {
202 debug("OSPI driver for OSPI device is not present\n");
203 break;
204 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530205 mode = "xspi0";
206 break;
207 case EMMC_MODE:
208 puts("EMMC_MODE\n");
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700209 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100210 "mmc@f1050000", &dev) &&
211 uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700212 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530213 debug("SD1 driver for SD1 device is not present\n");
214 break;
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700215 }
Simon Glass75e534b2020-12-16 21:20:07 -0700216 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
T Karthik Reddybc2b9642019-12-16 04:44:26 -0700217 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700218 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530219 break;
Polak, Leszekcddfc132023-10-08 14:34:42 +0000220 case SELECTMAP_MODE:
221 puts("SELECTMAP_MODE\n");
222 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530223 case SD_MODE:
224 puts("SD_MODE\n");
225 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100226 "mmc@f1040000", &dev) &&
227 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530228 "sdhci@f1040000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530229 debug("SD0 driver for SD0 device is not present\n");
230 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530231 }
Simon Glass75e534b2020-12-16 21:20:07 -0700232 debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530233
234 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700235 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530236 break;
237 case SD1_LSHFT_MODE:
238 puts("LVL_SHFT_");
239 /* fall through */
240 case SD_MODE1:
241 puts("SD_MODE1\n");
242 if (uclass_get_device_by_name(UCLASS_MMC,
T Karthik Reddya12445f2021-11-18 12:57:20 +0100243 "mmc@f1050000", &dev) &&
244 uclass_get_device_by_name(UCLASS_MMC,
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530245 "sdhci@f1050000", &dev)) {
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530246 debug("SD1 driver for SD1 device is not present\n");
247 break;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530248 }
Simon Glass75e534b2020-12-16 21:20:07 -0700249 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530250
251 mode = "mmc";
Simon Glass75e534b2020-12-16 21:20:07 -0700252 bootseq = dev_seq(dev);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530253 break;
254 default:
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530255 printf("Invalid Boot Mode:0x%x\n", bootmode);
256 break;
257 }
258
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530259 if (mode) {
260 if (bootseq >= 0) {
261 bootseq_len = snprintf(NULL, 0, "%i", bootseq);
262 debug("Bootseq len: %x\n", bootseq_len);
263 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530264
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530265 /*
266 * One terminating char + one byte for space between mode
267 * and default boot_targets
268 */
269 env_targets = env_get("boot_targets");
270 if (env_targets)
271 env_targets_len = strlen(env_targets);
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530272
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530273 new_targets = calloc(1, strlen(mode) + env_targets_len + 2 +
274 bootseq_len);
275 if (!new_targets)
276 return -ENOMEM;
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530277
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530278 if (bootseq >= 0)
279 sprintf(new_targets, "%s%x %s", mode, bootseq,
280 env_targets ? env_targets : "");
281 else
282 sprintf(new_targets, "%s %s", mode,
283 env_targets ? env_targets : "");
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530284
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530285 env_set("boot_targets", new_targets);
Michal Simek651d0f52025-04-10 09:38:51 +0200286 free(new_targets);
Venkatesh Yadav Abbarapue5dd04a2023-09-04 08:50:34 +0530287 }
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530288
Michal Simekb1634762023-09-05 13:30:07 +0200289 return 0;
290}
291
292int board_late_init(void)
293{
294 int ret;
295
Jonathan Humphreys531eb602025-02-26 16:35:47 -0600296 if (IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT))
297 configure_capsule_updates();
298
Michal Simekb1634762023-09-05 13:30:07 +0200299 if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
300 debug("Saved variables - Skipping\n");
301 return 0;
302 }
303
304 if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
305 return 0;
306
307 if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) {
308 ret = boot_targets_setup();
309 if (ret)
310 return ret;
311 }
312
Michal Simek705d44a2020-03-31 12:39:37 +0200313 return board_late_init_xilinx();
Siva Durga Prasad Paladugu37c2ff82019-01-31 17:28:14 +0530314}
315
Michal Simek4b066a12018-08-22 14:55:27 +0200316int dram_init_banksize(void)
317{
Michal Simek21eb5cc2019-04-29 09:39:09 -0700318 int ret;
319
320 ret = fdtdec_setup_memory_banksize();
321 if (ret)
322 return ret;
323
324 mem_map_fill();
Michal Simek4b066a12018-08-22 14:55:27 +0200325
326 return 0;
327}
328
329int dram_init(void)
330{
Michal Simek9134d4c2020-07-10 12:42:09 +0200331 if (fdtdec_setup_mem_size_base_lowest() != 0)
Michal Simek4b066a12018-08-22 14:55:27 +0200332 return -EINVAL;
333
334 return 0;
335}
336
Michal Simekc1e98aa2024-10-25 13:56:07 +0200337#if !CONFIG_IS_ENABLED(SYSRESET)
Harald Seiler6f14d5f2020-12-15 16:47:52 +0100338void reset_cpu(void)
Michal Simek4b066a12018-08-22 14:55:27 +0200339{
340}
Michal Simekc1e98aa2024-10-25 13:56:07 +0200341#endif
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700342
Michal Simekf3a541f2024-03-22 12:43:17 +0100343#if defined(CONFIG_ENV_IS_NOWHERE)
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700344enum env_location env_get_location(enum env_operation op, int prio)
345{
346 u32 bootmode = versal_get_bootmode();
347
348 if (prio)
349 return ENVL_UNKNOWN;
350
351 switch (bootmode) {
352 case EMMC_MODE:
353 case SD_MODE:
354 case SD1_LSHFT_MODE:
355 case SD_MODE1:
356 if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT))
357 return ENVL_FAT;
358 if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
359 return ENVL_EXT4;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100360 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700361 case OSPI_MODE:
362 case QSPI_MODE_24BIT:
363 case QSPI_MODE_32BIT:
364 if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
365 return ENVL_SPI_FLASH;
T Karthik Reddy6f8b2052021-11-24 12:16:55 +0100366 return ENVL_NOWHERE;
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700367 case JTAG_MODE:
Polak, Leszekcddfc132023-10-08 14:34:42 +0000368 case SELECTMAP_MODE:
Ashok Reddy Somafb6b3cd2021-02-23 08:07:46 -0700369 default:
370 return ENVL_NOWHERE;
371 }
372}
Michal Simekf3a541f2024-03-22 12:43:17 +0100373#endif
Michal Simek444a70e2024-10-25 13:56:08 +0200374
Michal Simek444a70e2024-10-25 13:56:08 +0200375#define DFU_ALT_BUF_LEN SZ_1K
376
Michal Simek754b53c2024-12-05 11:38:15 +0100377static void mtd_found_part(u32 *base, u32 *size)
378{
379 struct mtd_info *part, *mtd;
380
381 mtd_probe_devices();
382
383 mtd = get_mtd_device_nm("nor0");
384 if (!IS_ERR_OR_NULL(mtd)) {
385 list_for_each_entry(part, &mtd->partitions, node) {
386 debug("0x%012llx-0x%012llx : \"%s\"\n",
387 part->offset, part->offset + part->size,
388 part->name);
389
390 if (*base >= part->offset &&
391 *base < part->offset + part->size) {
392 debug("Found my partition: %d/%s\n",
393 part->index, part->name);
394 *base = part->offset;
395 *size = part->size;
396 break;
397 }
398 }
399 }
400}
401
Jonathan Humphreys531eb602025-02-26 16:35:47 -0600402void configure_capsule_updates(void)
Michal Simek444a70e2024-10-25 13:56:08 +0200403{
404 int bootseq = 0, len = 0;
Michal Simek76fdafa2024-12-05 11:38:16 +0100405 u32 multiboot = versal_multi_boot();
Michal Simek444a70e2024-10-25 13:56:08 +0200406 u32 bootmode = versal_get_bootmode();
407
408 ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
409
Vincent Stehlé0f660f32025-04-07 19:05:27 +0200410 memset(buf, 0, DFU_ALT_BUF_LEN);
Michal Simek444a70e2024-10-25 13:56:08 +0200411
Michal Simek76fdafa2024-12-05 11:38:16 +0100412 multiboot = env_get_hex("multiboot", multiboot);
413
Michal Simek444a70e2024-10-25 13:56:08 +0200414 switch (bootmode) {
415 case EMMC_MODE:
416 case SD_MODE:
417 case SD1_LSHFT_MODE:
418 case SD_MODE1:
419 bootseq = mmc_get_env_dev();
420
421 len += snprintf(buf + len, DFU_ALT_BUF_LEN, "mmc %d=boot",
422 bootseq);
423
Michal Simek76fdafa2024-12-05 11:38:16 +0100424 if (multiboot)
425 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
426 "%04d", multiboot);
427
Michal Simek444a70e2024-10-25 13:56:08 +0200428 len += snprintf(buf + len, DFU_ALT_BUF_LEN, ".bin fat %d 1",
429 bootseq);
430 break;
Michal Simek754b53c2024-12-05 11:38:15 +0100431 case QSPI_MODE_24BIT:
432 case QSPI_MODE_32BIT:
433 case OSPI_MODE:
434 {
Michal Simek76fdafa2024-12-05 11:38:16 +0100435 u32 base = multiboot * SZ_32K;
Michal Simek754b53c2024-12-05 11:38:15 +0100436 u32 size = 0x1500000;
437 u32 limit = size;
438
439 mtd_found_part(&base, &limit);
440
441 len += snprintf(buf + len, DFU_ALT_BUF_LEN,
442 "sf 0:0=boot.bin raw 0x%x 0x%x",
443 base, limit);
444 }
445 break;
Michal Simek444a70e2024-10-25 13:56:08 +0200446 default:
447 return;
448 }
449
Michal Simek806be2d2025-02-26 16:35:45 -0600450 update_info.dfu_string = strdup(buf);
451 debug("Capsule DFU: %s\n", update_info.dfu_string);
Michal Simek444a70e2024-10-25 13:56:08 +0200452}