Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2014 - 2018 Xilinx, Inc. |
Michal Simek | a8c9436 | 2023-07-10 14:35:49 +0200 | [diff] [blame] | 4 | * Michal Simek <michal.simek@amd.com> |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
Algapally Santosh Sagar | 3c351b2 | 2023-01-19 22:36:16 -0700 | [diff] [blame] | 7 | #include <command.h> |
Simon Glass | afb0215 | 2019-12-28 10:45:01 -0700 | [diff] [blame] | 8 | #include <cpu_func.h> |
Venkatesh Yadav Abbarapu | 88990e9 | 2025-01-06 14:36:30 +0530 | [diff] [blame] | 9 | #include <dfu.h> |
Simon Glass | ed38aef | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 10 | #include <env.h> |
Michal Simek | 806be2d | 2025-02-26 16:35:45 -0600 | [diff] [blame] | 11 | #include <efi_loader.h> |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 12 | #include <fdtdec.h> |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 13 | #include <init.h> |
Ashok Reddy Soma | fb6b3cd | 2021-02-23 08:07:46 -0700 | [diff] [blame] | 14 | #include <env_internal.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 15 | #include <log.h> |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 16 | #include <malloc.h> |
Michal Simek | 444a70e | 2024-10-25 13:56:08 +0200 | [diff] [blame] | 17 | #include <memalign.h> |
| 18 | #include <mmc.h> |
Michal Simek | 754b53c | 2024-12-05 11:38:15 +0100 | [diff] [blame] | 19 | #include <mtd.h> |
Simon Glass | 495a5dc | 2019-11-14 12:57:30 -0700 | [diff] [blame] | 20 | #include <time.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 21 | #include <asm/cache.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 22 | #include <asm/global_data.h> |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 23 | #include <asm/io.h> |
| 24 | #include <asm/arch/hardware.h> |
Michal Simek | 21eb5cc | 2019-04-29 09:39:09 -0700 | [diff] [blame] | 25 | #include <asm/arch/sys_proto.h> |
Michal Simek | 444a70e | 2024-10-25 13:56:08 +0200 | [diff] [blame] | 26 | #include <linux/sizes.h> |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 27 | #include <dm/device.h> |
| 28 | #include <dm/uclass.h> |
Siva Durga Prasad Paladugu | b739897 | 2019-08-05 15:54:59 +0530 | [diff] [blame] | 29 | #include <versalpl.h> |
Prasad Kummari | 011a746 | 2025-02-19 17:23:01 +0530 | [diff] [blame] | 30 | #include <zynqmp_firmware.h> |
Michal Simek | 705d44a | 2020-03-31 12:39:37 +0200 | [diff] [blame] | 31 | #include "../common/board.h" |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 32 | |
| 33 | DECLARE_GLOBAL_DATA_PTR; |
| 34 | |
Siva Durga Prasad Paladugu | b739897 | 2019-08-05 15:54:59 +0530 | [diff] [blame] | 35 | #if defined(CONFIG_FPGA_VERSALPL) |
Oleksandr Suvorov | dae95a4 | 2022-07-22 17:16:04 +0300 | [diff] [blame] | 36 | static xilinx_desc versalpl = { |
| 37 | xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op, NULL, |
| 38 | FPGA_LEGACY |
| 39 | }; |
Siva Durga Prasad Paladugu | b739897 | 2019-08-05 15:54:59 +0530 | [diff] [blame] | 40 | #endif |
| 41 | |
Michal Simek | fec5476 | 2025-01-06 10:20:40 +0100 | [diff] [blame] | 42 | static u8 versal_get_bootmode(void) |
| 43 | { |
| 44 | u8 bootmode; |
| 45 | u32 reg = 0; |
| 46 | |
Prasad Kummari | 011a746 | 2025-02-19 17:23:01 +0530 | [diff] [blame] | 47 | if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE) && current_el() != 3) { |
| 48 | reg = zynqmp_pm_get_bootmode_reg(); |
| 49 | } else { |
| 50 | reg = readl(&crp_base->boot_mode_usr); |
| 51 | } |
Michal Simek | fec5476 | 2025-01-06 10:20:40 +0100 | [diff] [blame] | 52 | |
| 53 | if (reg >> BOOT_MODE_ALT_SHIFT) |
| 54 | reg >>= BOOT_MODE_ALT_SHIFT; |
| 55 | |
| 56 | bootmode = reg & BOOT_MODES_MASK; |
| 57 | |
| 58 | return bootmode; |
| 59 | } |
| 60 | |
Michal Simek | 76fdafa | 2024-12-05 11:38:16 +0100 | [diff] [blame] | 61 | static u32 versal_multi_boot(void) |
| 62 | { |
Michal Simek | fec5476 | 2025-01-06 10:20:40 +0100 | [diff] [blame] | 63 | u8 bootmode = versal_get_bootmode(); |
Prasad Kummari | d3feab0 | 2025-03-05 19:18:46 +0530 | [diff] [blame] | 64 | u32 reg = 0; |
Michal Simek | fec5476 | 2025-01-06 10:20:40 +0100 | [diff] [blame] | 65 | |
| 66 | /* Mostly workaround for QEMU CI pipeline */ |
| 67 | if (bootmode == JTAG_MODE) |
| 68 | return 0; |
| 69 | |
Prasad Kummari | d3feab0 | 2025-03-05 19:18:46 +0530 | [diff] [blame] | 70 | if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE) && current_el() != 3) |
| 71 | reg = zynqmp_pm_get_pmc_multi_boot_reg(); |
| 72 | else |
| 73 | reg = readl(PMC_MULTI_BOOT_REG); |
| 74 | |
| 75 | return reg & PMC_MULTI_BOOT_MASK; |
Michal Simek | 76fdafa | 2024-12-05 11:38:16 +0100 | [diff] [blame] | 76 | } |
| 77 | |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 78 | int board_init(void) |
| 79 | { |
| 80 | printf("EL Level:\tEL%d\n", current_el()); |
Michal Simek | 76fdafa | 2024-12-05 11:38:16 +0100 | [diff] [blame] | 81 | printf("Multiboot:\t%d\n", versal_multi_boot()); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 82 | |
Siva Durga Prasad Paladugu | b739897 | 2019-08-05 15:54:59 +0530 | [diff] [blame] | 83 | #if defined(CONFIG_FPGA_VERSALPL) |
| 84 | fpga_init(); |
| 85 | fpga_add(fpga_xilinx, &versalpl); |
| 86 | #endif |
| 87 | |
Michal Simek | 394ee24 | 2020-08-03 13:01:45 +0200 | [diff] [blame] | 88 | if (CONFIG_IS_ENABLED(DM_I2C) && CONFIG_IS_ENABLED(I2C_EEPROM)) |
| 89 | xilinx_read_eeprom(); |
| 90 | |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 91 | return 0; |
| 92 | } |
| 93 | |
| 94 | int board_early_init_r(void) |
| 95 | { |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 96 | u32 val; |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 97 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 98 | if (current_el() != 3) |
| 99 | return 0; |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 100 | |
Michal Simek | f56f7d1 | 2019-01-28 11:12:41 +0100 | [diff] [blame] | 101 | debug("iou_switch ctrl div0 %x\n", |
| 102 | readl(&crlapb_base->iou_switch_ctrl)); |
| 103 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 104 | writel(IOU_SWITCH_CTRL_CLKACT_BIT | |
Michal Simek | f56f7d1 | 2019-01-28 11:12:41 +0100 | [diff] [blame] | 105 | (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT), |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 106 | &crlapb_base->iou_switch_ctrl); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 107 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 108 | /* Global timer init - Program time stamp reference clk */ |
| 109 | val = readl(&crlapb_base->timestamp_ref_ctrl); |
| 110 | val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT; |
| 111 | writel(val, &crlapb_base->timestamp_ref_ctrl); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 112 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 113 | debug("ref ctrl 0x%x\n", |
| 114 | readl(&crlapb_base->timestamp_ref_ctrl)); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 115 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 116 | /* Clear reset of timestamp reg */ |
| 117 | writel(0, &crlapb_base->rst_timestamp); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 118 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 119 | /* |
| 120 | * Program freq register in System counter and |
| 121 | * enable system counter. |
| 122 | */ |
Peng Fan | 4b3a182 | 2022-04-13 17:47:17 +0800 | [diff] [blame] | 123 | writel(CONFIG_COUNTER_FREQUENCY, |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 124 | &iou_scntr_secure->base_frequency_id_register); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 125 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 126 | debug("counter val 0x%x\n", |
| 127 | readl(&iou_scntr_secure->base_frequency_id_register)); |
| 128 | |
| 129 | writel(IOU_SCNTRS_CONTROL_EN, |
| 130 | &iou_scntr_secure->counter_control_register); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 131 | |
Michal Simek | 19f6c97 | 2019-01-28 11:08:00 +0100 | [diff] [blame] | 132 | debug("scntrs control 0x%x\n", |
| 133 | readl(&iou_scntr_secure->counter_control_register)); |
| 134 | debug("timer 0x%llx\n", get_ticks()); |
| 135 | debug("timer 0x%llx\n", get_ticks()); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 136 | |
| 137 | return 0; |
| 138 | } |
| 139 | |
Ashok Reddy Soma | 6c19105 | 2022-05-05 23:53:45 -0600 | [diff] [blame] | 140 | unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc, |
| 141 | char *const argv[]) |
| 142 | { |
| 143 | int ret = 0; |
| 144 | |
| 145 | if (current_el() > 1) { |
| 146 | smp_kick_all_cpus(); |
| 147 | dcache_disable(); |
| 148 | armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry, |
| 149 | ES_TO_AARCH64); |
| 150 | } else { |
| 151 | printf("FAIL: current EL is not above EL1\n"); |
| 152 | ret = EINVAL; |
| 153 | } |
| 154 | return ret; |
| 155 | } |
| 156 | |
Michal Simek | b163476 | 2023-09-05 13:30:07 +0200 | [diff] [blame] | 157 | static int boot_targets_setup(void) |
Michal Simek | 9c91e61 | 2020-04-08 11:04:41 +0200 | [diff] [blame] | 158 | { |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 159 | u8 bootmode; |
| 160 | struct udevice *dev; |
| 161 | int bootseq = -1; |
| 162 | int bootseq_len = 0; |
| 163 | int env_targets_len = 0; |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 164 | const char *mode = NULL; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 165 | char *new_targets; |
| 166 | char *env_targets; |
| 167 | |
Michal Simek | 9c91e61 | 2020-04-08 11:04:41 +0200 | [diff] [blame] | 168 | bootmode = versal_get_bootmode(); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 169 | |
| 170 | puts("Bootmode: "); |
| 171 | switch (bootmode) { |
T Karthik Reddy | facca9a | 2019-07-11 16:07:57 +0530 | [diff] [blame] | 172 | case USB_MODE: |
| 173 | puts("USB_MODE\n"); |
T Karthik Reddy | 1104faf | 2021-03-30 23:24:57 -0600 | [diff] [blame] | 174 | mode = "usb_dfu0 usb_dfu1"; |
T Karthik Reddy | facca9a | 2019-07-11 16:07:57 +0530 | [diff] [blame] | 175 | break; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 176 | case JTAG_MODE: |
| 177 | puts("JTAG_MODE\n"); |
Siva Durga Prasad Paladugu | 00784e0 | 2019-06-25 17:13:14 +0530 | [diff] [blame] | 178 | mode = "jtag pxe dhcp"; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 179 | break; |
| 180 | case QSPI_MODE_24BIT: |
| 181 | puts("QSPI_MODE_24\n"); |
Venkatesh Yadav Abbarapu | bf6e041 | 2024-05-10 08:22:38 +0200 | [diff] [blame] | 182 | if (uclass_get_device_by_name(UCLASS_SPI, |
| 183 | "spi@f1030000", &dev)) { |
| 184 | debug("QSPI driver for QSPI device is not present\n"); |
| 185 | break; |
| 186 | } |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 187 | mode = "xspi0"; |
| 188 | break; |
| 189 | case QSPI_MODE_32BIT: |
| 190 | puts("QSPI_MODE_32\n"); |
Venkatesh Yadav Abbarapu | bf6e041 | 2024-05-10 08:22:38 +0200 | [diff] [blame] | 191 | if (uclass_get_device_by_name(UCLASS_SPI, |
| 192 | "spi@f1030000", &dev)) { |
| 193 | debug("QSPI driver for QSPI device is not present\n"); |
| 194 | break; |
| 195 | } |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 196 | mode = "xspi0"; |
| 197 | break; |
| 198 | case OSPI_MODE: |
| 199 | puts("OSPI_MODE\n"); |
Venkatesh Yadav Abbarapu | bf6e041 | 2024-05-10 08:22:38 +0200 | [diff] [blame] | 200 | if (uclass_get_device_by_name(UCLASS_SPI, |
| 201 | "spi@f1010000", &dev)) { |
| 202 | debug("OSPI driver for OSPI device is not present\n"); |
| 203 | break; |
| 204 | } |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 205 | mode = "xspi0"; |
| 206 | break; |
| 207 | case EMMC_MODE: |
| 208 | puts("EMMC_MODE\n"); |
T Karthik Reddy | bc2b964 | 2019-12-16 04:44:26 -0700 | [diff] [blame] | 209 | if (uclass_get_device_by_name(UCLASS_MMC, |
T Karthik Reddy | a12445f | 2021-11-18 12:57:20 +0100 | [diff] [blame] | 210 | "mmc@f1050000", &dev) && |
| 211 | uclass_get_device_by_name(UCLASS_MMC, |
T Karthik Reddy | bc2b964 | 2019-12-16 04:44:26 -0700 | [diff] [blame] | 212 | "sdhci@f1050000", &dev)) { |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 213 | debug("SD1 driver for SD1 device is not present\n"); |
| 214 | break; |
T Karthik Reddy | bc2b964 | 2019-12-16 04:44:26 -0700 | [diff] [blame] | 215 | } |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 216 | debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); |
T Karthik Reddy | bc2b964 | 2019-12-16 04:44:26 -0700 | [diff] [blame] | 217 | mode = "mmc"; |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 218 | bootseq = dev_seq(dev); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 219 | break; |
Polak, Leszek | cddfc13 | 2023-10-08 14:34:42 +0000 | [diff] [blame] | 220 | case SELECTMAP_MODE: |
| 221 | puts("SELECTMAP_MODE\n"); |
| 222 | break; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 223 | case SD_MODE: |
| 224 | puts("SD_MODE\n"); |
| 225 | if (uclass_get_device_by_name(UCLASS_MMC, |
T Karthik Reddy | a12445f | 2021-11-18 12:57:20 +0100 | [diff] [blame] | 226 | "mmc@f1040000", &dev) && |
| 227 | uclass_get_device_by_name(UCLASS_MMC, |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 228 | "sdhci@f1040000", &dev)) { |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 229 | debug("SD0 driver for SD0 device is not present\n"); |
| 230 | break; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 231 | } |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 232 | debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev)); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 233 | |
| 234 | mode = "mmc"; |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 235 | bootseq = dev_seq(dev); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 236 | break; |
| 237 | case SD1_LSHFT_MODE: |
| 238 | puts("LVL_SHFT_"); |
| 239 | /* fall through */ |
| 240 | case SD_MODE1: |
| 241 | puts("SD_MODE1\n"); |
| 242 | if (uclass_get_device_by_name(UCLASS_MMC, |
T Karthik Reddy | a12445f | 2021-11-18 12:57:20 +0100 | [diff] [blame] | 243 | "mmc@f1050000", &dev) && |
| 244 | uclass_get_device_by_name(UCLASS_MMC, |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 245 | "sdhci@f1050000", &dev)) { |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 246 | debug("SD1 driver for SD1 device is not present\n"); |
| 247 | break; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 248 | } |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 249 | debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev)); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 250 | |
| 251 | mode = "mmc"; |
Simon Glass | 75e534b | 2020-12-16 21:20:07 -0700 | [diff] [blame] | 252 | bootseq = dev_seq(dev); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 253 | break; |
| 254 | default: |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 255 | printf("Invalid Boot Mode:0x%x\n", bootmode); |
| 256 | break; |
| 257 | } |
| 258 | |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 259 | if (mode) { |
| 260 | if (bootseq >= 0) { |
| 261 | bootseq_len = snprintf(NULL, 0, "%i", bootseq); |
| 262 | debug("Bootseq len: %x\n", bootseq_len); |
| 263 | } |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 264 | |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 265 | /* |
| 266 | * One terminating char + one byte for space between mode |
| 267 | * and default boot_targets |
| 268 | */ |
| 269 | env_targets = env_get("boot_targets"); |
| 270 | if (env_targets) |
| 271 | env_targets_len = strlen(env_targets); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 272 | |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 273 | new_targets = calloc(1, strlen(mode) + env_targets_len + 2 + |
| 274 | bootseq_len); |
| 275 | if (!new_targets) |
| 276 | return -ENOMEM; |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 277 | |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 278 | if (bootseq >= 0) |
| 279 | sprintf(new_targets, "%s%x %s", mode, bootseq, |
| 280 | env_targets ? env_targets : ""); |
| 281 | else |
| 282 | sprintf(new_targets, "%s %s", mode, |
| 283 | env_targets ? env_targets : ""); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 284 | |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 285 | env_set("boot_targets", new_targets); |
Michal Simek | 651d0f5 | 2025-04-10 09:38:51 +0200 | [diff] [blame] | 286 | free(new_targets); |
Venkatesh Yadav Abbarapu | e5dd04a | 2023-09-04 08:50:34 +0530 | [diff] [blame] | 287 | } |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 288 | |
Michal Simek | b163476 | 2023-09-05 13:30:07 +0200 | [diff] [blame] | 289 | return 0; |
| 290 | } |
| 291 | |
| 292 | int board_late_init(void) |
| 293 | { |
| 294 | int ret; |
| 295 | |
Jonathan Humphreys | 531eb60 | 2025-02-26 16:35:47 -0600 | [diff] [blame] | 296 | if (IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)) |
| 297 | configure_capsule_updates(); |
| 298 | |
Michal Simek | b163476 | 2023-09-05 13:30:07 +0200 | [diff] [blame] | 299 | if (!(gd->flags & GD_FLG_ENV_DEFAULT)) { |
| 300 | debug("Saved variables - Skipping\n"); |
| 301 | return 0; |
| 302 | } |
| 303 | |
| 304 | if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) |
| 305 | return 0; |
| 306 | |
| 307 | if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) { |
| 308 | ret = boot_targets_setup(); |
| 309 | if (ret) |
| 310 | return ret; |
| 311 | } |
| 312 | |
Michal Simek | 705d44a | 2020-03-31 12:39:37 +0200 | [diff] [blame] | 313 | return board_late_init_xilinx(); |
Siva Durga Prasad Paladugu | 37c2ff8 | 2019-01-31 17:28:14 +0530 | [diff] [blame] | 314 | } |
| 315 | |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 316 | int dram_init_banksize(void) |
| 317 | { |
Michal Simek | 21eb5cc | 2019-04-29 09:39:09 -0700 | [diff] [blame] | 318 | int ret; |
| 319 | |
| 320 | ret = fdtdec_setup_memory_banksize(); |
| 321 | if (ret) |
| 322 | return ret; |
| 323 | |
| 324 | mem_map_fill(); |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 325 | |
| 326 | return 0; |
| 327 | } |
| 328 | |
| 329 | int dram_init(void) |
| 330 | { |
Michal Simek | 9134d4c | 2020-07-10 12:42:09 +0200 | [diff] [blame] | 331 | if (fdtdec_setup_mem_size_base_lowest() != 0) |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 332 | return -EINVAL; |
| 333 | |
| 334 | return 0; |
| 335 | } |
| 336 | |
Michal Simek | c1e98aa | 2024-10-25 13:56:07 +0200 | [diff] [blame] | 337 | #if !CONFIG_IS_ENABLED(SYSRESET) |
Harald Seiler | 6f14d5f | 2020-12-15 16:47:52 +0100 | [diff] [blame] | 338 | void reset_cpu(void) |
Michal Simek | 4b066a1 | 2018-08-22 14:55:27 +0200 | [diff] [blame] | 339 | { |
| 340 | } |
Michal Simek | c1e98aa | 2024-10-25 13:56:07 +0200 | [diff] [blame] | 341 | #endif |
Ashok Reddy Soma | fb6b3cd | 2021-02-23 08:07:46 -0700 | [diff] [blame] | 342 | |
Michal Simek | f3a541f | 2024-03-22 12:43:17 +0100 | [diff] [blame] | 343 | #if defined(CONFIG_ENV_IS_NOWHERE) |
Ashok Reddy Soma | fb6b3cd | 2021-02-23 08:07:46 -0700 | [diff] [blame] | 344 | enum env_location env_get_location(enum env_operation op, int prio) |
| 345 | { |
| 346 | u32 bootmode = versal_get_bootmode(); |
| 347 | |
| 348 | if (prio) |
| 349 | return ENVL_UNKNOWN; |
| 350 | |
| 351 | switch (bootmode) { |
| 352 | case EMMC_MODE: |
| 353 | case SD_MODE: |
| 354 | case SD1_LSHFT_MODE: |
| 355 | case SD_MODE1: |
| 356 | if (IS_ENABLED(CONFIG_ENV_IS_IN_FAT)) |
| 357 | return ENVL_FAT; |
| 358 | if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4)) |
| 359 | return ENVL_EXT4; |
T Karthik Reddy | 6f8b205 | 2021-11-24 12:16:55 +0100 | [diff] [blame] | 360 | return ENVL_NOWHERE; |
Ashok Reddy Soma | fb6b3cd | 2021-02-23 08:07:46 -0700 | [diff] [blame] | 361 | case OSPI_MODE: |
| 362 | case QSPI_MODE_24BIT: |
| 363 | case QSPI_MODE_32BIT: |
| 364 | if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH)) |
| 365 | return ENVL_SPI_FLASH; |
T Karthik Reddy | 6f8b205 | 2021-11-24 12:16:55 +0100 | [diff] [blame] | 366 | return ENVL_NOWHERE; |
Ashok Reddy Soma | fb6b3cd | 2021-02-23 08:07:46 -0700 | [diff] [blame] | 367 | case JTAG_MODE: |
Polak, Leszek | cddfc13 | 2023-10-08 14:34:42 +0000 | [diff] [blame] | 368 | case SELECTMAP_MODE: |
Ashok Reddy Soma | fb6b3cd | 2021-02-23 08:07:46 -0700 | [diff] [blame] | 369 | default: |
| 370 | return ENVL_NOWHERE; |
| 371 | } |
| 372 | } |
Michal Simek | f3a541f | 2024-03-22 12:43:17 +0100 | [diff] [blame] | 373 | #endif |
Michal Simek | 444a70e | 2024-10-25 13:56:08 +0200 | [diff] [blame] | 374 | |
Michal Simek | 444a70e | 2024-10-25 13:56:08 +0200 | [diff] [blame] | 375 | #define DFU_ALT_BUF_LEN SZ_1K |
| 376 | |
Michal Simek | 754b53c | 2024-12-05 11:38:15 +0100 | [diff] [blame] | 377 | static void mtd_found_part(u32 *base, u32 *size) |
| 378 | { |
| 379 | struct mtd_info *part, *mtd; |
| 380 | |
| 381 | mtd_probe_devices(); |
| 382 | |
| 383 | mtd = get_mtd_device_nm("nor0"); |
| 384 | if (!IS_ERR_OR_NULL(mtd)) { |
| 385 | list_for_each_entry(part, &mtd->partitions, node) { |
| 386 | debug("0x%012llx-0x%012llx : \"%s\"\n", |
| 387 | part->offset, part->offset + part->size, |
| 388 | part->name); |
| 389 | |
| 390 | if (*base >= part->offset && |
| 391 | *base < part->offset + part->size) { |
| 392 | debug("Found my partition: %d/%s\n", |
| 393 | part->index, part->name); |
| 394 | *base = part->offset; |
| 395 | *size = part->size; |
| 396 | break; |
| 397 | } |
| 398 | } |
| 399 | } |
| 400 | } |
| 401 | |
Jonathan Humphreys | 531eb60 | 2025-02-26 16:35:47 -0600 | [diff] [blame] | 402 | void configure_capsule_updates(void) |
Michal Simek | 444a70e | 2024-10-25 13:56:08 +0200 | [diff] [blame] | 403 | { |
| 404 | int bootseq = 0, len = 0; |
Michal Simek | 76fdafa | 2024-12-05 11:38:16 +0100 | [diff] [blame] | 405 | u32 multiboot = versal_multi_boot(); |
Michal Simek | 444a70e | 2024-10-25 13:56:08 +0200 | [diff] [blame] | 406 | u32 bootmode = versal_get_bootmode(); |
| 407 | |
| 408 | ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN); |
| 409 | |
Vincent Stehlé | 0f660f3 | 2025-04-07 19:05:27 +0200 | [diff] [blame] | 410 | memset(buf, 0, DFU_ALT_BUF_LEN); |
Michal Simek | 444a70e | 2024-10-25 13:56:08 +0200 | [diff] [blame] | 411 | |
Michal Simek | 76fdafa | 2024-12-05 11:38:16 +0100 | [diff] [blame] | 412 | multiboot = env_get_hex("multiboot", multiboot); |
| 413 | |
Michal Simek | 444a70e | 2024-10-25 13:56:08 +0200 | [diff] [blame] | 414 | switch (bootmode) { |
| 415 | case EMMC_MODE: |
| 416 | case SD_MODE: |
| 417 | case SD1_LSHFT_MODE: |
| 418 | case SD_MODE1: |
| 419 | bootseq = mmc_get_env_dev(); |
| 420 | |
| 421 | len += snprintf(buf + len, DFU_ALT_BUF_LEN, "mmc %d=boot", |
| 422 | bootseq); |
| 423 | |
Michal Simek | 76fdafa | 2024-12-05 11:38:16 +0100 | [diff] [blame] | 424 | if (multiboot) |
| 425 | len += snprintf(buf + len, DFU_ALT_BUF_LEN, |
| 426 | "%04d", multiboot); |
| 427 | |
Michal Simek | 444a70e | 2024-10-25 13:56:08 +0200 | [diff] [blame] | 428 | len += snprintf(buf + len, DFU_ALT_BUF_LEN, ".bin fat %d 1", |
| 429 | bootseq); |
| 430 | break; |
Michal Simek | 754b53c | 2024-12-05 11:38:15 +0100 | [diff] [blame] | 431 | case QSPI_MODE_24BIT: |
| 432 | case QSPI_MODE_32BIT: |
| 433 | case OSPI_MODE: |
| 434 | { |
Michal Simek | 76fdafa | 2024-12-05 11:38:16 +0100 | [diff] [blame] | 435 | u32 base = multiboot * SZ_32K; |
Michal Simek | 754b53c | 2024-12-05 11:38:15 +0100 | [diff] [blame] | 436 | u32 size = 0x1500000; |
| 437 | u32 limit = size; |
| 438 | |
| 439 | mtd_found_part(&base, &limit); |
| 440 | |
| 441 | len += snprintf(buf + len, DFU_ALT_BUF_LEN, |
| 442 | "sf 0:0=boot.bin raw 0x%x 0x%x", |
| 443 | base, limit); |
| 444 | } |
| 445 | break; |
Michal Simek | 444a70e | 2024-10-25 13:56:08 +0200 | [diff] [blame] | 446 | default: |
| 447 | return; |
| 448 | } |
| 449 | |
Michal Simek | 806be2d | 2025-02-26 16:35:45 -0600 | [diff] [blame] | 450 | update_info.dfu_string = strdup(buf); |
| 451 | debug("Capsule DFU: %s\n", update_info.dfu_string); |
Michal Simek | 444a70e | 2024-10-25 13:56:08 +0200 | [diff] [blame] | 452 | } |