Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007-2008 |
Stelian Pop | 5ee0c7f | 2011-11-01 00:00:39 +0100 | [diff] [blame] | 4 | * Stelian Pop <stelian@popies.net> |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 5 | * Lead Tech Design <www.leadtechdesign.com> |
| 6 | * Copyright (C) 2008 Ronetix Ilko Iliev (www.ronetix.at) |
| 7 | * Copyright (C) 2009 Jean-Christopher PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <common.h> |
Simon Glass | 8e16b1e | 2019-12-28 10:45:05 -0700 | [diff] [blame] | 11 | #include <init.h> |
Simon Glass | f5c208d | 2019-11-14 12:57:20 -0700 | [diff] [blame] | 12 | #include <vsprintf.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 13 | #include <asm/global_data.h> |
Alexey Brodkin | 267d8e2 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 14 | #include <linux/sizes.h> |
Asen Dimov | 6a59514 | 2011-07-26 04:48:41 +0000 | [diff] [blame] | 15 | #include <asm/io.h> |
Andreas Bießmann | a4c24d3 | 2013-11-29 12:13:45 +0100 | [diff] [blame] | 16 | #include <asm/gpio.h> |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 17 | #include <asm/arch/at91sam9_smc.h> |
| 18 | #include <asm/arch/at91_common.h> |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 19 | #include <asm/arch/at91_rstc.h> |
Asen Dimov | 9128acd | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 20 | #include <asm/arch/at91_matrix.h> |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 21 | #include <asm/arch/clk.h> |
Asen Dimov | 6a59514 | 2011-07-26 04:48:41 +0000 | [diff] [blame] | 22 | #include <asm/arch/gpio.h> |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 23 | #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000) |
| 24 | #include <net.h> |
| 25 | #endif |
| 26 | #include <netdev.h> |
Simon Glass | 0ffb9d6 | 2017-05-31 19:47:48 -0600 | [diff] [blame] | 27 | #include <asm/mach-types.h> |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 28 | |
| 29 | DECLARE_GLOBAL_DATA_PTR; |
| 30 | |
| 31 | /* ------------------------------------------------------------------------- */ |
| 32 | /* |
| 33 | * Miscelaneous platform dependent initialisations |
| 34 | */ |
| 35 | |
| 36 | #ifdef CONFIG_CMD_NAND |
| 37 | static void pm9261_nand_hw_init(void) |
| 38 | { |
| 39 | unsigned long csa; |
Asen Dimov | 6a59514 | 2011-07-26 04:48:41 +0000 | [diff] [blame] | 40 | struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
| 41 | struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 42 | |
| 43 | /* Enable CS3 */ |
Asen Dimov | 9128acd | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 44 | csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; |
| 45 | writel(csa, &matrix->csa); |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 46 | |
| 47 | /* Configure SMC CS3 for NAND/SmartMedia */ |
Asen Dimov | 9128acd | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 48 | writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | |
| 49 | AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), |
| 50 | &smc->cs[3].setup); |
| 51 | |
| 52 | writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | |
| 53 | AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), |
| 54 | &smc->cs[3].pulse); |
| 55 | |
| 56 | writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), |
| 57 | &smc->cs[3].cycle); |
| 58 | |
| 59 | writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | |
| 60 | AT91_SMC_MODE_EXNW_DISABLE | |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 61 | #ifdef CONFIG_SYS_NAND_DBW_16 |
Asen Dimov | 9128acd | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 62 | AT91_SMC_MODE_DBW_16 | |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 63 | #else /* CONFIG_SYS_NAND_DBW_8 */ |
Asen Dimov | 9128acd | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 64 | AT91_SMC_MODE_DBW_8 | |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 65 | #endif |
Asen Dimov | 9128acd | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 66 | AT91_SMC_MODE_TDF_CYCLE(2), |
| 67 | &smc->cs[3].mode); |
| 68 | |
Wenyou Yang | 78f8976 | 2016-02-03 10:16:50 +0800 | [diff] [blame] | 69 | at91_periph_clk_enable(ATMEL_ID_PIOA); |
| 70 | at91_periph_clk_enable(ATMEL_ID_PIOC); |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 71 | |
| 72 | /* Configure RDY/BSY */ |
Andreas Bießmann | a4c24d3 | 2013-11-29 12:13:45 +0100 | [diff] [blame] | 73 | gpio_direction_input(CONFIG_SYS_NAND_READY_PIN); |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 74 | |
| 75 | /* Enable NandFlash */ |
Andreas Bießmann | a4c24d3 | 2013-11-29 12:13:45 +0100 | [diff] [blame] | 76 | gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 77 | |
Asen Dimov | 9128acd | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 78 | at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* NANDOE */ |
| 79 | at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* NANDWE */ |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 80 | } |
| 81 | #endif |
| 82 | |
| 83 | |
| 84 | #ifdef CONFIG_DRIVER_DM9000 |
| 85 | static void pm9261_dm9000_hw_init(void) |
| 86 | { |
Asen Dimov | 6a59514 | 2011-07-26 04:48:41 +0000 | [diff] [blame] | 87 | struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
Asen Dimov | 9128acd | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 88 | |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 89 | /* Configure SMC CS2 for DM9000 */ |
Asen Dimov | 9128acd | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 90 | writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | |
| 91 | AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), |
| 92 | &smc->cs[2].setup); |
| 93 | |
| 94 | writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) | |
| 95 | AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8), |
| 96 | &smc->cs[2].pulse); |
| 97 | |
| 98 | writel(AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16), |
| 99 | &smc->cs[2].cycle); |
| 100 | |
| 101 | writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | |
| 102 | AT91_SMC_MODE_EXNW_DISABLE | |
| 103 | AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 | |
| 104 | AT91_SMC_MODE_TDF_CYCLE(1), |
| 105 | &smc->cs[2].mode); |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 106 | |
| 107 | /* Configure Interrupt pin as input, no pull-up */ |
Wenyou Yang | 78f8976 | 2016-02-03 10:16:50 +0800 | [diff] [blame] | 108 | at91_periph_clk_enable(ATMEL_ID_PIOA); |
Asen Dimov | 9128acd | 2010-04-06 16:18:04 +0300 | [diff] [blame] | 109 | at91_set_pio_input(AT91_PIO_PORTA, 24, 0); |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 110 | } |
| 111 | #endif |
| 112 | |
Asen Dimov | 7aa4dc0 | 2011-12-09 10:59:07 +0000 | [diff] [blame] | 113 | int board_early_init_f(void) |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 114 | { |
Asen Dimov | 7aa4dc0 | 2011-12-09 10:59:07 +0000 | [diff] [blame] | 115 | return 0; |
| 116 | } |
| 117 | |
| 118 | int board_init(void) |
| 119 | { |
| 120 | /* arch number of PM9261-Board */ |
| 121 | gd->bd->bi_arch_number = MACH_TYPE_PM9261; |
| 122 | |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 123 | /* adress of boot parameters */ |
| 124 | gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
| 125 | |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 126 | #ifdef CONFIG_CMD_NAND |
| 127 | pm9261_nand_hw_init(); |
| 128 | #endif |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 129 | #ifdef CONFIG_DRIVER_DM9000 |
| 130 | pm9261_dm9000_hw_init(); |
| 131 | #endif |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 132 | return 0; |
| 133 | } |
| 134 | |
Ilko Iliev | c120e9e | 2009-09-05 02:51:34 +0200 | [diff] [blame] | 135 | #ifdef CONFIG_DRIVER_DM9000 |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 136 | int board_eth_init(struct bd_info *bis) |
Ilko Iliev | c120e9e | 2009-09-05 02:51:34 +0200 | [diff] [blame] | 137 | { |
| 138 | return dm9000_initialize(bis); |
| 139 | } |
| 140 | #endif |
| 141 | |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 142 | int dram_init(void) |
| 143 | { |
Asen Dimov | 5aae746 | 2010-12-12 12:41:30 +0200 | [diff] [blame] | 144 | /* dram_init must store complete ramsize in gd->ram_size */ |
Albert ARIBAUD | a960673 | 2011-07-03 05:55:33 +0000 | [diff] [blame] | 145 | gd->ram_size = get_ram_size((void *)PHYS_SDRAM, |
Asen Dimov | 5aae746 | 2010-12-12 12:41:30 +0200 | [diff] [blame] | 146 | PHYS_SDRAM_SIZE); |
| 147 | return 0; |
| 148 | } |
| 149 | |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 150 | int dram_init_banksize(void) |
Asen Dimov | 5aae746 | 2010-12-12 12:41:30 +0200 | [diff] [blame] | 151 | { |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 152 | gd->bd->bi_dram[0].start = PHYS_SDRAM; |
| 153 | gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 154 | |
| 155 | return 0; |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 156 | } |
| 157 | |
| 158 | #ifdef CONFIG_RESET_PHY_R |
| 159 | void reset_phy(void) |
| 160 | { |
| 161 | #ifdef CONFIG_DRIVER_DM9000 |
| 162 | /* |
| 163 | * Initialize ethernet HW addr prior to starting Linux, |
| 164 | * needed for nfsroot |
| 165 | */ |
Joe Hershberger | 3dbe17e | 2015-03-22 17:09:06 -0500 | [diff] [blame] | 166 | eth_init(); |
Ilko Iliev | 61fdb73 | 2009-06-12 21:20:39 +0200 | [diff] [blame] | 167 | #endif |
| 168 | } |
| 169 | #endif |
| 170 | |
| 171 | #ifdef CONFIG_DISPLAY_BOARDINFO |
| 172 | int checkboard (void) |
| 173 | { |
| 174 | char buf[32]; |
| 175 | |
| 176 | printf ("Board : Ronetix PM9261\n"); |
| 177 | printf ("Crystal frequency: %8s MHz\n", |
| 178 | strmhz(buf, get_main_clk_rate())); |
| 179 | printf ("CPU clock : %8s MHz\n", |
| 180 | strmhz(buf, get_cpu_clk_rate())); |
| 181 | printf ("Master clock : %8s MHz\n", |
| 182 | strmhz(buf, get_mck_clk_rate())); |
| 183 | |
| 184 | return 0; |
| 185 | } |
| 186 | #endif |