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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Ilko Iliev61fdb732009-06-12 21:20:39 +02002/*
3 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01004 * Stelian Pop <stelian@popies.net>
Ilko Iliev61fdb732009-06-12 21:20:39 +02005 * Lead Tech Design <www.leadtechdesign.com>
6 * Copyright (C) 2008 Ronetix Ilko Iliev (www.ronetix.at)
7 * Copyright (C) 2009 Jean-Christopher PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Ilko Iliev61fdb732009-06-12 21:20:39 +02008 */
9
10#include <common.h>
Simon Glass8e16b1e2019-12-28 10:45:05 -070011#include <init.h>
Simon Glassf5c208d2019-11-14 12:57:20 -070012#include <vsprintf.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060013#include <asm/global_data.h>
Alexey Brodkin267d8e22014-02-26 17:47:58 +040014#include <linux/sizes.h>
Asen Dimov6a595142011-07-26 04:48:41 +000015#include <asm/io.h>
Andreas Bießmanna4c24d32013-11-29 12:13:45 +010016#include <asm/gpio.h>
Ilko Iliev61fdb732009-06-12 21:20:39 +020017#include <asm/arch/at91sam9_smc.h>
18#include <asm/arch/at91_common.h>
Ilko Iliev61fdb732009-06-12 21:20:39 +020019#include <asm/arch/at91_rstc.h>
Asen Dimov9128acd2010-04-06 16:18:04 +030020#include <asm/arch/at91_matrix.h>
Ilko Iliev61fdb732009-06-12 21:20:39 +020021#include <asm/arch/clk.h>
Asen Dimov6a595142011-07-26 04:48:41 +000022#include <asm/arch/gpio.h>
Ilko Iliev61fdb732009-06-12 21:20:39 +020023#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
24#include <net.h>
25#endif
26#include <netdev.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060027#include <asm/mach-types.h>
Ilko Iliev61fdb732009-06-12 21:20:39 +020028
29DECLARE_GLOBAL_DATA_PTR;
30
31/* ------------------------------------------------------------------------- */
32/*
33 * Miscelaneous platform dependent initialisations
34 */
35
36#ifdef CONFIG_CMD_NAND
37static void pm9261_nand_hw_init(void)
38{
39 unsigned long csa;
Asen Dimov6a595142011-07-26 04:48:41 +000040 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
41 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
Ilko Iliev61fdb732009-06-12 21:20:39 +020042
43 /* Enable CS3 */
Asen Dimov9128acd2010-04-06 16:18:04 +030044 csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A;
45 writel(csa, &matrix->csa);
Ilko Iliev61fdb732009-06-12 21:20:39 +020046
47 /* Configure SMC CS3 for NAND/SmartMedia */
Asen Dimov9128acd2010-04-06 16:18:04 +030048 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
49 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
50 &smc->cs[3].setup);
51
52 writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
53 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
54 &smc->cs[3].pulse);
55
56 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
57 &smc->cs[3].cycle);
58
59 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
60 AT91_SMC_MODE_EXNW_DISABLE |
Ilko Iliev61fdb732009-06-12 21:20:39 +020061#ifdef CONFIG_SYS_NAND_DBW_16
Asen Dimov9128acd2010-04-06 16:18:04 +030062 AT91_SMC_MODE_DBW_16 |
Ilko Iliev61fdb732009-06-12 21:20:39 +020063#else /* CONFIG_SYS_NAND_DBW_8 */
Asen Dimov9128acd2010-04-06 16:18:04 +030064 AT91_SMC_MODE_DBW_8 |
Ilko Iliev61fdb732009-06-12 21:20:39 +020065#endif
Asen Dimov9128acd2010-04-06 16:18:04 +030066 AT91_SMC_MODE_TDF_CYCLE(2),
67 &smc->cs[3].mode);
68
Wenyou Yang78f89762016-02-03 10:16:50 +080069 at91_periph_clk_enable(ATMEL_ID_PIOA);
70 at91_periph_clk_enable(ATMEL_ID_PIOC);
Ilko Iliev61fdb732009-06-12 21:20:39 +020071
72 /* Configure RDY/BSY */
Andreas Bießmanna4c24d32013-11-29 12:13:45 +010073 gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
Ilko Iliev61fdb732009-06-12 21:20:39 +020074
75 /* Enable NandFlash */
Andreas Bießmanna4c24d32013-11-29 12:13:45 +010076 gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
Ilko Iliev61fdb732009-06-12 21:20:39 +020077
Asen Dimov9128acd2010-04-06 16:18:04 +030078 at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* NANDOE */
79 at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* NANDWE */
Ilko Iliev61fdb732009-06-12 21:20:39 +020080}
81#endif
82
83
84#ifdef CONFIG_DRIVER_DM9000
85static void pm9261_dm9000_hw_init(void)
86{
Asen Dimov6a595142011-07-26 04:48:41 +000087 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
Asen Dimov9128acd2010-04-06 16:18:04 +030088
Ilko Iliev61fdb732009-06-12 21:20:39 +020089 /* Configure SMC CS2 for DM9000 */
Asen Dimov9128acd2010-04-06 16:18:04 +030090 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
91 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
92 &smc->cs[2].setup);
93
94 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) |
95 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8),
96 &smc->cs[2].pulse);
97
98 writel(AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16),
99 &smc->cs[2].cycle);
100
101 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
102 AT91_SMC_MODE_EXNW_DISABLE |
103 AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 |
104 AT91_SMC_MODE_TDF_CYCLE(1),
105 &smc->cs[2].mode);
Ilko Iliev61fdb732009-06-12 21:20:39 +0200106
107 /* Configure Interrupt pin as input, no pull-up */
Wenyou Yang78f89762016-02-03 10:16:50 +0800108 at91_periph_clk_enable(ATMEL_ID_PIOA);
Asen Dimov9128acd2010-04-06 16:18:04 +0300109 at91_set_pio_input(AT91_PIO_PORTA, 24, 0);
Ilko Iliev61fdb732009-06-12 21:20:39 +0200110}
111#endif
112
Asen Dimov7aa4dc02011-12-09 10:59:07 +0000113int board_early_init_f(void)
Ilko Iliev61fdb732009-06-12 21:20:39 +0200114{
Asen Dimov7aa4dc02011-12-09 10:59:07 +0000115 return 0;
116}
117
118int board_init(void)
119{
120 /* arch number of PM9261-Board */
121 gd->bd->bi_arch_number = MACH_TYPE_PM9261;
122
Ilko Iliev61fdb732009-06-12 21:20:39 +0200123 /* adress of boot parameters */
124 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
125
Ilko Iliev61fdb732009-06-12 21:20:39 +0200126#ifdef CONFIG_CMD_NAND
127 pm9261_nand_hw_init();
128#endif
Ilko Iliev61fdb732009-06-12 21:20:39 +0200129#ifdef CONFIG_DRIVER_DM9000
130 pm9261_dm9000_hw_init();
131#endif
Ilko Iliev61fdb732009-06-12 21:20:39 +0200132 return 0;
133}
134
Ilko Ilievc120e9e2009-09-05 02:51:34 +0200135#ifdef CONFIG_DRIVER_DM9000
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900136int board_eth_init(struct bd_info *bis)
Ilko Ilievc120e9e2009-09-05 02:51:34 +0200137{
138 return dm9000_initialize(bis);
139}
140#endif
141
Ilko Iliev61fdb732009-06-12 21:20:39 +0200142int dram_init(void)
143{
Asen Dimov5aae7462010-12-12 12:41:30 +0200144 /* dram_init must store complete ramsize in gd->ram_size */
Albert ARIBAUDa9606732011-07-03 05:55:33 +0000145 gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
Asen Dimov5aae7462010-12-12 12:41:30 +0200146 PHYS_SDRAM_SIZE);
147 return 0;
148}
149
Simon Glass2f949c32017-03-31 08:40:32 -0600150int dram_init_banksize(void)
Asen Dimov5aae7462010-12-12 12:41:30 +0200151{
Ilko Iliev61fdb732009-06-12 21:20:39 +0200152 gd->bd->bi_dram[0].start = PHYS_SDRAM;
153 gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
Simon Glass2f949c32017-03-31 08:40:32 -0600154
155 return 0;
Ilko Iliev61fdb732009-06-12 21:20:39 +0200156}
157
158#ifdef CONFIG_RESET_PHY_R
159void reset_phy(void)
160{
161#ifdef CONFIG_DRIVER_DM9000
162 /*
163 * Initialize ethernet HW addr prior to starting Linux,
164 * needed for nfsroot
165 */
Joe Hershberger3dbe17e2015-03-22 17:09:06 -0500166 eth_init();
Ilko Iliev61fdb732009-06-12 21:20:39 +0200167#endif
168}
169#endif
170
171#ifdef CONFIG_DISPLAY_BOARDINFO
172int checkboard (void)
173{
174 char buf[32];
175
176 printf ("Board : Ronetix PM9261\n");
177 printf ("Crystal frequency: %8s MHz\n",
178 strmhz(buf, get_main_clk_rate()));
179 printf ("CPU clock : %8s MHz\n",
180 strmhz(buf, get_cpu_clk_rate()));
181 printf ("Master clock : %8s MHz\n",
182 strmhz(buf, get_mck_clk_rate()));
183
184 return 0;
185}
186#endif