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Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrice Chotard879cde52019-02-12 16:50:40 +01005#include <common.h>
6#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +02007#include <bootm.h>
Patrice Chotard204079b2018-08-10 17:12:14 +02008#include <clk.h>
Patrick Delaunay266bf102019-07-30 19:16:44 +02009#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020010#include <dm.h>
Simon Glassdb229612019-08-01 09:46:42 -060011#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060012#include <env_internal.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010013#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020014#include <generic-phy.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010015#include <i2c.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010016#include <led.h>
17#include <misc.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020018#include <mtd.h>
19#include <mtd_node.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020020#include <phy.h>
Patrick Delaunayc17d7252019-08-02 15:07:20 +020021#include <remoteproc.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020022#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010023#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010024#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020025#include <watchdog.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020026#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010027#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010028#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020029#include <asm/arch/sys_proto.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020030#include <jffs2/load_kernel.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020031#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010032#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010033
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010034/* SYSCFG registers */
35#define SYSCFG_BOOTR 0x00
36#define SYSCFG_PMCSETR 0x04
37#define SYSCFG_IOCTRLSETR 0x18
38#define SYSCFG_ICNR 0x1C
39#define SYSCFG_CMPCR 0x20
40#define SYSCFG_CMPENSETR 0x24
41#define SYSCFG_PMCCLRR 0x44
42
43#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
44#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
45
46#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
47#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
48#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
49#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
50#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
51
52#define SYSCFG_CMPCR_SW_CTRL BIT(1)
53#define SYSCFG_CMPCR_READY BIT(8)
54
55#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
56
57#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
58#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
59
60#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
61
62#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020063#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
64#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
65#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010066
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010067/*
68 * Get a global data pointer
69 */
70DECLARE_GLOBAL_DATA_PTR;
71
Patrice Chotardcded32f2019-04-30 18:09:38 +020072#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010073#define USB_WARNING_LOW_THRESHOLD_UV 660000
74#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020075#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010076
Patrick Delaunay92dc1022019-02-12 11:44:41 +010077int checkboard(void)
78{
79 int ret;
80 char *mode;
81 u32 otp;
82 struct udevice *dev;
83 const char *fdt_compat;
84 int fdt_compat_len;
85
Patrick Delaunayff215a42019-07-02 13:26:06 +020086 if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
87 mode = "trusted with OP-TEE";
88 else if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
Patrick Delaunay92dc1022019-02-12 11:44:41 +010089 mode = "trusted";
90 else
91 mode = "basic";
92
93 printf("Board: stm32mp1 in %s mode", mode);
94 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
95 &fdt_compat_len);
96 if (fdt_compat && fdt_compat_len)
97 printf(" (%s)", fdt_compat);
98 puts("\n");
99
100 ret = uclass_get_device_by_driver(UCLASS_MISC,
101 DM_GET_DRIVER(stm32mp_bsec),
102 &dev);
103
104 if (!ret)
105 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
106 &otp, sizeof(otp));
Patrick Delaunaydcb89fd2019-08-02 13:08:05 +0200107 if (ret > 0 && otp) {
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100108 printf("Board: MB%04x Var%d Rev.%c-%02d\n",
109 otp >> 16,
110 (otp >> 12) & 0xF,
111 ((otp >> 8) & 0xF) - 1 + 'A',
112 otp & 0xF);
113 }
114
115 return 0;
116}
117
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100118static void board_key_check(void)
119{
120#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
121 ofnode node;
122 struct gpio_desc gpio;
123 enum forced_boot_mode boot_mode = BOOT_NORMAL;
124
125 node = ofnode_path("/config");
126 if (!ofnode_valid(node)) {
127 debug("%s: no /config node?\n", __func__);
128 return;
129 }
130#ifdef CONFIG_FASTBOOT
131 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
132 &gpio, GPIOD_IS_IN)) {
133 debug("%s: could not find a /config/st,fastboot-gpios\n",
134 __func__);
135 } else {
136 if (dm_gpio_get_value(&gpio)) {
137 puts("Fastboot key pressed, ");
138 boot_mode = BOOT_FASTBOOT;
139 }
140
141 dm_gpio_free(NULL, &gpio);
142 }
143#endif
144#ifdef CONFIG_CMD_STM32PROG
145 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
146 &gpio, GPIOD_IS_IN)) {
147 debug("%s: could not find a /config/st,stm32prog-gpios\n",
148 __func__);
149 } else {
150 if (dm_gpio_get_value(&gpio)) {
151 puts("STM32Programmer key pressed, ");
152 boot_mode = BOOT_STM32PROG;
153 }
154 dm_gpio_free(NULL, &gpio);
155 }
156#endif
157
158 if (boot_mode != BOOT_NORMAL) {
159 puts("entering download mode...\n");
160 clrsetbits_le32(TAMP_BOOT_CONTEXT,
161 TAMP_BOOT_FORCED_MASK,
162 boot_mode);
163 }
164#endif
165}
166
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100167#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
Patrice Chotard204079b2018-08-10 17:12:14 +0200168
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100169/* STMicroelectronics STUSB1600 Type-C controller */
170#define STUSB1600_CC_CONNECTION_STATUS 0x0E
171
172/* STUSB1600_CC_CONNECTION_STATUS bitfields */
173#define STUSB1600_CC_ATTACH BIT(0)
174
175static int stusb1600_init(struct udevice **dev_stusb1600)
176{
177 ofnode node;
178 struct udevice *dev, *bus;
179 int ret;
180 u32 chip_addr;
181
182 *dev_stusb1600 = NULL;
183
184 /* if node stusb1600 is present, means DK1 or DK2 board */
185 node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
186 if (!ofnode_valid(node))
187 return -ENODEV;
188
189 ret = ofnode_read_u32(node, "reg", &chip_addr);
190 if (ret)
191 return -EINVAL;
192
193 ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
194 &bus);
195 if (ret) {
196 printf("bus for stusb1600 not found\n");
197 return -ENODEV;
198 }
199
200 ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
201 if (!ret)
202 *dev_stusb1600 = dev;
203
204 return ret;
205}
206
207static int stusb1600_cable_connected(struct udevice *dev)
208{
209 u8 status;
210
211 if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
212 return 0;
213
214 return status & STUSB1600_CC_ATTACH;
215}
216
217#include <usb/dwc2_udc.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100218int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200219{
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100220 struct udevice *stusb1600;
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100221 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200222 int ret;
223
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100224 if (!stusb1600_init(&stusb1600))
225 return stusb1600_cable_connected(stusb1600);
226
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100227 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
228 DM_GET_DRIVER(dwc2_udc_otg),
229 &dwc2_udc_otg);
230 if (!ret)
231 debug("dwc2_udc_otg init failed\n");
Patrice Chotard204079b2018-08-10 17:12:14 +0200232
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100233 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100234}
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100235#endif /* CONFIG_USB_GADGET */
Patrice Chotard879cde52019-02-12 16:50:40 +0100236
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200237#ifdef CONFIG_LED
Patrice Chotard879cde52019-02-12 16:50:40 +0100238static int get_led(struct udevice **dev, char *led_string)
239{
240 char *led_name;
241 int ret;
242
243 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
244 if (!led_name) {
245 pr_debug("%s: could not find %s config string\n",
246 __func__, led_string);
247 return -ENOENT;
248 }
249 ret = led_get_by_label(led_name, dev);
250 if (ret) {
251 debug("%s: get=%d\n", __func__, ret);
252 return ret;
253 }
254
255 return 0;
256}
257
258static int setup_led(enum led_state_t cmd)
259{
260 struct udevice *dev;
261 int ret;
262
263 ret = get_led(&dev, "u-boot,boot-led");
264 if (ret)
265 return ret;
266
267 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200268 return ret;
269}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200270#endif
271
272static void __maybe_unused led_error_blink(u32 nb_blink)
273{
274#ifdef CONFIG_LED
275 int ret;
276 struct udevice *led;
277 u32 i;
278#endif
279
280 if (!nb_blink)
281 return;
282
283#ifdef CONFIG_LED
284 ret = get_led(&led, "u-boot,error-led");
285 if (!ret) {
286 /* make u-boot,error-led blinking */
287 /* if U32_MAX and 125ms interval, for 17.02 years */
288 for (i = 0; i < 2 * nb_blink; i++) {
289 led_set_state(led, LEDST_TOGGLE);
290 mdelay(125);
291 WATCHDOG_RESET();
292 }
293 }
294#endif
295
296 /* infinite: the boot process must be stopped */
297 if (nb_blink == U32_MAX)
298 hang();
299}
Patrice Chotard204079b2018-08-10 17:12:14 +0200300
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200301#ifdef CONFIG_ADC
Patrice Chotard879cde52019-02-12 16:50:40 +0100302static int board_check_usb_power(void)
303{
304 struct ofnode_phandle_args adc_args;
305 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100306 ofnode node;
307 unsigned int raw;
308 int max_uV = 0;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200309 int min_uV = USB_START_HIGH_THRESHOLD_UV;
Patrice Chotard879cde52019-02-12 16:50:40 +0100310 int ret, uV, adc_count;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200311 u32 nb_blink;
312 u8 i;
Patrice Chotard879cde52019-02-12 16:50:40 +0100313 node = ofnode_path("/config");
314 if (!ofnode_valid(node)) {
315 debug("%s: no /config node?\n", __func__);
316 return -ENOENT;
317 }
318
319 /*
320 * Retrieve the ADC channels devices and get measurement
321 * for each of them
322 */
323 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
324 "#io-channel-cells");
325 if (adc_count < 0) {
326 if (adc_count == -ENOENT)
327 return 0;
328
329 pr_err("%s: can't find adc channel (%d)\n", __func__,
330 adc_count);
331
332 return adc_count;
333 }
334
335 for (i = 0; i < adc_count; i++) {
336 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
337 "#io-channel-cells", 0, i,
338 &adc_args)) {
339 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
340 __func__);
341 return 0;
342 }
343
344 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
345 &adc);
346
347 if (ret) {
348 pr_err("%s: Can't get adc device(%d)\n", __func__,
349 ret);
350 return ret;
351 }
352
353 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
354 &raw);
355 if (ret) {
356 pr_err("%s: single shot failed for %s[%d]!\n",
357 __func__, adc->name, adc_args.args[0]);
358 return ret;
359 }
360 /* Convert to uV */
361 if (!adc_raw_to_uV(adc, raw, &uV)) {
362 if (uV > max_uV)
363 max_uV = uV;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200364 if (uV < min_uV)
365 min_uV = uV;
Patrice Chotard879cde52019-02-12 16:50:40 +0100366 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
367 adc->name, adc_args.args[0], raw, uV);
368 } else {
369 pr_err("%s: Can't get uV value for %s[%d]\n",
370 __func__, adc->name, adc_args.args[0]);
371 }
372 }
373
374 /*
375 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
376 * board is plugged on an USB-C 3A power supply and boot process can
377 * continue.
378 */
379 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
Patrice Chotardcded32f2019-04-30 18:09:38 +0200380 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
381 min_uV <= USB_LOW_THRESHOLD_UV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100382 return 0;
383
Patrice Chotardcded32f2019-04-30 18:09:38 +0200384 pr_err("****************************************************\n");
385
386 /*
387 * If highest and lowest value are either both below
388 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
389 * means USB TYPE-C is in unattached mode, this is an issue, make
390 * u-boot,error-led blinking and stop boot process.
391 */
392 if ((max_uV > USB_LOW_THRESHOLD_UV &&
393 min_uV > USB_LOW_THRESHOLD_UV) ||
394 (max_uV <= USB_LOW_THRESHOLD_UV &&
395 min_uV <= USB_LOW_THRESHOLD_UV)) {
396 pr_err("* ERROR USB TYPE-C connection in unattached mode *\n");
397 pr_err("* Check that USB TYPE-C cable is correctly plugged *\n");
398 /* with 125ms interval, led will blink for 17.02 years ....*/
399 nb_blink = U32_MAX;
400 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100401
Patrice Chotardcded32f2019-04-30 18:09:38 +0200402 if (max_uV > USB_LOW_THRESHOLD_UV &&
403 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
404 min_uV <= USB_LOW_THRESHOLD_UV) {
405 pr_err("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100406 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200407 }
408
409 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
410 max_uV <= USB_START_LOW_THRESHOLD_UV &&
411 min_uV <= USB_LOW_THRESHOLD_UV) {
412 pr_err("* WARNING 1.5mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100413 nb_blink = 3;
414 }
415
Patrice Chotardcded32f2019-04-30 18:09:38 +0200416 /*
417 * If highest value is above 2.15 Volts that means that the USB TypeC
418 * supplies more than 3 Amp, this is not compliant with TypeC specification
419 */
420 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
421 pr_err("* USB TYPE-C charger not compliant with *\n");
422 pr_err("* specification *\n");
423 pr_err("****************************************************\n\n");
424 /* with 125ms interval, led will blink for 17.02 years ....*/
425 nb_blink = U32_MAX;
426 } else {
427 pr_err("* Current too low, use a 3A power supply! *\n");
428 pr_err("****************************************************\n\n");
429 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100430
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200431 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100432
433 return 0;
434}
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200435#endif /* CONFIG_ADC */
Patrice Chotard879cde52019-02-12 16:50:40 +0100436
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100437static void sysconf_init(void)
438{
439#ifndef CONFIG_STM32MP1_TRUSTED
440 u8 *syscfg;
441#ifdef CONFIG_DM_REGULATOR
442 struct udevice *pwr_dev;
443 struct udevice *pwr_reg;
444 struct udevice *dev;
445 int ret;
446 u32 otp = 0;
447#endif
448 u32 bootr;
449
450 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
451
452 /* interconnect update : select master using the port 1 */
453 /* LTDC = AXI_M9 */
454 /* GPU = AXI_M8 */
455 /* today information is hardcoded in U-Boot */
456 writel(BIT(9), syscfg + SYSCFG_ICNR);
457
458 /* disable Pull-Down for boot pin connected to VDD */
459 bootr = readl(syscfg + SYSCFG_BOOTR);
460 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
461 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
462 writel(bootr, syscfg + SYSCFG_BOOTR);
463
464#ifdef CONFIG_DM_REGULATOR
465 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
466 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
467 * The customer will have to disable this for low frequencies
468 * or if AFMUX is selected but the function not used, typically for
469 * TRACE. Otherwise, impact on power consumption.
470 *
471 * WARNING:
472 * enabling High Speed mode while VDD>2.7V
473 * with the OTP product_below_2v5 (OTP 18, BIT 13)
474 * erroneously set to 1 can damage the IC!
475 * => U-Boot set the register only if VDD < 2.7V (in DT)
476 * but this value need to be consistent with board design
477 */
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200478 ret = uclass_get_device_by_driver(UCLASS_PMIC,
479 DM_GET_DRIVER(stm32mp_pwr_pmic),
480 &pwr_dev);
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100481 if (!ret) {
482 ret = uclass_get_device_by_driver(UCLASS_MISC,
483 DM_GET_DRIVER(stm32mp_bsec),
484 &dev);
485 if (ret) {
486 pr_err("Can't find stm32mp_bsec driver\n");
487 return;
488 }
489
490 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayceb82e32019-08-02 13:08:06 +0200491 if (ret > 0)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100492 otp = otp & BIT(13);
493
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200494 /* get VDD = vdd-supply */
495 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100496 &pwr_reg);
497
498 /* check if VDD is Low Voltage */
499 if (!ret) {
500 if (regulator_get_value(pwr_reg) < 2700000) {
501 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
502 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
503 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
504 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
505 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
506 syscfg + SYSCFG_IOCTRLSETR);
507
508 if (!otp)
509 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
510 } else {
511 if (otp)
512 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
513 }
514 } else {
515 debug("VDD unknown");
516 }
517 }
518#endif
519
520 /* activate automatic I/O compensation
521 * warning: need to ensure CSI enabled and ready in clock driver
522 */
523 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
524
525 while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
526 ;
527 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
528#endif
529}
530
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200531#ifdef CONFIG_DM_REGULATOR
532/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
533static int dk2_i2c1_fix(void)
534{
535 ofnode node;
536 struct gpio_desc hdmi, audio;
537 int ret = 0;
538
539 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
540 if (!ofnode_valid(node)) {
541 pr_debug("%s: no hdmi-transmitter@39 ?\n", __func__);
542 return -ENOENT;
543 }
544
545 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
546 &hdmi, GPIOD_IS_OUT)) {
547 pr_debug("%s: could not find reset-gpios\n",
548 __func__);
549 return -ENOENT;
550 }
551
552 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
553 if (!ofnode_valid(node)) {
554 pr_debug("%s: no cs42l51@4a ?\n", __func__);
555 return -ENOENT;
556 }
557
558 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
559 &audio, GPIOD_IS_OUT)) {
560 pr_debug("%s: could not find reset-gpios\n",
561 __func__);
562 return -ENOENT;
563 }
564
565 /* before power up, insure that HDMI and AUDIO IC is under reset */
566 ret = dm_gpio_set_value(&hdmi, 1);
567 if (ret) {
568 pr_err("%s: can't set_value for hdmi_nrst gpio", __func__);
569 goto error;
570 }
571 ret = dm_gpio_set_value(&audio, 1);
572 if (ret) {
573 pr_err("%s: can't set_value for audio_nrst gpio", __func__);
574 goto error;
575 }
576
577 /* power-up audio IC */
578 regulator_autoset_by_name("v1v8_audio", NULL);
579
580 /* power-up HDMI IC */
581 regulator_autoset_by_name("v1v2_hdmi", NULL);
582 regulator_autoset_by_name("v3v3_hdmi", NULL);
583
584error:
585 return ret;
586}
587
588static bool board_is_dk2(void)
589{
590 if (CONFIG_IS_ENABLED(TARGET_STM32MP157C_DK2) &&
591 of_machine_is_compatible("st,stm32mp157c-dk2"))
592 return true;
593
594 return false;
595}
596#endif
597
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100598/* board dependent setup after realloc */
599int board_init(void)
600{
Patrice Chotard972723a2019-03-11 11:13:17 +0100601 struct udevice *dev;
602
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100603 /* address of boot parameters */
604 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
605
Patrice Chotard972723a2019-03-11 11:13:17 +0100606 /* probe all PINCTRL for hog */
607 for (uclass_first_device(UCLASS_PINCTRL, &dev);
608 dev;
609 uclass_next_device(&dev)) {
610 pr_debug("probe pincontrol = %s\n", dev->name);
611 }
612
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100613 board_key_check();
614
Patrick Delaunay6519e442019-07-05 17:20:09 +0200615#ifdef CONFIG_DM_REGULATOR
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200616 if (board_is_dk2())
617 dk2_i2c1_fix();
618
Patrick Delaunay6519e442019-07-05 17:20:09 +0200619 regulators_enable_boot_on(_DEBUG);
620#endif
621
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100622 sysconf_init();
623
Patrick Delaunay7a3e4422019-07-30 19:16:40 +0200624 if (CONFIG_IS_ENABLED(CONFIG_LED))
Patrick Delaunay36e3d112018-07-27 16:37:08 +0200625 led_default_state();
626
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100627 return 0;
628}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100629
630int board_late_init(void)
631{
Patrick Delaunayf2451262019-07-30 19:16:41 +0200632 char *boot_device;
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100633#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
634 const void *fdt_compat;
635 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200636 int ret;
637 u32 otp;
638 struct udevice *dev;
639 char buf[10];
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100640
641 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
642 &fdt_compat_len);
643 if (fdt_compat && fdt_compat_len) {
644 if (strncmp(fdt_compat, "st,", 3) != 0)
645 env_set("board_name", fdt_compat);
646 else
647 env_set("board_name", fdt_compat + 3);
648 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200649 ret = uclass_get_device_by_driver(UCLASS_MISC,
650 DM_GET_DRIVER(stm32mp_bsec),
651 &dev);
652
653 if (!ret)
654 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
655 &otp, sizeof(otp));
656 if (!ret && otp) {
657 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
658 env_set("board_id", buf);
659
660 snprintf(buf, sizeof(buf), "0x%04x",
661 ((otp >> 8) & 0xF) - 1 + 0xA);
662 env_set("board_rev", buf);
663 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100664#endif
665
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200666#ifdef CONFIG_ADC
Patrice Chotard879cde52019-02-12 16:50:40 +0100667 /* for DK1/DK2 boards */
668 board_check_usb_power();
Patrick Delaunayf6626e72019-07-30 19:16:43 +0200669#endif /* CONFIG_ADC */
Patrice Chotard879cde52019-02-12 16:50:40 +0100670
Patrick Delaunayf2451262019-07-30 19:16:41 +0200671 /* Check the boot-source to disable bootdelay */
672 boot_device = env_get("boot_device");
673 if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
674 env_set("bootdelay", "0");
675
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100676 return 0;
677}
Patrice Chotard879cde52019-02-12 16:50:40 +0100678
679void board_quiesce_devices(void)
680{
Patrick Delaunay7a3e4422019-07-30 19:16:40 +0200681#ifdef CONFIG_LED
Patrice Chotard879cde52019-02-12 16:50:40 +0100682 setup_led(LEDST_OFF);
Patrick Delaunay7a3e4422019-07-30 19:16:40 +0200683#endif
Patrice Chotard879cde52019-02-12 16:50:40 +0100684}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200685
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200686/* board interface eth init */
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200687int board_interface_eth_init(phy_interface_t interface_type,
688 bool eth_clk_sel_reg, bool eth_ref_clk_sel_reg)
689{
690 u8 *syscfg;
691 u32 value;
692
693 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
694
695 if (!syscfg)
696 return -ENODEV;
697
698 switch (interface_type) {
699 case PHY_INTERFACE_MODE_MII:
700 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
701 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
702 debug("%s: PHY_INTERFACE_MODE_MII\n", __func__);
703 break;
704 case PHY_INTERFACE_MODE_GMII:
705 if (eth_clk_sel_reg)
706 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
707 SYSCFG_PMCSETR_ETH_CLK_SEL;
708 else
709 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
710 debug("%s: PHY_INTERFACE_MODE_GMII\n", __func__);
711 break;
712 case PHY_INTERFACE_MODE_RMII:
713 if (eth_ref_clk_sel_reg)
714 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
715 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
716 else
717 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
718 debug("%s: PHY_INTERFACE_MODE_RMII\n", __func__);
719 break;
720 case PHY_INTERFACE_MODE_RGMII:
721 case PHY_INTERFACE_MODE_RGMII_ID:
722 case PHY_INTERFACE_MODE_RGMII_RXID:
723 case PHY_INTERFACE_MODE_RGMII_TXID:
724 if (eth_clk_sel_reg)
725 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
726 SYSCFG_PMCSETR_ETH_CLK_SEL;
727 else
728 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
729 debug("%s: PHY_INTERFACE_MODE_RGMII\n", __func__);
730 break;
731 default:
732 debug("%s: Do not manage %d interface\n",
733 __func__, interface_type);
734 /* Do not manage others interfaces */
735 return -EINVAL;
736 }
737
738 /* clear and set ETH configuration bits */
739 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
740 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
741 syscfg + SYSCFG_PMCCLRR);
742 writel(value, syscfg + SYSCFG_PMCSETR);
743
744 return 0;
745}
746
Patrice Chotard34320372019-05-02 18:28:05 +0200747enum env_location env_get_location(enum env_operation op, int prio)
748{
749 u32 bootmode = get_bootmode();
750
751 if (prio)
752 return ENVL_UNKNOWN;
753
754 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
755#ifdef CONFIG_ENV_IS_IN_EXT4
756 case BOOT_FLASH_SD:
757 case BOOT_FLASH_EMMC:
758 return ENVL_EXT4;
759#endif
760#ifdef CONFIG_ENV_IS_IN_UBI
761 case BOOT_FLASH_NAND:
762 return ENVL_UBI;
763#endif
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200764#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
765 case BOOT_FLASH_NOR:
766 return ENVL_SPI_FLASH;
767#endif
Patrice Chotard34320372019-05-02 18:28:05 +0200768 default:
769 return ENVL_NOWHERE;
770 }
771}
772
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200773#if defined(CONFIG_ENV_IS_IN_EXT4)
774const char *env_ext4_get_intf(void)
775{
776 u32 bootmode = get_bootmode();
777
778 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
779 case BOOT_FLASH_SD:
780 case BOOT_FLASH_EMMC:
781 return "mmc";
782 default:
783 return "";
784 }
785}
786
787const char *env_ext4_get_dev_part(void)
788{
789 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
790 u32 bootmode = get_bootmode();
791
792 return dev_part[(bootmode & TAMP_BOOT_INSTANCE_MASK) - 1];
793}
794#endif
795
Patrice Chotard41443cf2019-05-02 18:07:14 +0200796#ifdef CONFIG_SYS_MTDPARTS_RUNTIME
797
798#define MTDPARTS_LEN 256
799#define MTDIDS_LEN 128
800
801/**
802 * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
803 * If we need to access it before the env is relocated, then we need
804 * to use our own stack buffer. gd->env_buf will be too small.
805 *
806 * @param buf temporary buffer pointer MTDPARTS_LEN long
807 * @return mtdparts variable string, NULL if not found
808 */
809static const char *env_get_mtdparts(const char *str, char *buf)
810{
811 if (gd->flags & GD_FLG_ENV_READY)
812 return env_get(str);
813 if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
814 return buf;
815
816 return NULL;
817}
818
819/**
820 * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
821 */
822static void board_get_mtdparts(const char *dev,
823 char *mtdids,
824 char *mtdparts)
825{
826 char env_name[32] = "mtdparts_";
827 char tmp_mtdparts[MTDPARTS_LEN];
828 const char *tmp;
829
830 /* name of env variable to read = mtdparts_<dev> */
831 strcat(env_name, dev);
832 tmp = env_get_mtdparts(env_name, tmp_mtdparts);
833 if (tmp) {
834 /* mtdids: "<dev>=<dev>, ...." */
835 if (mtdids[0] != '\0')
836 strcat(mtdids, ",");
837 strcat(mtdids, dev);
838 strcat(mtdids, "=");
839 strcat(mtdids, dev);
840
841 /* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
842 if (mtdparts[0] != '\0')
843 strncat(mtdparts, ";", MTDPARTS_LEN);
844 else
845 strcat(mtdparts, "mtdparts=");
846 strncat(mtdparts, dev, MTDPARTS_LEN);
847 strncat(mtdparts, ":", MTDPARTS_LEN);
848 strncat(mtdparts, tmp, MTDPARTS_LEN);
849 }
850}
851
852void board_mtdparts_default(const char **mtdids, const char **mtdparts)
853{
854 struct udevice *dev;
855 static char parts[2 * MTDPARTS_LEN + 1];
856 static char ids[MTDIDS_LEN + 1];
857 static bool mtd_initialized;
858
859 if (mtd_initialized) {
860 *mtdids = ids;
861 *mtdparts = parts;
862 return;
863 }
864
865 memset(parts, 0, sizeof(parts));
866 memset(ids, 0, sizeof(ids));
867
868 if (!uclass_get_device(UCLASS_MTD, 0, &dev))
869 board_get_mtdparts("nand0", ids, parts);
870
871 if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
872 board_get_mtdparts("nor0", ids, parts);
873
874 mtd_initialized = true;
875 *mtdids = ids;
876 *mtdparts = parts;
877 debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
878}
879#endif
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200880
881#if defined(CONFIG_OF_BOARD_SETUP)
882int ft_board_setup(void *blob, bd_t *bd)
883{
884#ifdef CONFIG_FDT_FIXUP_PARTITIONS
885 struct node_info nodes[] = {
886 { "st,stm32f469-qspi", MTD_DEV_TYPE_NOR, },
887 { "st,stm32mp15-fmc2", MTD_DEV_TYPE_NAND, },
888 };
889 fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
890#endif
891
892 return 0;
893}
894#endif
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200895
896static void board_copro_image_process(ulong fw_image, size_t fw_size)
897{
898 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
899
900 if (!rproc_is_initialized())
901 if (rproc_init()) {
902 printf("Remote Processor %d initialization failed\n",
903 id);
904 return;
905 }
906
907 ret = rproc_load(id, fw_image, fw_size);
908 printf("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
909 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
910
911 if (!ret) {
912 rproc_start(id);
913 env_set("copro_state", "booted");
914 }
915}
916
917U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);