blob: 4157374d21d68689b2613e135f758a2a5e7948ce [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Simon Glass437e2b82012-02-23 03:28:41 +00002/*
3 * Copyright (c) 2004-2008 Texas Instruments
4 *
5 * (C) Copyright 2002
6 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
Simon Glass437e2b82012-02-23 03:28:41 +00007 */
8
Marc Zyngierc0451ec2014-07-12 14:24:02 +01009#include <config.h>
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080010#include <asm/psci.h>
Marc Zyngierc0451ec2014-07-12 14:24:02 +010011
Simon Glass437e2b82012-02-23 03:28:41 +000012OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
13OUTPUT_ARCH(arm)
14ENTRY(_start)
15SECTIONS
16{
Simon Glass3e2c91c2016-03-13 19:07:29 -060017#ifndef CONFIG_CMDLINE
18 /DISCARD/ : { *(.u_boot_list_2_cmd_*) }
19#endif
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080020#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
Peng Fan2e9e9a82015-10-23 10:13:03 +080021 /*
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080022 * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
23 * bundle with u-boot, and code offsets are fixed. Secure zone
24 * only needs to be copied from the loading address to
25 * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
26 * address for secure code.
Peng Fan2e9e9a82015-10-23 10:13:03 +080027 *
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080028 * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
29 * be included in u-boot address space, and some absolute address
30 * were used in secure code. The absolute addresses of the secure
31 * code also needs to be relocated along with the accompanying u-boot
32 * code.
33 *
34 * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
Peng Fan2e9e9a82015-10-23 10:13:03 +080035 */
36 /DISCARD/ : { *(.rel._secure*) }
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080037#endif
Simon Glass437e2b82012-02-23 03:28:41 +000038 . = 0x00000000;
39
40 . = ALIGN(4);
41 .text :
42 {
Albert ARIBAUDc53687e2013-06-11 14:17:33 +020043 *(.__image_copy_start)
Albert ARIBAUD9852cc62014-04-15 16:13:51 +020044 *(.vectors)
Stephen Warrenadddf452012-10-22 06:19:32 +000045 CPUDIR/start.o (.text*)
46 *(.text*)
Simon Glass437e2b82012-02-23 03:28:41 +000047 }
Marc Zyngierc0451ec2014-07-12 14:24:02 +010048
Jan Kiszkaac31b5a2015-04-21 07:18:24 +020049#ifdef CONFIG_ARMV7_NONSEC
Marc Zyngierc0451ec2014-07-12 14:24:02 +010050
Chen-Yu Tsai277a8f62016-06-19 12:38:34 +080051 /* Align the secure section only if we're going to use it in situ */
52 .__secure_start :
53#ifndef CONFIG_ARMV7_SECURE_BASE
54 ALIGN(CONSTANT(COMMONPAGESIZE))
55#endif
56 {
57 KEEP(*(.__secure_start))
58 }
59
Marc Zyngierc0451ec2014-07-12 14:24:02 +010060#ifndef CONFIG_ARMV7_SECURE_BASE
61#define CONFIG_ARMV7_SECURE_BASE
Chen-Yu Tsai72a48002016-06-07 10:54:27 +080062#define __ARMV7_PSCI_STACK_IN_RAM
Marc Zyngierc0451ec2014-07-12 14:24:02 +010063#endif
64
Marc Zyngierc0451ec2014-07-12 14:24:02 +010065 .secure_text CONFIG_ARMV7_SECURE_BASE :
66 AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
67 {
68 *(._secure.text)
69 }
70
Chen-Yu Tsai5ed03872016-07-05 21:45:06 +080071 .secure_data : AT(LOADADDR(.secure_text) + SIZEOF(.secure_text))
72 {
73 *(._secure.data)
74 }
75
Masahiro Yamada2aa46c02016-09-26 14:21:30 +090076#ifdef CONFIG_ARMV7_PSCI
Chen-Yu Tsai5ed03872016-07-05 21:45:06 +080077 .secure_stack ALIGN(ADDR(.secure_data) + SIZEOF(.secure_data),
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080078 CONSTANT(COMMONPAGESIZE)) (NOLOAD) :
Chen-Yu Tsai72a48002016-06-07 10:54:27 +080079#ifdef __ARMV7_PSCI_STACK_IN_RAM
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080080 AT(ADDR(.secure_stack))
81#else
Chen-Yu Tsai5ed03872016-07-05 21:45:06 +080082 AT(LOADADDR(.secure_data) + SIZEOF(.secure_data))
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080083#endif
84 {
85 KEEP(*(.__secure_stack_start))
Masahiro Yamada2aa46c02016-09-26 14:21:30 +090086
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080087 /* Skip addreses for stack */
88 . = . + CONFIG_ARMV7_PSCI_NR_CPUS * ARM_PSCI_STACK_SIZE;
Masahiro Yamada2aa46c02016-09-26 14:21:30 +090089
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080090 /* Align end of stack section to page boundary */
91 . = ALIGN(CONSTANT(COMMONPAGESIZE));
92
93 KEEP(*(.__secure_stack_end))
Chen-Yu Tsai3de210c2016-06-19 12:38:39 +080094
95#ifdef CONFIG_ARMV7_SECURE_MAX_SIZE
96 /*
97 * We are not checking (__secure_end - __secure_start) here,
98 * as these are the load addresses, and do not include the
99 * stack section. Instead, use the end of the stack section
100 * and the start of the text section.
101 */
102 ASSERT((. - ADDR(.secure_text)) <= CONFIG_ARMV7_SECURE_MAX_SIZE,
103 "Error: secure section exceeds secure memory size");
104#endif
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +0800105 }
106
107#ifndef __ARMV7_PSCI_STACK_IN_RAM
108 /* Reset VMA but don't allocate space if we have secure SRAM */
109 . = LOADADDR(.secure_stack);
Chen-Yu Tsai72a48002016-06-07 10:54:27 +0800110#endif
111
Masahiro Yamada2aa46c02016-09-26 14:21:30 +0900112#endif
113
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +0800114 .__secure_end : AT(ADDR(.__secure_end)) {
Marc Zyngierc0451ec2014-07-12 14:24:02 +0100115 *(.__secure_end)
116 LONG(0x1d1071c); /* Must output something to reset LMA */
117 }
118#endif
Simon Glass437e2b82012-02-23 03:28:41 +0000119
120 . = ALIGN(4);
121 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
122
123 . = ALIGN(4);
124 .data : {
Stephen Warrenadddf452012-10-22 06:19:32 +0000125 *(.data*)
Simon Glass437e2b82012-02-23 03:28:41 +0000126 }
127
128 . = ALIGN(4);
129
130 . = .;
Simon Glass437e2b82012-02-23 03:28:41 +0000131
132 . = ALIGN(4);
Marek Vasut607092a2012-10-12 10:27:03 +0000133 .u_boot_list : {
Albert ARIBAUDc24895e2013-02-25 00:59:00 +0000134 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +0000135 }
136
137 . = ALIGN(4);
Simon Glass437e2b82012-02-23 03:28:41 +0000138
Alexander Graf0bd425a2016-03-04 01:10:01 +0100139 .__efi_runtime_start : {
140 *(.__efi_runtime_start)
141 }
142
143 .efi_runtime : {
144 *(efi_runtime_text)
145 *(efi_runtime_data)
146 }
147
148 .__efi_runtime_stop : {
149 *(.__efi_runtime_stop)
150 }
151
152 .efi_runtime_rel_start :
153 {
154 *(.__efi_runtime_rel_start)
155 }
156
157 .efi_runtime_rel : {
158 *(.relefi_runtime_text)
159 *(.relefi_runtime_data)
160 }
161
162 .efi_runtime_rel_stop :
163 {
164 *(.__efi_runtime_rel_stop)
165 }
166
Tom Rini06ca0cf2017-06-14 09:13:21 -0400167 . = ALIGN(4);
Alexander Graf0bd425a2016-03-04 01:10:01 +0100168
Albert ARIBAUDc53687e2013-06-11 14:17:33 +0200169 .image_copy_end :
170 {
171 *(.__image_copy_end)
172 }
Simon Glass437e2b82012-02-23 03:28:41 +0000173
Albert ARIBAUDaf3ff162013-06-11 14:17:34 +0200174 .rel_dyn_start :
175 {
176 *(.__rel_dyn_start)
177 }
178
Simon Glass437e2b82012-02-23 03:28:41 +0000179 .rel.dyn : {
Simon Glass437e2b82012-02-23 03:28:41 +0000180 *(.rel*)
Albert ARIBAUDaf3ff162013-06-11 14:17:34 +0200181 }
182
183 .rel_dyn_end :
184 {
185 *(.__rel_dyn_end)
Simon Glass437e2b82012-02-23 03:28:41 +0000186 }
187
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +0100188 .end :
189 {
190 *(.__end)
191 }
192
193 _image_binary_end = .;
Simon Glass437e2b82012-02-23 03:28:41 +0000194
195 /*
196 * Deprecated: this MMU section is used by pxa at present but
197 * should not be used by new boards/CPUs.
198 */
199 . = ALIGN(4096);
200 .mmutable : {
201 *(.mmutable)
202 }
203
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000204/*
205 * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
206 * __bss_base and __bss_limit are for linker only (overlay ordering)
207 */
208
Albert ARIBAUD436f6322013-02-25 00:58:59 +0000209 .bss_start __rel_dyn_start (OVERLAY) : {
210 KEEP(*(.__bss_start));
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000211 __bss_base = .;
Albert ARIBAUD436f6322013-02-25 00:58:59 +0000212 }
213
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000214 .bss __bss_base (OVERLAY) : {
Stephen Warrenadddf452012-10-22 06:19:32 +0000215 *(.bss*)
Simon Glass437e2b82012-02-23 03:28:41 +0000216 . = ALIGN(4);
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000217 __bss_limit = .;
Albert ARIBAUD436f6322013-02-25 00:58:59 +0000218 }
Tom Rini19aac972013-03-18 12:31:00 -0400219
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000220 .bss_end __bss_limit (OVERLAY) : {
221 KEEP(*(.__bss_end));
Simon Glass437e2b82012-02-23 03:28:41 +0000222 }
223
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +0100224 .dynsym _image_binary_end : { *(.dynsym) }
Albert ARIBAUD95fc6d62013-11-07 14:21:46 +0100225 .dynbss : { *(.dynbss) }
226 .dynstr : { *(.dynstr*) }
227 .dynamic : { *(.dynamic*) }
228 .plt : { *(.plt*) }
229 .interp : { *(.interp*) }
Andreas Färber438a1672014-01-27 05:48:11 +0100230 .gnu.hash : { *(.gnu.hash) }
Albert ARIBAUD95fc6d62013-11-07 14:21:46 +0100231 .gnu : { *(.gnu*) }
232 .ARM.exidx : { *(.ARM.exidx*) }
Albert ARIBAUDddadbed2014-01-13 14:57:05 +0100233 .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
Simon Glass437e2b82012-02-23 03:28:41 +0000234}