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wdenk64519362004-07-11 17:40:54 +00001/*
wdenka5948882005-03-27 23:41:39 +00002 * (C) Copyright 2003-2005
wdenk64519362004-07-11 17:40:54 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkc98368a2006-07-19 17:52:30 +02005 * (C) Copyright 2004-2006
wdenk64519362004-07-11 17:40:54 +00006 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
wdenk64519362004-07-11 17:40:54 +000030/*
31 * High Level Configuration Options
32 * (easy to change)
33 */
34
Wolfgang Denk99753142006-07-21 11:16:34 +020035#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
37#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
38#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
wdenk64519362004-07-11 17:40:54 +000039
Wolfgang Denk9018bc92006-08-18 23:27:33 +020040/* On a Cameron or on a FO300 board or ... */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020041#if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
Wolfgang Denk99753142006-07-21 11:16:34 +020042#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
43#endif
44
45#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
wdenk64519362004-07-11 17:40:54 +000046
Wolfgang Denk99753142006-07-21 11:16:34 +020047#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
48#define BOOTFLAG_WARM 0x02 /* Software reboot */
wdenk64519362004-07-11 17:40:54 +000049
Wolfgang Denk99753142006-07-21 11:16:34 +020050#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
wdenk64519362004-07-11 17:40:54 +000051#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
Wolfgang Denk99753142006-07-21 11:16:34 +020052# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
wdenk64519362004-07-11 17:40:54 +000053#endif
54
55/*
56 * Serial console configuration
57 */
Wolfgang Denk99753142006-07-21 11:16:34 +020058#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
59#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
wdenk64519362004-07-11 17:40:54 +000060#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
61
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020062#ifdef CONFIG_FO300
63#define CFG_DEVICE_NULLDEV 1 /* enable null device */
64#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
65#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
Bartlomiej Sieka9d47ad42006-08-22 10:38:18 +020066#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020067#if 0
68#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
69 /* switch is closed */
70#endif
71
72#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
73 /* switch is open */
Wolfgang Denk9018bc92006-08-18 23:27:33 +020074#endif /* CONFIG_FO300 */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020075
wdenkdc130442004-12-12 22:06:17 +000076#ifdef CONFIG_STK52XX
77#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
78#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
79#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
80#define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
81#define CONFIG_BOARD_EARLY_INIT_R
82#endif /* CONFIG_STK52XX */
wdenk64519362004-07-11 17:40:54 +000083
wdenk64519362004-07-11 17:40:54 +000084/*
85 * PCI Mapping:
86 * 0x40000000 - 0x4fffffff - PCI Memory
87 * 0x50000000 - 0x50ffffff - PCI IO Space
88 */
wdenkdc130442004-12-12 22:06:17 +000089#ifdef CONFIG_STK52XX
90#define CONFIG_PCI 1
wdenk64519362004-07-11 17:40:54 +000091#define CONFIG_PCI_PNP 1
wdenk79cf7572004-08-28 21:09:14 +000092/* #define CONFIG_PCI_SCAN_SHOW 1 */
wdenk64519362004-07-11 17:40:54 +000093
94#define CONFIG_PCI_MEM_BUS 0x40000000
95#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
96#define CONFIG_PCI_MEM_SIZE 0x10000000
97
98#define CONFIG_PCI_IO_BUS 0x50000000
99#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
100#define CONFIG_PCI_IO_SIZE 0x01000000
101
102#define CONFIG_NET_MULTI 1
Wolfgang Denk3f2f9dd2006-06-16 16:11:34 +0200103#define CONFIG_EEPRO100 1
wdenk64519362004-07-11 17:40:54 +0000104#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
105#define CONFIG_NS8382X 1
wdenk61c636e2005-03-31 18:42:15 +0000106#endif /* CONFIG_STK52XX */
wdenk64519362004-07-11 17:40:54 +0000107
wdenka5948882005-03-27 23:41:39 +0000108#ifdef CONFIG_PCI
wdenkdc130442004-12-12 22:06:17 +0000109#define ADD_PCI_CMD CFG_CMD_PCI
wdenka5948882005-03-27 23:41:39 +0000110#else
wdenkdc130442004-12-12 22:06:17 +0000111#define ADD_PCI_CMD 0
112#endif
wdenk64519362004-07-11 17:40:54 +0000113
wdenka5948882005-03-27 23:41:39 +0000114/*
115 * Video console
116 */
Wolfgang Denk99753142006-07-21 11:16:34 +0200117#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
wdenka5948882005-03-27 23:41:39 +0000118#define CONFIG_VIDEO
119#define CONFIG_VIDEO_SM501
120#define CONFIG_VIDEO_SM501_32BPP
121#define CONFIG_CFB_CONSOLE
122#define CONFIG_VIDEO_LOGO
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200123
124#ifndef CONFIG_FO300
wdenka5948882005-03-27 23:41:39 +0000125#define CONFIG_CONSOLE_EXTRA_INFO
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200126#else
127#define CONFIG_VIDEO_BMP_LOGO
128#endif
129
130#define CONFIG_VGA_AS_SINGLE_DEVICE
wdenka5948882005-03-27 23:41:39 +0000131#define CONFIG_VIDEO_SW_CURSOR
132#define CONFIG_SPLASH_SCREEN
wdenk61c636e2005-03-31 18:42:15 +0000133#define CFG_CONSOLE_IS_IN_ENV
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200134#endif /* #ifndef CONFIG_TQM5200S */
wdenk64519362004-07-11 17:40:54 +0000135
wdenka5948882005-03-27 23:41:39 +0000136#ifdef CONFIG_VIDEO
137#define ADD_BMP_CMD CFG_CMD_BMP
138#else
139#define ADD_BMP_CMD 0
wdenk64519362004-07-11 17:40:54 +0000140#endif
141
142/* Partitions */
wdenk8d3d9ed2005-03-16 16:32:26 +0000143#define CONFIG_MAC_PARTITION
wdenk64519362004-07-11 17:40:54 +0000144#define CONFIG_DOS_PARTITION
wdenka5948882005-03-27 23:41:39 +0000145#define CONFIG_ISO_PARTITION
wdenk64519362004-07-11 17:40:54 +0000146
147/* USB */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200148#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
wdenk64519362004-07-11 17:40:54 +0000149#define CONFIG_USB_OHCI
wdenk7dd13292004-07-11 20:04:51 +0000150#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
wdenk64519362004-07-11 17:40:54 +0000151#define CONFIG_USB_STORAGE
152#else
wdenk7dd13292004-07-11 20:04:51 +0000153#define ADD_USB_CMD 0
wdenk64519362004-07-11 17:40:54 +0000154#endif
155
Wolfgang Denk641e3572006-07-22 01:20:03 +0200156#ifndef CONFIG_CAM5200
wdenk64519362004-07-11 17:40:54 +0000157/* POST support */
158#define CONFIG_POST (CFG_POST_MEMORY | \
159 CFG_POST_CPU | \
160 CFG_POST_I2C)
Wolfgang Denk99753142006-07-21 11:16:34 +0200161#endif
wdenk64519362004-07-11 17:40:54 +0000162
163#ifdef CONFIG_POST
164#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
165/* preserve space for the post_word at end of on-chip SRAM */
166#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
167#else
168#define CFG_CMD_POST_DIAG 0
169#endif
170
171/* IDE */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200172#if defined (CONFIG_MINIFAP) || defined (CONFIG_STK52XX) || defined(CONFIG_FO300)
wdenk99408ba2005-02-24 22:44:16 +0000173#define ADD_IDE_CMD (CFG_CMD_IDE | CFG_CMD_FAT | CFG_CMD_EXT2)
wdenk64519362004-07-11 17:40:54 +0000174#else
175#define ADD_IDE_CMD 0
176#endif
177
178/*
179 * Supported commands
180 */
181#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
wdenka5948882005-03-27 23:41:39 +0000182 ADD_BMP_CMD | \
wdenk99408ba2005-02-24 22:44:16 +0000183 ADD_IDE_CMD | \
wdenk64519362004-07-11 17:40:54 +0000184 ADD_PCI_CMD | \
185 ADD_USB_CMD | \
wdenk99408ba2005-02-24 22:44:16 +0000186 CFG_CMD_ASKENV | \
wdenk64519362004-07-11 17:40:54 +0000187 CFG_CMD_DATE | \
wdenk99408ba2005-02-24 22:44:16 +0000188 CFG_CMD_DHCP | \
wdenk99408ba2005-02-24 22:44:16 +0000189 CFG_CMD_EEPROM | \
190 CFG_CMD_I2C | \
Wolfgang Denkcc1850e2005-08-23 22:27:41 +0200191 CFG_CMD_JFFS2 | \
wdenk64519362004-07-11 17:40:54 +0000192 CFG_CMD_MII | \
wdenk8d5d28a2005-04-02 22:37:54 +0000193 CFG_CMD_NFS | \
wdenk64519362004-07-11 17:40:54 +0000194 CFG_CMD_PING | \
wdenk99408ba2005-02-24 22:44:16 +0000195 CFG_CMD_POST_DIAG | \
wdenk8d5d28a2005-04-02 22:37:54 +0000196 CFG_CMD_REGINFO | \
Wolfgang Denke4e5e4e2005-08-19 00:46:54 +0200197 CFG_CMD_SNTP | \
198 CFG_CMD_BSP)
wdenk64519362004-07-11 17:40:54 +0000199
200/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
201#include <cmd_confdefs.h>
202
wdenk99408ba2005-02-24 22:44:16 +0000203#define CONFIG_TIMESTAMP /* display image timestamps */
204
Wolfgang Denk99753142006-07-21 11:16:34 +0200205#if (TEXT_BASE != 0xFFF00000)
206# define CFG_LOWBOOT 1 /* Boot low */
wdenk64519362004-07-11 17:40:54 +0000207#endif
208
209/*
210 * Autobooting
211 */
212#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
213
wdenk7dd13292004-07-11 20:04:51 +0000214#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk7af96802006-07-26 10:33:37 +0200215 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk64519362004-07-11 17:40:54 +0000216 "echo"
217
218#undef CONFIG_BOOTARGS
219
Wolfgang Denk99753142006-07-21 11:16:34 +0200220#ifdef CONFIG_STK52XX
221# if defined(CONFIG_TQM5200_B)
222# if defined(CFG_LOWBOOT)
223# define ENV_UPDT \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200224 "update=protect off FC000000 FC07FFFF;" \
225 "erase FC000000 FC07FFFF;" \
226 "cp.b 200000 FC000000 ${filesize};" \
Wolfgang Denk99753142006-07-21 11:16:34 +0200227 "protect on FC000000 FC07FFFF\0"
228# else /* highboot */
229# define ENV_UPDT \
230 "update=protect off FFF00000 FFF7FFFF;" \
231 "erase FFF00000 FFF7FFFF;" \
232 "cp.b 200000 FFF00000 ${filesize};" \
233 "protect on FFF00000 FFF7FFFF\0"
234# endif /* CFG_LOWBOOT */
235# else /* !CONFIG_TQM5200_B */
236# define ENV_UPDT \
237 "update=protect off FC000000 FC05FFFF;" \
238 "erase FC000000 FC05FFFF;" \
239 "cp.b 200000 FC000000 ${filesize};" \
240 "protect on FC000000 FC05FFFF\0"
241# endif /* CONFIG_TQM5200_B */
Wolfgang Denk641e3572006-07-22 01:20:03 +0200242#elif defined (CONFIG_CAM5200)
Wolfgang Denk99753142006-07-21 11:16:34 +0200243# define ENV_UPDT \
244 "update=protect off FC000000 FC03FFFF;" \
245 "erase FC000000 FC03FFFF;" \
246 "cp.b 200000 FC000000 ${filesize};" \
247 "protect on FC000000 FC03FFFF\0"
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200248#elif defined (CONFIG_FO300)
249# define ENV_UPDT \
250 "update=protect off FC000000 FC05FFFF;" \
251 "erase FC000000 FC05FFFF;" \
252 "cp.b 200000 FC000000 ${filesize};" \
253 "protect on FC000000 FC05FFFF\0"
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200254#else
Wolfgang Denk99753142006-07-21 11:16:34 +0200255# error "Unknown Carrier Board"
256#endif /* CONFIG_STK52XX */
257
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200258#define CONFIG_EXTRA_ENV_SETTINGS \
259 "netdev=eth0\0" \
260 "rootpath=/opt/eldk/ppc_6xx\0" \
261 "ramargs=setenv bootargs root=/dev/ram rw\0" \
262 "nfsargs=setenv bootargs root=/dev/nfs rw " \
263 "nfsroot=${serverip}:${rootpath}\0" \
264 "addip=setenv bootargs ${bootargs} " \
265 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
266 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk99753142006-07-21 11:16:34 +0200267 "addcons=setenv bootargs ${bootargs} " \
268 "console=ttyS0,${baudrate}\0" \
269 "flash_self=run ramargs addip addcons;" \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200270 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denk99753142006-07-21 11:16:34 +0200271 "flash_nfs=run nfsargs addip addcons;" \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200272 "bootm ${kernel_addr}\0" \
Wolfgang Denk99753142006-07-21 11:16:34 +0200273 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
274 "bootm\0" \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200275 "bootfile=/tftpboot/tqm5200/uImage\0" \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200276 "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
Wolfgang Denk99753142006-07-21 11:16:34 +0200277 "load=tftp 200000 ${u-boot}\0" \
278 ENV_UPDT \
wdenkdc130442004-12-12 22:06:17 +0000279 ""
wdenk64519362004-07-11 17:40:54 +0000280
281#define CONFIG_BOOTCOMMAND "run net_nfs"
282
283/*
284 * IPB Bus clocking configuration.
285 */
wdenk7dd13292004-07-11 20:04:51 +0000286#define CFG_IPBSPEED_133 /* define for 133MHz speed */
wdenk64519362004-07-11 17:40:54 +0000287
288#if defined(CFG_IPBSPEED_133)
289/*
290 * PCI Bus clocking configuration
291 *
292 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
293 * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
294 * been tested with a IPB Bus Clock of 66 MHz.
295 */
296#define CFG_PCISPEED_66 /* define for 66MHz speed */
297#endif
298
299/*
300 * I2C configuration
301 */
302#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
wdenka5948882005-03-27 23:41:39 +0000303#ifdef CONFIG_TQM5200_REV100
304#define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
wdenk64519362004-07-11 17:40:54 +0000305#else
wdenka5948882005-03-27 23:41:39 +0000306#define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
wdenk64519362004-07-11 17:40:54 +0000307#endif
308
309/*
310 * I2C clock frequency
311 *
312 * Please notice, that the resulting clock frequency could differ from the
313 * configured value. This is because the I2C clock is derived from system
314 * clock over a frequency divider with only a few divider values. U-boot
315 * calculates the best approximation for CFG_I2C_SPEED. However the calculated
316 * approximation allways lies below the configured value, never above.
317 */
318#define CFG_I2C_SPEED 100000 /* 100 kHz */
319#define CFG_I2C_SLAVE 0x7F
320
321/*
322 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
323 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
324 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
325 * same configuration could be used.
326 */
327#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
328#define CFG_I2C_EEPROM_ADDR_LEN 2
329#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
330#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
331
332/*
333 * HW-Monitor configuration on Mini-FAP
334 */
335#if defined (CONFIG_MINIFAP)
336#define CFG_I2C_HWMON_ADDR 0x2C
337#endif
338
339/* List of I2C addresses to be verified by POST */
wdenk64519362004-07-11 17:40:54 +0000340#if defined (CONFIG_MINIFAP)
341#undef I2C_ADDR_LIST
342#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
343 CFG_I2C_HWMON_ADDR, \
344 CFG_I2C_SLAVE }
345#endif
346
347/*
348 * Flash configuration
349 */
Wolfgang Denk5591d9e2006-07-19 18:01:38 +0200350#define CFG_FLASH_BASE 0xFC000000
wdenk64519362004-07-11 17:40:54 +0000351
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200352/* use CFI flash driver */
wdenkdc130442004-12-12 22:06:17 +0000353#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
354#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
355#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
356#define CFG_FLASH_EMPTY_INFO
wdenka5948882005-03-27 23:41:39 +0000357#define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
358#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
Wolfgang Denk0d8e1dc2006-07-18 17:44:19 +0200359#define CFG_FLASH_USE_BUFFER_WRITE 1
wdenk64519362004-07-11 17:40:54 +0000360
Wolfgang Denk641e3572006-07-22 01:20:03 +0200361#if defined (CONFIG_CAM5200)
Wolfgang Denk99753142006-07-21 11:16:34 +0200362# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
363#elif defined(CONFIG_TQM5200_B)
364# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200365#else
Wolfgang Denk99753142006-07-21 11:16:34 +0200366# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
367#endif
368
wdenk64519362004-07-11 17:40:54 +0000369#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
370 (= chip selects) */
wdenk64519362004-07-11 17:40:54 +0000371
Wolfgang Denkcc1850e2005-08-23 22:27:41 +0200372/* Dynamic MTD partition support */
373#define CONFIG_JFFS2_CMDLINE
374#define MTDIDS_DEFAULT "nor0=TQM5200-0"
Wolfgang Denk99753142006-07-21 11:16:34 +0200375
376#ifdef CONFIG_STK52XX
377# if defined(CONFIG_TQM5200_B)
378# if defined(CFG_LOWBOOT)
379# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
380 "1536k(kernel)," \
381 "3584k(small-fs)," \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200382 "2m(initrd)," \
Wolfgang Denk99753142006-07-21 11:16:34 +0200383 "8m(misc)," \
384 "16m(big-fs)"
385# else /* highboot */
386# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
387 "3584k(small-fs)," \
388 "2m(initrd)," \
389 "8m(misc)," \
390 "15m(big-fs)," \
391 "1m(firmware)"
392# endif /* CFG_LOWBOOT */
393# else /* !CONFIG_TQM5200_B */
394# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
Wolfgang Denkcc1850e2005-08-23 22:27:41 +0200395 "1408k(kernel)," \
396 "2m(initrd)," \
397 "4m(small-fs)," \
Wolfgang Denk99753142006-07-21 11:16:34 +0200398 "8m(misc)," \
399 "16m(big-fs)"
400# endif /* CONFIG_TQM5200_B */
Wolfgang Denk641e3572006-07-22 01:20:03 +0200401#elif defined (CONFIG_CAM5200)
Wolfgang Denk99753142006-07-21 11:16:34 +0200402# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
403 "1792k(kernel)," \
404 "3584k(small-fs)," \
405 "2m(initrd)," \
406 "8m(misc)," \
407 "16m(big-fs)"
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200408#elif defined (CONFIG_FO300)
409# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
410 "1408k(kernel)," \
411 "2m(initrd)," \
412 "4m(small-fs)," \
413 "8m(misc)," \
414 "16m(big-fs)"
Wolfgang Denk99753142006-07-21 11:16:34 +0200415#else
416# error "Unknown Carrier Board"
417#endif /* CONFIG_STK52XX */
wdenk64519362004-07-11 17:40:54 +0000418
419/*
420 * Environment settings
421 */
422#define CFG_ENV_IS_IN_FLASH 1
Wolfgang Denk99753142006-07-21 11:16:34 +0200423#define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200424#if defined(CONFIG_TQM5200_B)
425#define CFG_ENV_SECT_SIZE 0x40000
426#else
wdenk64519362004-07-11 17:40:54 +0000427#define CFG_ENV_SECT_SIZE 0x20000
Wolfgang Denk99753142006-07-21 11:16:34 +0200428#endif /* CONFIG_TQM5200_B */
wdenk8d3d9ed2005-03-16 16:32:26 +0000429#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200430#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
wdenk64519362004-07-11 17:40:54 +0000431
432/*
433 * Memory map
434 */
435#define CFG_MBAR 0xF0000000
436#define CFG_SDRAM_BASE 0x00000000
437#define CFG_DEFAULT_MBAR 0x80000000
438
439/* Use ON-Chip SRAM until RAM will be available */
440#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
441#ifdef CONFIG_POST
442/* preserve space for the post_word at end of on-chip SRAM */
443#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
444#else
445#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
446#endif
447
448
449#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
450#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
451#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
452
wdenk8d3d9ed2005-03-16 16:32:26 +0000453#define CFG_MONITOR_BASE TEXT_BASE
wdenk64519362004-07-11 17:40:54 +0000454#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
455# define CFG_RAMBOOT 1
456#endif
457
Wolfgang Denk641e3572006-07-22 01:20:03 +0200458#if defined (CONFIG_CAM5200)
Wolfgang Denk99753142006-07-21 11:16:34 +0200459# define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
460#elif defined(CONFIG_TQM5200_B)
461# define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200462#else
Wolfgang Denk99753142006-07-21 11:16:34 +0200463# define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
464#endif
465
466#define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
wdenk64519362004-07-11 17:40:54 +0000467#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
468
469/*
470 * Ethernet configuration
471 */
472#define CONFIG_MPC5xxx_FEC 1
473/*
474 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
475 */
476/* #define CONFIG_FEC_10MBIT 1 */
477#define CONFIG_PHY_ADDR 0x00
478
479/*
480 * GPIO configuration
481 *
482 * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
483 * Bit 0 (mask: 0x80000000): 1
484 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
wdenka5948882005-03-27 23:41:39 +0000485 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
wdenka5948882005-03-27 23:41:39 +0000486 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200487 * Use for REV200 STK52XX boards and FO300 boards. Do not use
488 * with REV100 modules (because, there I2C1 is used as I2C bus)
wdenk64519362004-07-11 17:40:54 +0000489 * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
wdenk61c636e2005-03-31 18:42:15 +0000490 * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
491 * 000 -> All PSC2 pins are GIOPs
492 * 001 -> CAN1/2 on PSC2 pins
493 * Use for REV100 STK52xx boards
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200494 * 01x -> Use AC97
495 * use PSC3: Bits 20-23 (mask: 0x00000f00)
496 * 1100 -> UART/SPI (on FO300 board)
wdenkdc130442004-12-12 22:06:17 +0000497 * use PSC6:
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200498 * on STK52xx and FO300:
wdenka5948882005-03-27 23:41:39 +0000499 * use as UART. Pins PSC6_0 to PSC6_3 are used.
500 * Bits 9:11 (mask: 0x00700000):
wdenkdc130442004-12-12 22:06:17 +0000501 * 101 -> PSC6 : Extended POST test is not available
502 * on MINI-FAP and TQM5200_IB:
wdenka5948882005-03-27 23:41:39 +0000503 * use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
504 * 000 -> PSC6 could not be used as UART, CODEC or IrDA
505 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
506 * tests.
wdenk64519362004-07-11 17:40:54 +0000507 */
508#if defined (CONFIG_MINIFAP)
wdenka5948882005-03-27 23:41:39 +0000509# define CFG_GPS_PORT_CONFIG 0x91000004
wdenkdc130442004-12-12 22:06:17 +0000510#elif defined (CONFIG_STK52XX)
wdenk61c636e2005-03-31 18:42:15 +0000511# if defined (CONFIG_STK52XX_REV100)
512# define CFG_GPS_PORT_CONFIG 0x81500014
513# else /* STK52xx REV200 and above */
514# if defined (CONFIG_TQM5200_REV100)
515# error TQM5200 REV100 not supported on STK52XX REV200 or above
516# else/* TQM5200 REV200 and above */
517# define CFG_GPS_PORT_CONFIG 0x91500004
518# endif
wdenka5948882005-03-27 23:41:39 +0000519# endif
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200520#elif defined (CONFIG_FO300)
521# define CFG_GPS_PORT_CONFIG 0x91502c24
wdenk61c636e2005-03-31 18:42:15 +0000522#else /* TMQ5200 Inbetriebnahme-Board */
wdenka5948882005-03-27 23:41:39 +0000523# define CFG_GPS_PORT_CONFIG 0x81000004
wdenk64519362004-07-11 17:40:54 +0000524#endif
525
526/*
527 * RTC configuration
528 */
Wolfgang Denk09f940b2005-08-18 11:51:12 +0200529#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
530# define CONFIG_RTC_M41T11 1
531# define CFG_I2C_RTC_ADDR 0x68
Wolfgang Denk8362ea42006-07-19 14:44:03 +0200532# define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
533 year */
Wolfgang Denk09f940b2005-08-18 11:51:12 +0200534#else
535# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
536#endif
wdenk64519362004-07-11 17:40:54 +0000537
538/*
539 * Miscellaneous configurable options
540 */
541#define CFG_LONGHELP /* undef to save memory */
542#define CFG_PROMPT "=> " /* Monitor Command Prompt */
Wolfgang Denk99753142006-07-21 11:16:34 +0200543
544#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
545#define CFG_PROMPT_HUSH_PS2 "> "
546
wdenk64519362004-07-11 17:40:54 +0000547#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
548#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
549#else
550#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
551#endif
552#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
553#define CFG_MAXARGS 16 /* max number of command args */
554#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
555
556/* Enable an alternate, more extensive memory test */
557#define CFG_ALT_MEMTEST
558
559#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
560#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
561
562#define CFG_LOAD_ADDR 0x100000 /* default load address */
563
564#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
565
566/*
567 * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
568 * which is normally part of the default commands (CFV_CMD_DFL)
569 */
570#define CONFIG_LOOPW
571
572/*
573 * Various low-level settings
574 */
575#if defined(CONFIG_MPC5200)
576#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
577#define CFG_HID0_FINAL HID0_ICE
578#else
579#define CFG_HID0_INIT 0
580#define CFG_HID0_FINAL 0
581#endif
582
583#define CFG_BOOTCS_START CFG_FLASH_BASE
584#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
585#ifdef CFG_PCISPEED_66
586#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
587#else
588#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
589#endif
590#define CFG_CS0_START CFG_FLASH_BASE
591#define CFG_CS0_SIZE CFG_FLASH_SIZE
592
wdenkdc130442004-12-12 22:06:17 +0000593#define CONFIG_LAST_STAGE_INIT
wdenkdc130442004-12-12 22:06:17 +0000594
wdenk64519362004-07-11 17:40:54 +0000595/*
596 * SRAM - Do not map below 2 GB in address space, because this area is used
597 * for SDRAM autosizing.
598 */
wdenk64519362004-07-11 17:40:54 +0000599#define CFG_CS2_START 0xE5000000
wdenkdc130442004-12-12 22:06:17 +0000600#define CFG_CS2_SIZE 0x100000 /* 1 MByte */
wdenk64519362004-07-11 17:40:54 +0000601#define CFG_CS2_CFG 0x0004D930
wdenk64519362004-07-11 17:40:54 +0000602
603/*
604 * Grafic controller - Do not map below 2 GB in address space, because this
605 * area is used for SDRAM autosizing.
606 */
wdenka5948882005-03-27 23:41:39 +0000607#define SM501_FB_BASE 0xE0000000
608#define CFG_CS1_START (SM501_FB_BASE)
wdenk64519362004-07-11 17:40:54 +0000609#define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
wdenkda54bc92004-08-04 21:56:49 +0000610#define CFG_CS1_CFG 0x8F48FF70
wdenk64519362004-07-11 17:40:54 +0000611#define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
wdenk64519362004-07-11 17:40:54 +0000612
613#define CFG_CS_BURST 0x00000000
wdenka5948882005-03-27 23:41:39 +0000614#define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
wdenk64519362004-07-11 17:40:54 +0000615
616#define CFG_RESET_ADDRESS 0xff000000
617
618/*-----------------------------------------------------------------------
619 * USB stuff
620 *-----------------------------------------------------------------------
621 */
622#define CONFIG_USB_CLOCK 0x0001BBBB
623#define CONFIG_USB_CONFIG 0x00001000
624
625/*-----------------------------------------------------------------------
626 * IDE/ATA stuff Supports IDE harddisk
627 *-----------------------------------------------------------------------
628 */
629
wdenk7dd13292004-07-11 20:04:51 +0000630#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
wdenk64519362004-07-11 17:40:54 +0000631
wdenk7dd13292004-07-11 20:04:51 +0000632#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
633#undef CONFIG_IDE_LED /* LED for ide not supported */
wdenk64519362004-07-11 17:40:54 +0000634
wdenk7dd13292004-07-11 20:04:51 +0000635#define CONFIG_IDE_RESET /* reset for ide supported */
wdenk64519362004-07-11 17:40:54 +0000636#define CONFIG_IDE_PREINIT
637
638#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
wdenka5948882005-03-27 23:41:39 +0000639#define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
wdenk64519362004-07-11 17:40:54 +0000640
641#define CFG_ATA_IDE0_OFFSET 0x0000
642
643#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
644
645/* Offset for data I/O */
646#define CFG_ATA_DATA_OFFSET (0x0060)
647
648/* Offset for normal register accesses */
649#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
650
651/* Offset for alternate registers */
652#define CFG_ATA_ALT_OFFSET (0x005C)
653
wdenk7dd13292004-07-11 20:04:51 +0000654/* Interval between registers */
655#define CFG_ATA_STRIDE 4
wdenk64519362004-07-11 17:40:54 +0000656
657#endif /* __CONFIG_H */