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wdenk64519362004-07-11 17:40:54 +00001/*
wdenka5948882005-03-27 23:41:39 +00002 * (C) Copyright 2003-2005
wdenk64519362004-07-11 17:40:54 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkc98368a2006-07-19 17:52:30 +02005 * (C) Copyright 2004-2006
wdenk64519362004-07-11 17:40:54 +00006 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
wdenk64519362004-07-11 17:40:54 +000030/*
31 * High Level Configuration Options
32 * (easy to change)
33 */
34
Wolfgang Denk99753142006-07-21 11:16:34 +020035#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
37#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
38#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
wdenk64519362004-07-11 17:40:54 +000039
Wolfgang Denk9018bc92006-08-18 23:27:33 +020040/* On a Cameron or on a FO300 board or ... */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020041#if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
Wolfgang Denk99753142006-07-21 11:16:34 +020042#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
43#endif
44
45#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
wdenk64519362004-07-11 17:40:54 +000046
Wolfgang Denk70df7bc2007-06-22 23:59:00 +020047#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
Wolfgang Denk99753142006-07-21 11:16:34 +020048#define BOOTFLAG_WARM 0x02 /* Software reboot */
wdenk64519362004-07-11 17:40:54 +000049
Becky Bruce03ea1be2008-05-08 19:02:12 -050050#define CONFIG_HIGH_BATS 1 /* High BATs supported */
51
wdenk64519362004-07-11 17:40:54 +000052/*
53 * Serial console configuration
54 */
Wolfgang Denk99753142006-07-21 11:16:34 +020055#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
56#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
wdenk64519362004-07-11 17:40:54 +000057#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Axel Beierlein61177792008-08-16 00:30:48 +020058#define CONFIG_BOOTCOUNT_LIMIT 1
wdenk64519362004-07-11 17:40:54 +000059
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020060#ifdef CONFIG_FO300
61#define CFG_DEVICE_NULLDEV 1 /* enable null device */
62#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
63#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
Bartlomiej Sieka9d47ad42006-08-22 10:38:18 +020064#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020065#if 0
66#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
67 /* switch is closed */
68#endif
69
70#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
71 /* switch is open */
Wolfgang Denk9018bc92006-08-18 23:27:33 +020072#endif /* CONFIG_FO300 */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +020073
wdenkdc130442004-12-12 22:06:17 +000074#ifdef CONFIG_STK52XX
75#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
76#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
77#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
78#define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
79#define CONFIG_BOARD_EARLY_INIT_R
80#endif /* CONFIG_STK52XX */
wdenk64519362004-07-11 17:40:54 +000081
wdenk64519362004-07-11 17:40:54 +000082/*
83 * PCI Mapping:
84 * 0x40000000 - 0x4fffffff - PCI Memory
85 * 0x50000000 - 0x50ffffff - PCI IO Space
86 */
wdenkdc130442004-12-12 22:06:17 +000087#ifdef CONFIG_STK52XX
88#define CONFIG_PCI 1
wdenk64519362004-07-11 17:40:54 +000089#define CONFIG_PCI_PNP 1
wdenk79cf7572004-08-28 21:09:14 +000090/* #define CONFIG_PCI_SCAN_SHOW 1 */
wdenk64519362004-07-11 17:40:54 +000091
92#define CONFIG_PCI_MEM_BUS 0x40000000
93#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
94#define CONFIG_PCI_MEM_SIZE 0x10000000
95
96#define CONFIG_PCI_IO_BUS 0x50000000
97#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
98#define CONFIG_PCI_IO_SIZE 0x01000000
99
100#define CONFIG_NET_MULTI 1
Wolfgang Denk3f2f9dd2006-06-16 16:11:34 +0200101#define CONFIG_EEPRO100 1
wdenk64519362004-07-11 17:40:54 +0000102#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
103#define CONFIG_NS8382X 1
wdenk61c636e2005-03-31 18:42:15 +0000104#endif /* CONFIG_STK52XX */
wdenk64519362004-07-11 17:40:54 +0000105
wdenka5948882005-03-27 23:41:39 +0000106/*
107 * Video console
108 */
Wolfgang Denk99753142006-07-21 11:16:34 +0200109#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
wdenka5948882005-03-27 23:41:39 +0000110#define CONFIG_VIDEO
111#define CONFIG_VIDEO_SM501
112#define CONFIG_VIDEO_SM501_32BPP
113#define CONFIG_CFB_CONSOLE
114#define CONFIG_VIDEO_LOGO
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200115
116#ifndef CONFIG_FO300
wdenka5948882005-03-27 23:41:39 +0000117#define CONFIG_CONSOLE_EXTRA_INFO
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200118#else
119#define CONFIG_VIDEO_BMP_LOGO
120#endif
121
122#define CONFIG_VGA_AS_SINGLE_DEVICE
wdenka5948882005-03-27 23:41:39 +0000123#define CONFIG_VIDEO_SW_CURSOR
124#define CONFIG_SPLASH_SCREEN
wdenk61c636e2005-03-31 18:42:15 +0000125#define CFG_CONSOLE_IS_IN_ENV
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200126#endif /* #ifndef CONFIG_TQM5200S */
wdenk64519362004-07-11 17:40:54 +0000127
wdenk64519362004-07-11 17:40:54 +0000128
129/* Partitions */
wdenk8d3d9ed2005-03-16 16:32:26 +0000130#define CONFIG_MAC_PARTITION
wdenk64519362004-07-11 17:40:54 +0000131#define CONFIG_DOS_PARTITION
wdenka5948882005-03-27 23:41:39 +0000132#define CONFIG_ISO_PARTITION
wdenk64519362004-07-11 17:40:54 +0000133
134/* USB */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200135#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
Markus Klotzbuecher43c8b312006-11-27 11:44:58 +0100136#define CONFIG_USB_OHCI_NEW
Markus Klotzbücher9ecbe251988-01-05 08:17:15 +0100137#define CFG_OHCI_BE_CONTROLLER
wdenk64519362004-07-11 17:40:54 +0000138#define CONFIG_USB_STORAGE
Wolfgang Denk56cbd022007-08-12 14:27:39 +0200139#define CONFIG_CMD_FAT
140#define CONFIG_CMD_USB
Markus Klotzbuecher661ffe52006-11-27 11:43:09 +0100141
142#undef CFG_USB_OHCI_BOARD_INIT
143#define CFG_USB_OHCI_CPU_INIT
144#define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
145#define CFG_USB_OHCI_SLOT_NAME "mpc5200"
146#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
147
wdenk64519362004-07-11 17:40:54 +0000148#endif
149
Wolfgang Denk641e3572006-07-22 01:20:03 +0200150#ifndef CONFIG_CAM5200
wdenk64519362004-07-11 17:40:54 +0000151/* POST support */
152#define CONFIG_POST (CFG_POST_MEMORY | \
153 CFG_POST_CPU | \
154 CFG_POST_I2C)
Wolfgang Denk99753142006-07-21 11:16:34 +0200155#endif
wdenk64519362004-07-11 17:40:54 +0000156
157#ifdef CONFIG_POST
wdenk64519362004-07-11 17:40:54 +0000158/* preserve space for the post_word at end of on-chip SRAM */
159#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
wdenk64519362004-07-11 17:40:54 +0000160#endif
161
wdenk64519362004-07-11 17:40:54 +0000162
163/*
Jon Loeligerbeb9ff42007-07-10 09:22:23 -0500164 * BOOTP options
165 */
166#define CONFIG_BOOTP_BOOTFILESIZE
167#define CONFIG_BOOTP_BOOTPATH
168#define CONFIG_BOOTP_GATEWAY
169#define CONFIG_BOOTP_HOSTNAME
170
wdenk64519362004-07-11 17:40:54 +0000171
172/*
Jon Loeligeredccb462007-07-04 22:30:50 -0500173 * Command line configuration.
wdenk64519362004-07-11 17:40:54 +0000174 */
Jon Loeligeredccb462007-07-04 22:30:50 -0500175#include <config_cmd_default.h>
wdenk64519362004-07-11 17:40:54 +0000176
Jon Loeligeredccb462007-07-04 22:30:50 -0500177#define CONFIG_CMD_ASKENV
178#define CONFIG_CMD_DATE
179#define CONFIG_CMD_DHCP
180#define CONFIG_CMD_EEPROM
181#define CONFIG_CMD_I2C
182#define CONFIG_CMD_JFFS2
183#define CONFIG_CMD_MII
184#define CONFIG_CMD_NFS
185#define CONFIG_CMD_PING
Jon Loeligeredccb462007-07-04 22:30:50 -0500186#define CONFIG_CMD_REGINFO
187#define CONFIG_CMD_SNTP
188#define CONFIG_CMD_BSP
wdenk64519362004-07-11 17:40:54 +0000189
Jon Loeligeredccb462007-07-04 22:30:50 -0500190#ifdef CONFIG_VIDEO
191 #define CONFIG_CMD_BMP
192#endif
193
194#ifdef CONFIG_PCI
Marian Balakowicz8e305522007-10-05 10:40:54 +0200195#define CONFIG_CMD_PCI
TsiChung Liew521f97b2008-03-30 01:19:06 -0500196#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
Jon Loeligeredccb462007-07-04 22:30:50 -0500197#endif
198
199#if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
200 #define CONFIG_CMD_IDE
201 #define CONFIG_CMD_FAT
202 #define CONFIG_CMD_EXT2
203#endif
204
205#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
206 #define CONFIG_CFG_USB
207 #define CONFIG_CFG_FAT
208#endif
209
Jon Loeligerb5777d12007-07-08 17:02:01 -0500210#ifdef CONFIG_POST
211 #define CONFIG_CMD_DIAG
212#endif
213
wdenk64519362004-07-11 17:40:54 +0000214
wdenk99408ba2005-02-24 22:44:16 +0000215#define CONFIG_TIMESTAMP /* display image timestamps */
216
Wolfgang Denk99753142006-07-21 11:16:34 +0200217#if (TEXT_BASE != 0xFFF00000)
218# define CFG_LOWBOOT 1 /* Boot low */
wdenk64519362004-07-11 17:40:54 +0000219#endif
220
221/*
222 * Autobooting
223 */
224#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
225
wdenk7dd13292004-07-11 20:04:51 +0000226#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk7af96802006-07-26 10:33:37 +0200227 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk64519362004-07-11 17:40:54 +0000228 "echo"
229
230#undef CONFIG_BOOTARGS
231
Wolfgang Denk0129dcd2006-11-23 22:58:58 +0100232#if defined(CONFIG_TQM5200_B) && !defined(CFG_LOWBOOT)
233# define ENV_UPDT \
234 "update=protect off FFF00000 +${filesize};" \
235 "erase FFF00000 +${filesize};" \
Wolfgang Denk99753142006-07-21 11:16:34 +0200236 "cp.b 200000 FFF00000 ${filesize};" \
Wolfgang Denk0129dcd2006-11-23 22:58:58 +0100237 "protect on FFF00000 +${filesize}\0"
238#else /* default lowboot configuration */
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200239# define ENV_UPDT \
Wolfgang Denk0129dcd2006-11-23 22:58:58 +0100240 "update=protect off FC000000 +${filesize};" \
241 "erase FC000000 +${filesize};" \
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200242 "cp.b 200000 FC000000 ${filesize};" \
Wolfgang Denk0129dcd2006-11-23 22:58:58 +0100243 "protect on FC000000 +${filesize}\0"
244#endif
Wolfgang Denk99753142006-07-21 11:16:34 +0200245
Bartlomiej Sieka2b7cdc82007-09-13 16:33:59 +0200246#if defined(CONFIG_TQM5200)
Reinhard Thiesb31c0672007-01-10 14:41:14 +0100247#define CUSTOM_ENV_SETTINGS \
Bartlomiej Sieka2b7cdc82007-09-13 16:33:59 +0200248 "hostname=tqm5200\0" \
Reinhard Thiesb31c0672007-01-10 14:41:14 +0100249 "bootfile=/tftpboot/tqm5200/uImage\0" \
Bartlomiej Sieka7a432ce2007-06-08 14:52:22 +0200250 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
Reinhard Thiesb31c0672007-01-10 14:41:14 +0100251 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
Bartlomiej Sieka2b7cdc82007-09-13 16:33:59 +0200252#elif defined(CONFIG_CAM5200)
Wolfgang Denk70df7bc2007-06-22 23:59:00 +0200253#define CUSTOM_ENV_SETTINGS \
Reinhard Thiesb31c0672007-01-10 14:41:14 +0100254 "bootfile=cam5200/uImage\0" \
255 "u-boot=cam5200/u-boot.bin\0" \
256 "setup=tftp 200000 cam5200/setup.img; autoscr 200000\0"
257#endif
258
Martin Krause913d8af2008-03-19 14:25:14 +0100259#if defined(CONFIG_TQM5200_B)
260#define ENV_FLASH_LAYOUT \
261 "fdt_addr=FC100000\0" \
262 "kernel_addr=FC140000\0" \
263 "ramdisk_addr=FC600000\0"
264#else /* !CONFIG_TQM5200_B */
265#define ENV_FLASH_LAYOUT \
266 "fdt_addr=FC0A0000\0" \
267 "kernel_addr=FC0C0000\0" \
268 "ramdisk_addr=FC300000\0"
269#endif
270
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200271#define CONFIG_EXTRA_ENV_SETTINGS \
272 "netdev=eth0\0" \
Bartlomiej Sieka2b7cdc82007-09-13 16:33:59 +0200273 "console=ttyPSC0\0" \
Martin Krause913d8af2008-03-19 14:25:14 +0100274 ENV_FLASH_LAYOUT \
Bartlomiej Sieka5481a782007-10-25 17:20:01 +0200275 "kernel_addr_r=400000\0" \
276 "fdt_addr_r=600000\0" \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200277 "rootpath=/opt/eldk/ppc_6xx\0" \
278 "ramargs=setenv bootargs root=/dev/ram rw\0" \
279 "nfsargs=setenv bootargs root=/dev/nfs rw " \
280 "nfsroot=${serverip}:${rootpath}\0" \
281 "addip=setenv bootargs ${bootargs} " \
282 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
283 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk99753142006-07-21 11:16:34 +0200284 "addcons=setenv bootargs ${bootargs} " \
Bartlomiej Sieka7a432ce2007-06-08 14:52:22 +0200285 "console=${console},${baudrate}\0" \
Bartlomiej Sieka2b7cdc82007-09-13 16:33:59 +0200286 "flash_self_old=sete console ttyS0; run ramargs addip addcons;" \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200287 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Bartlomiej Sieka2b7cdc82007-09-13 16:33:59 +0200288 "flash_self=run ramargs addip addcons;" \
289 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
290 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200291 "bootm ${kernel_addr}\0" \
Bartlomiej Sieka2b7cdc82007-09-13 16:33:59 +0200292 "flash_nfs=run nfsargs addip addcons;" \
Bartlomiej Sieka7a432ce2007-06-08 14:52:22 +0200293 "bootm ${kernel_addr} - ${fdt_addr}\0" \
Bartlomiej Sieka2b7cdc82007-09-13 16:33:59 +0200294 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
295 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
296 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
297 "tftp ${fdt_addr_r} ${fdt_file}; " \
298 "run nfsargs addip addcons; " \
299 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
Reinhard Thiesb31c0672007-01-10 14:41:14 +0100300 CUSTOM_ENV_SETTINGS \
Wolfgang Denk99753142006-07-21 11:16:34 +0200301 "load=tftp 200000 ${u-boot}\0" \
302 ENV_UPDT \
wdenkdc130442004-12-12 22:06:17 +0000303 ""
wdenk64519362004-07-11 17:40:54 +0000304
305#define CONFIG_BOOTCOMMAND "run net_nfs"
306
307/*
308 * IPB Bus clocking configuration.
309 */
Bartlomiej Siekaa01420c2007-05-27 16:53:43 +0200310#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
wdenk64519362004-07-11 17:40:54 +0000311
Bartlomiej Siekaa01420c2007-05-27 16:53:43 +0200312#if defined(CFG_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
wdenk64519362004-07-11 17:40:54 +0000313/*
314 * PCI Bus clocking configuration
315 *
316 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
Bartlomiej Siekaa01420c2007-05-27 16:53:43 +0200317 * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
318 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
wdenk64519362004-07-11 17:40:54 +0000319 */
Bartlomiej Siekaa01420c2007-05-27 16:53:43 +0200320#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
wdenk64519362004-07-11 17:40:54 +0000321#endif
322
323/*
324 * I2C configuration
325 */
326#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
wdenka5948882005-03-27 23:41:39 +0000327#ifdef CONFIG_TQM5200_REV100
328#define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
wdenk64519362004-07-11 17:40:54 +0000329#else
wdenka5948882005-03-27 23:41:39 +0000330#define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
wdenk64519362004-07-11 17:40:54 +0000331#endif
332
333/*
334 * I2C clock frequency
335 *
336 * Please notice, that the resulting clock frequency could differ from the
337 * configured value. This is because the I2C clock is derived from system
338 * clock over a frequency divider with only a few divider values. U-boot
339 * calculates the best approximation for CFG_I2C_SPEED. However the calculated
340 * approximation allways lies below the configured value, never above.
341 */
342#define CFG_I2C_SPEED 100000 /* 100 kHz */
343#define CFG_I2C_SLAVE 0x7F
344
345/*
346 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
347 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
348 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
349 * same configuration could be used.
350 */
351#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
352#define CFG_I2C_EEPROM_ADDR_LEN 2
353#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
354#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
355
356/*
357 * HW-Monitor configuration on Mini-FAP
358 */
359#if defined (CONFIG_MINIFAP)
360#define CFG_I2C_HWMON_ADDR 0x2C
361#endif
362
363/* List of I2C addresses to be verified by POST */
wdenk64519362004-07-11 17:40:54 +0000364#if defined (CONFIG_MINIFAP)
365#undef I2C_ADDR_LIST
366#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
367 CFG_I2C_HWMON_ADDR, \
368 CFG_I2C_SLAVE }
369#endif
370
371/*
372 * Flash configuration
373 */
Wolfgang Denk5591d9e2006-07-19 18:01:38 +0200374#define CFG_FLASH_BASE 0xFC000000
wdenk64519362004-07-11 17:40:54 +0000375
Marian Balakowicz4b7e4562007-01-10 00:26:15 +0100376#if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200377#define CFG_MAX_FLASH_BANKS 2 /* max num of flash banks
378 (= chip selects) */
379#define CFG_FLASH_WORD_SIZE unsigned int /* main flash device with */
380#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
381#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
382
383#define CFG_FLASH_ADDR0 0x555
384#define CFG_FLASH_ADDR1 0x2AA
385#define CFG_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
386#define CFG_MAX_FLASH_SECT 128
Marian Balakowicz4b7e4562007-01-10 00:26:15 +0100387#else
388/* use CFI flash driver */
389#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200390#define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
Marian Balakowicz4b7e4562007-01-10 00:26:15 +0100391#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
392#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
393 (= chip selects) */
394#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
395#endif
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200396
wdenkdc130442004-12-12 22:06:17 +0000397#define CFG_FLASH_EMPTY_INFO
wdenka5948882005-03-27 23:41:39 +0000398#define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
Wolfgang Denk0d8e1dc2006-07-18 17:44:19 +0200399#define CFG_FLASH_USE_BUFFER_WRITE 1
wdenk64519362004-07-11 17:40:54 +0000400
Wolfgang Denk641e3572006-07-22 01:20:03 +0200401#if defined (CONFIG_CAM5200)
Wolfgang Denk99753142006-07-21 11:16:34 +0200402# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
403#elif defined(CONFIG_TQM5200_B)
404# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200405#else
Wolfgang Denk99753142006-07-21 11:16:34 +0200406# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
407#endif
408
Wolfgang Denkcc1850e2005-08-23 22:27:41 +0200409/* Dynamic MTD partition support */
410#define CONFIG_JFFS2_CMDLINE
411#define MTDIDS_DEFAULT "nor0=TQM5200-0"
Wolfgang Denk99753142006-07-21 11:16:34 +0200412
413#ifdef CONFIG_STK52XX
414# if defined(CONFIG_TQM5200_B)
415# if defined(CFG_LOWBOOT)
416# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
Martin Krause913d8af2008-03-19 14:25:14 +0100417 "256k(dtb)," \
418 "2304k(kernel)," \
419 "2560k(small-fs)," \
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200420 "2m(initrd)," \
Wolfgang Denk99753142006-07-21 11:16:34 +0200421 "8m(misc)," \
422 "16m(big-fs)"
423# else /* highboot */
424# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
425 "3584k(small-fs)," \
426 "2m(initrd)," \
427 "8m(misc)," \
428 "15m(big-fs)," \
429 "1m(firmware)"
430# endif /* CFG_LOWBOOT */
431# else /* !CONFIG_TQM5200_B */
432# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
Bartlomiej Sieka2b7cdc82007-09-13 16:33:59 +0200433 "128k(dtb)," \
434 "2304k(kernel)," \
Wolfgang Denkcc1850e2005-08-23 22:27:41 +0200435 "2m(initrd)," \
436 "4m(small-fs)," \
Wolfgang Denk99753142006-07-21 11:16:34 +0200437 "8m(misc)," \
Bartlomiej Sieka2b7cdc82007-09-13 16:33:59 +0200438 "15m(big-fs)"
Wolfgang Denk99753142006-07-21 11:16:34 +0200439# endif /* CONFIG_TQM5200_B */
Wolfgang Denk641e3572006-07-22 01:20:03 +0200440#elif defined (CONFIG_CAM5200)
Wolfgang Denk99753142006-07-21 11:16:34 +0200441# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
442 "1792k(kernel)," \
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200443 "5632k(rootfs)," \
444 "24m(home)"
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200445#elif defined (CONFIG_FO300)
446# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
447 "1408k(kernel)," \
448 "2m(initrd)," \
449 "4m(small-fs)," \
450 "8m(misc)," \
451 "16m(big-fs)"
Wolfgang Denk99753142006-07-21 11:16:34 +0200452#else
453# error "Unknown Carrier Board"
454#endif /* CONFIG_STK52XX */
wdenk64519362004-07-11 17:40:54 +0000455
456/*
457 * Environment settings
458 */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200459#define CONFIG_ENV_IS_IN_FLASH 1
Wolfgang Denk99753142006-07-21 11:16:34 +0200460#define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
Wolfgang Denk0129dcd2006-11-23 22:58:58 +0100461#if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200462#define CFG_ENV_SECT_SIZE 0x40000
463#else
wdenk64519362004-07-11 17:40:54 +0000464#define CFG_ENV_SECT_SIZE 0x20000
Wolfgang Denk99753142006-07-21 11:16:34 +0200465#endif /* CONFIG_TQM5200_B */
wdenk8d3d9ed2005-03-16 16:32:26 +0000466#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200467#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
wdenk64519362004-07-11 17:40:54 +0000468
469/*
470 * Memory map
471 */
472#define CFG_MBAR 0xF0000000
473#define CFG_SDRAM_BASE 0x00000000
474#define CFG_DEFAULT_MBAR 0x80000000
475
476/* Use ON-Chip SRAM until RAM will be available */
477#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
478#ifdef CONFIG_POST
479/* preserve space for the post_word at end of on-chip SRAM */
480#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
481#else
482#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
483#endif
484
485
486#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
487#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
488#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
489
wdenk8d3d9ed2005-03-16 16:32:26 +0000490#define CFG_MONITOR_BASE TEXT_BASE
wdenk64519362004-07-11 17:40:54 +0000491#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
492# define CFG_RAMBOOT 1
493#endif
494
Wolfgang Denk641e3572006-07-22 01:20:03 +0200495#if defined (CONFIG_CAM5200)
Wolfgang Denk99753142006-07-21 11:16:34 +0200496# define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
497#elif defined(CONFIG_TQM5200_B)
498# define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
Wolfgang Denkc98368a2006-07-19 17:52:30 +0200499#else
Wolfgang Denk99753142006-07-21 11:16:34 +0200500# define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
501#endif
502
503#define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
wdenk64519362004-07-11 17:40:54 +0000504#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
505
506/*
507 * Ethernet configuration
508 */
509#define CONFIG_MPC5xxx_FEC 1
510/*
511 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
512 */
513/* #define CONFIG_FEC_10MBIT 1 */
514#define CONFIG_PHY_ADDR 0x00
515
516/*
517 * GPIO configuration
518 *
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200519 * use CS1: Bit 0 (mask: 0x80000000):
520 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
wdenk64519362004-07-11 17:40:54 +0000521 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200522 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
523 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
524 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
525 * Use for REV200 STK52XX boards and FO300 boards. Do not use
526 * with REV100 modules (because, there I2C1 is used as I2C bus).
527 * use ATA: Bits 6-7 (mask 0x03000000):
528 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
529 * Use for CAM5200 board.
530 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
531 * use PSC6: Bits 9-11 (mask 0x00700000):
532 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
533 * UART, CODEC or IrDA.
534 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
535 * enable extended POST tests.
536 * Use for MINI-FAP and TQM5200_IB boards.
537 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
538 * Extended POST test is not available.
539 * Use for STK52xx, FO300 and CAM5200 boards.
540 * use PCI_DIS: Bit 16 (mask 0x00008000):
541 * 1 -> disable PCI controller (on CAM5200 board).
542 * use USB: Bits 18-19 (mask 0x00003000):
543 * 10 -> two UARTs (on FO300 and CAM5200).
544 * use PSC3: Bits 20-23 (mask: 0x00000f00):
545 * 0000 -> All PSC3 pins are GPIOs.
546 * 1100 -> UART/SPI (on FO300 board).
547 * 0100 -> UART (on CAM5200 board).
548 * use PSC2: Bits 25:27 (mask: 0x00000030):
549 * 000 -> All PSC2 pins are GPIOs.
550 * 100 -> UART (on CAM5200 board).
551 * 001 -> CAN1/2 on PSC2 pins.
552 * Use for REV100 STK52xx boards
553 * 01x -> Use AC97 (on FO300 board).
554 * use PSC1: Bits 29-31 (mask: 0x00000007):
555 * 100 -> UART (on all boards).
wdenk64519362004-07-11 17:40:54 +0000556 */
557#if defined (CONFIG_MINIFAP)
wdenka5948882005-03-27 23:41:39 +0000558# define CFG_GPS_PORT_CONFIG 0x91000004
wdenkdc130442004-12-12 22:06:17 +0000559#elif defined (CONFIG_STK52XX)
wdenk61c636e2005-03-31 18:42:15 +0000560# if defined (CONFIG_STK52XX_REV100)
561# define CFG_GPS_PORT_CONFIG 0x81500014
562# else /* STK52xx REV200 and above */
563# if defined (CONFIG_TQM5200_REV100)
564# error TQM5200 REV100 not supported on STK52XX REV200 or above
565# else/* TQM5200 REV200 and above */
Martin Krause4bd5e852007-10-22 16:45:53 +0200566# define CFG_GPS_PORT_CONFIG 0x91500404
wdenk61c636e2005-03-31 18:42:15 +0000567# endif
wdenka5948882005-03-27 23:41:39 +0000568# endif
Marian Balakowiczbcb0cca2006-08-18 19:14:46 +0200569#elif defined (CONFIG_FO300)
570# define CFG_GPS_PORT_CONFIG 0x91502c24
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200571#elif defined (CONFIG_CAM5200)
572# define CFG_GPS_PORT_CONFIG 0x8050A444
wdenk61c636e2005-03-31 18:42:15 +0000573#else /* TMQ5200 Inbetriebnahme-Board */
wdenka5948882005-03-27 23:41:39 +0000574# define CFG_GPS_PORT_CONFIG 0x81000004
wdenk64519362004-07-11 17:40:54 +0000575#endif
576
577/*
578 * RTC configuration
579 */
Wolfgang Denk09f940b2005-08-18 11:51:12 +0200580#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
581# define CONFIG_RTC_M41T11 1
582# define CFG_I2C_RTC_ADDR 0x68
Wolfgang Denk8362ea42006-07-19 14:44:03 +0200583# define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
584 year */
Wolfgang Denk09f940b2005-08-18 11:51:12 +0200585#else
586# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
587#endif
wdenk64519362004-07-11 17:40:54 +0000588
589/*
590 * Miscellaneous configurable options
591 */
592#define CFG_LONGHELP /* undef to save memory */
593#define CFG_PROMPT "=> " /* Monitor Command Prompt */
Wolfgang Denk99753142006-07-21 11:16:34 +0200594
Wolfgang Denk274bac52006-10-28 02:29:14 +0200595#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
Wolfgang Denk99753142006-07-21 11:16:34 +0200596#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
597#define CFG_PROMPT_HUSH_PS2 "> "
598
Jon Loeligeredccb462007-07-04 22:30:50 -0500599#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
600#if defined(CONFIG_CMD_KGDB)
601#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
602#endif
603
604#if defined(CONFIG_CMD_KGDB)
wdenk64519362004-07-11 17:40:54 +0000605#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
606#else
607#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
608#endif
609#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
610#define CFG_MAXARGS 16 /* max number of command args */
611#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
612
613/* Enable an alternate, more extensive memory test */
614#define CFG_ALT_MEMTEST
615
616#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
617#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
618
619#define CFG_LOAD_ADDR 0x100000 /* default load address */
620
621#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
622
623/*
Jon Loeligerbeb9ff42007-07-10 09:22:23 -0500624 * Enable loopw command.
wdenk64519362004-07-11 17:40:54 +0000625 */
626#define CONFIG_LOOPW
627
628/*
629 * Various low-level settings
630 */
631#if defined(CONFIG_MPC5200)
632#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
633#define CFG_HID0_FINAL HID0_ICE
634#else
635#define CFG_HID0_INIT 0
636#define CFG_HID0_FINAL 0
637#endif
638
639#define CFG_BOOTCS_START CFG_FLASH_BASE
640#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
Bartlomiej Siekaa01420c2007-05-27 16:53:43 +0200641#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
wdenk64519362004-07-11 17:40:54 +0000642#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
643#else
644#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
645#endif
646#define CFG_CS0_START CFG_FLASH_BASE
647#define CFG_CS0_SIZE CFG_FLASH_SIZE
648
wdenkdc130442004-12-12 22:06:17 +0000649#define CONFIG_LAST_STAGE_INIT
wdenkdc130442004-12-12 22:06:17 +0000650
wdenk64519362004-07-11 17:40:54 +0000651/*
652 * SRAM - Do not map below 2 GB in address space, because this area is used
653 * for SDRAM autosizing.
654 */
wdenk64519362004-07-11 17:40:54 +0000655#define CFG_CS2_START 0xE5000000
wdenkdc130442004-12-12 22:06:17 +0000656#define CFG_CS2_SIZE 0x100000 /* 1 MByte */
wdenk64519362004-07-11 17:40:54 +0000657#define CFG_CS2_CFG 0x0004D930
wdenk64519362004-07-11 17:40:54 +0000658
659/*
660 * Grafic controller - Do not map below 2 GB in address space, because this
661 * area is used for SDRAM autosizing.
662 */
wdenka5948882005-03-27 23:41:39 +0000663#define SM501_FB_BASE 0xE0000000
664#define CFG_CS1_START (SM501_FB_BASE)
wdenk64519362004-07-11 17:40:54 +0000665#define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
wdenkda54bc92004-08-04 21:56:49 +0000666#define CFG_CS1_CFG 0x8F48FF70
wdenk64519362004-07-11 17:40:54 +0000667#define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
wdenk64519362004-07-11 17:40:54 +0000668
669#define CFG_CS_BURST 0x00000000
wdenka5948882005-03-27 23:41:39 +0000670#define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
wdenk64519362004-07-11 17:40:54 +0000671
Marian Balakowiczcfae4892006-10-03 20:28:38 +0200672#if defined(CONFIG_CAM5200)
673#define CFG_CS4_START 0xB0000000
674#define CFG_CS4_SIZE 0x00010000
675#define CFG_CS4_CFG 0x01019C10
676
677#define CFG_CS5_START 0xD0000000
678#define CFG_CS5_SIZE 0x01208000
679#define CFG_CS5_CFG 0x1414BF10
680#endif
681
wdenk64519362004-07-11 17:40:54 +0000682#define CFG_RESET_ADDRESS 0xff000000
683
684/*-----------------------------------------------------------------------
685 * USB stuff
686 *-----------------------------------------------------------------------
687 */
688#define CONFIG_USB_CLOCK 0x0001BBBB
689#define CONFIG_USB_CONFIG 0x00001000
690
691/*-----------------------------------------------------------------------
692 * IDE/ATA stuff Supports IDE harddisk
693 *-----------------------------------------------------------------------
694 */
695
wdenk7dd13292004-07-11 20:04:51 +0000696#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
wdenk64519362004-07-11 17:40:54 +0000697
wdenk7dd13292004-07-11 20:04:51 +0000698#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
699#undef CONFIG_IDE_LED /* LED for ide not supported */
wdenk64519362004-07-11 17:40:54 +0000700
wdenk7dd13292004-07-11 20:04:51 +0000701#define CONFIG_IDE_RESET /* reset for ide supported */
wdenk64519362004-07-11 17:40:54 +0000702#define CONFIG_IDE_PREINIT
703
704#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
wdenka5948882005-03-27 23:41:39 +0000705#define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
wdenk64519362004-07-11 17:40:54 +0000706
707#define CFG_ATA_IDE0_OFFSET 0x0000
708
709#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
710
711/* Offset for data I/O */
712#define CFG_ATA_DATA_OFFSET (0x0060)
713
714/* Offset for normal register accesses */
715#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
716
717/* Offset for alternate registers */
718#define CFG_ATA_ALT_OFFSET (0x005C)
719
wdenk7dd13292004-07-11 20:04:51 +0000720/* Interval between registers */
721#define CFG_ATA_STRIDE 4
wdenk64519362004-07-11 17:40:54 +0000722
Bartlomiej Sieka7a432ce2007-06-08 14:52:22 +0200723/*-----------------------------------------------------------------------
724 * Open firmware flat tree support
725 *-----------------------------------------------------------------------
726 */
Grant Likely8d1e6e72007-09-06 09:46:23 -0600727#define CONFIG_OF_LIBFDT 1
Bartlomiej Sieka7a432ce2007-06-08 14:52:22 +0200728#define CONFIG_OF_BOARD_SETUP 1
729
Bartlomiej Sieka7a432ce2007-06-08 14:52:22 +0200730#define OF_CPU "PowerPC,5200@0"
731#define OF_SOC "soc5200@f0000000"
732#define OF_TBCLK (bd->bi_busfreq / 4)
733#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
734
wdenk64519362004-07-11 17:40:54 +0000735#endif /* __CONFIG_H */