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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Simon Glass437e2b82012-02-23 03:28:41 +00002/*
3 * Copyright (c) 2004-2008 Texas Instruments
4 *
5 * (C) Copyright 2002
6 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
Simon Glass437e2b82012-02-23 03:28:41 +00007 */
8
Marc Zyngierc0451ec2014-07-12 14:24:02 +01009#include <config.h>
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080010#include <asm/psci.h>
Marc Zyngierc0451ec2014-07-12 14:24:02 +010011
Simon Glass437e2b82012-02-23 03:28:41 +000012OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
13OUTPUT_ARCH(arm)
14ENTRY(_start)
15SECTIONS
16{
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080017#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
Peng Fan2e9e9a82015-10-23 10:13:03 +080018 /*
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080019 * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
20 * bundle with u-boot, and code offsets are fixed. Secure zone
21 * only needs to be copied from the loading address to
22 * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
23 * address for secure code.
Peng Fan2e9e9a82015-10-23 10:13:03 +080024 *
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080025 * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
26 * be included in u-boot address space, and some absolute address
27 * were used in secure code. The absolute addresses of the secure
28 * code also needs to be relocated along with the accompanying u-boot
29 * code.
30 *
31 * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
Peng Fan2e9e9a82015-10-23 10:13:03 +080032 */
33 /DISCARD/ : { *(.rel._secure*) }
Wang Dongsheng7eab3a62016-01-18 11:02:40 +080034#endif
Simon Glass437e2b82012-02-23 03:28:41 +000035 . = 0x00000000;
36
37 . = ALIGN(4);
Ilias Apalodimascdb58392024-03-15 08:43:50 +020038 __image_copy_start = ADDR(.text);
Simon Glass437e2b82012-02-23 03:28:41 +000039 .text :
40 {
Albert ARIBAUD9852cc62014-04-15 16:13:51 +020041 *(.vectors)
Stephen Warrenadddf452012-10-22 06:19:32 +000042 CPUDIR/start.o (.text*)
Alexander Graf94a10f22018-06-12 07:48:37 +020043 }
44
45 /* This needs to come before *(.text*) */
Ilias Apalodimas772acf82024-03-15 08:43:51 +020046 .efi_runtime : {
Ilias Apalodimas048a9ec2024-03-15 08:43:49 +020047 __efi_runtime_start = .;
Alexander Graf94a10f22018-06-12 07:48:37 +020048 *(.text.efi_runtime*)
49 *(.rodata.efi_runtime*)
50 *(.data.efi_runtime*)
Ilias Apalodimas048a9ec2024-03-15 08:43:49 +020051 __efi_runtime_stop = .;
Alexander Graf94a10f22018-06-12 07:48:37 +020052 }
53
54 .text_rest :
55 {
Stephen Warrenadddf452012-10-22 06:19:32 +000056 *(.text*)
Simon Glass437e2b82012-02-23 03:28:41 +000057 }
Marc Zyngierc0451ec2014-07-12 14:24:02 +010058
Jan Kiszkaac31b5a2015-04-21 07:18:24 +020059#ifdef CONFIG_ARMV7_NONSEC
Marc Zyngierc0451ec2014-07-12 14:24:02 +010060
Chen-Yu Tsai277a8f62016-06-19 12:38:34 +080061 /* Align the secure section only if we're going to use it in situ */
Chen-Yu Tsaia7eb9d32018-09-06 11:56:28 +080062 .__secure_start
Chen-Yu Tsai277a8f62016-06-19 12:38:34 +080063#ifndef CONFIG_ARMV7_SECURE_BASE
64 ALIGN(CONSTANT(COMMONPAGESIZE))
65#endif
Chen-Yu Tsaia7eb9d32018-09-06 11:56:28 +080066 : {
Chen-Yu Tsai277a8f62016-06-19 12:38:34 +080067 KEEP(*(.__secure_start))
68 }
69
Marc Zyngierc0451ec2014-07-12 14:24:02 +010070#ifndef CONFIG_ARMV7_SECURE_BASE
Tom Rinia17db832023-01-10 11:19:31 -050071#define __ARMV7_SECURE_BASE
Chen-Yu Tsai72a48002016-06-07 10:54:27 +080072#define __ARMV7_PSCI_STACK_IN_RAM
Tom Rinia17db832023-01-10 11:19:31 -050073#else
74#define __ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_BASE
Marc Zyngierc0451ec2014-07-12 14:24:02 +010075#endif
76
Tom Rinia17db832023-01-10 11:19:31 -050077 .secure_text __ARMV7_SECURE_BASE :
Marc Zyngierc0451ec2014-07-12 14:24:02 +010078 AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
79 {
80 *(._secure.text)
81 }
82
Chen-Yu Tsai5ed03872016-07-05 21:45:06 +080083 .secure_data : AT(LOADADDR(.secure_text) + SIZEOF(.secure_text))
84 {
85 *(._secure.data)
86 }
87
Masahiro Yamada2aa46c02016-09-26 14:21:30 +090088#ifdef CONFIG_ARMV7_PSCI
Chen-Yu Tsai5ed03872016-07-05 21:45:06 +080089 .secure_stack ALIGN(ADDR(.secure_data) + SIZEOF(.secure_data),
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080090 CONSTANT(COMMONPAGESIZE)) (NOLOAD) :
Chen-Yu Tsai72a48002016-06-07 10:54:27 +080091#ifdef __ARMV7_PSCI_STACK_IN_RAM
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080092 AT(ADDR(.secure_stack))
93#else
Chen-Yu Tsai5ed03872016-07-05 21:45:06 +080094 AT(LOADADDR(.secure_data) + SIZEOF(.secure_data))
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080095#endif
96 {
97 KEEP(*(.__secure_stack_start))
Masahiro Yamada2aa46c02016-09-26 14:21:30 +090098
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080099 /* Skip addreses for stack */
100 . = . + CONFIG_ARMV7_PSCI_NR_CPUS * ARM_PSCI_STACK_SIZE;
Masahiro Yamada2aa46c02016-09-26 14:21:30 +0900101
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +0800102 /* Align end of stack section to page boundary */
103 . = ALIGN(CONSTANT(COMMONPAGESIZE));
104
105 KEEP(*(.__secure_stack_end))
Chen-Yu Tsai3de210c2016-06-19 12:38:39 +0800106
107#ifdef CONFIG_ARMV7_SECURE_MAX_SIZE
108 /*
109 * We are not checking (__secure_end - __secure_start) here,
110 * as these are the load addresses, and do not include the
111 * stack section. Instead, use the end of the stack section
112 * and the start of the text section.
113 */
114 ASSERT((. - ADDR(.secure_text)) <= CONFIG_ARMV7_SECURE_MAX_SIZE,
115 "Error: secure section exceeds secure memory size");
116#endif
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +0800117 }
118
119#ifndef __ARMV7_PSCI_STACK_IN_RAM
120 /* Reset VMA but don't allocate space if we have secure SRAM */
121 . = LOADADDR(.secure_stack);
Chen-Yu Tsai72a48002016-06-07 10:54:27 +0800122#endif
123
Masahiro Yamada2aa46c02016-09-26 14:21:30 +0900124#endif
125
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +0800126 .__secure_end : AT(ADDR(.__secure_end)) {
Marc Zyngierc0451ec2014-07-12 14:24:02 +0100127 *(.__secure_end)
128 LONG(0x1d1071c); /* Must output something to reset LMA */
129 }
130#endif
Simon Glass437e2b82012-02-23 03:28:41 +0000131
132 . = ALIGN(4);
133 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
134
135 . = ALIGN(4);
136 .data : {
Stephen Warrenadddf452012-10-22 06:19:32 +0000137 *(.data*)
Simon Glass437e2b82012-02-23 03:28:41 +0000138 }
139
140 . = ALIGN(4);
141
142 . = .;
Simon Glass437e2b82012-02-23 03:28:41 +0000143
144 . = ALIGN(4);
Andrew Scull5a9095c2022-05-30 10:00:04 +0000145 __u_boot_list : {
146 KEEP(*(SORT(__u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +0000147 }
148
Ilias Apalodimas772acf82024-03-15 08:43:51 +0200149 .efi_runtime_rel : {
Ilias Apalodimas9b378942024-03-15 08:43:47 +0200150 __efi_runtime_rel_start = .;
Alexander Graf94a10f22018-06-12 07:48:37 +0200151 *(.rel*.efi_runtime)
152 *(.rel*.efi_runtime.*)
Ilias Apalodimas9b378942024-03-15 08:43:47 +0200153 __efi_runtime_rel_stop = .;
Alexander Graf0bd425a2016-03-04 01:10:01 +0100154 }
155
Tom Rini06ca0cf2017-06-14 09:13:21 -0400156 . = ALIGN(4);
Ilias Apalodimascdb58392024-03-15 08:43:50 +0200157 __image_copy_end = .;
Simon Glass437e2b82012-02-23 03:28:41 +0000158
Ilias Apalodimas772acf82024-03-15 08:43:51 +0200159 /*
160 * if CONFIG_USE_ARCH_MEMSET is not selected __bss_end - __bss_start
161 * needs to be a multiple of 4 and we overlay .bss with .rel.dyn
162 */
Ilias Apalodimas45b1bd92024-03-15 08:43:48 +0200163 .rel.dyn ALIGN(4) : {
164 __rel_dyn_start = .;
Simon Glass437e2b82012-02-23 03:28:41 +0000165 *(.rel*)
Ilias Apalodimas45b1bd92024-03-15 08:43:48 +0200166 __rel_dyn_end = .;
Simon Glass437e2b82012-02-23 03:28:41 +0000167 }
168
Ilias Apalodimas80808462024-05-28 09:18:27 +0300169 _end = .;
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +0100170 _image_binary_end = .;
Simon Glass437e2b82012-02-23 03:28:41 +0000171
172 /*
173 * Deprecated: this MMU section is used by pxa at present but
174 * should not be used by new boards/CPUs.
175 */
176 . = ALIGN(4096);
177 .mmutable : {
178 *(.mmutable)
179 }
180
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000181/*
Ilias Apalodimas6d1e1b82024-03-15 08:43:46 +0200182 * These sections occupy the same memory, but their lifetimes do
183 * not overlap: U-Boot initializes .bss only after applying dynamic
184 * relocations and therefore after it doesn't need .rel.dyn any more.
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000185 */
Ilias Apalodimas6d1e1b82024-03-15 08:43:46 +0200186 .bss ADDR(.rel.dyn) (OVERLAY): {
187 __bss_start = .;
Stephen Warrenadddf452012-10-22 06:19:32 +0000188 *(.bss*)
Ilias Apalodimas6d1e1b82024-03-15 08:43:46 +0200189 . = ALIGN(4);
190 __bss_end = .;
Simon Glass437e2b82012-02-23 03:28:41 +0000191 }
192
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +0100193 .dynsym _image_binary_end : { *(.dynsym) }
Albert ARIBAUD95fc6d62013-11-07 14:21:46 +0100194 .dynbss : { *(.dynbss) }
195 .dynstr : { *(.dynstr*) }
196 .dynamic : { *(.dynamic*) }
197 .plt : { *(.plt*) }
198 .interp : { *(.interp*) }
Andreas Färber438a1672014-01-27 05:48:11 +0100199 .gnu.hash : { *(.gnu.hash) }
Albert ARIBAUD95fc6d62013-11-07 14:21:46 +0100200 .gnu : { *(.gnu*) }
201 .ARM.exidx : { *(.ARM.exidx*) }
Albert ARIBAUDddadbed2014-01-13 14:57:05 +0100202 .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
Simon Glass437e2b82012-02-23 03:28:41 +0000203}