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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Ilko Iliev61fdb732009-06-12 21:20:39 +02002/*
3 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01004 * Stelian Pop <stelian@popies.net>
Ilko Iliev61fdb732009-06-12 21:20:39 +02005 * Lead Tech Design <www.leadtechdesign.com>
6 * Copyright (C) 2008 Ronetix Ilko Iliev (www.ronetix.at)
7 * Copyright (C) 2009 Jean-Christopher PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Ilko Iliev61fdb732009-06-12 21:20:39 +02008 */
9
10#include <common.h>
Simon Glass8e16b1e2019-12-28 10:45:05 -070011#include <init.h>
Simon Glassf5c208d2019-11-14 12:57:20 -070012#include <vsprintf.h>
Alexey Brodkin267d8e22014-02-26 17:47:58 +040013#include <linux/sizes.h>
Asen Dimov6a595142011-07-26 04:48:41 +000014#include <asm/io.h>
Andreas Bießmanna4c24d32013-11-29 12:13:45 +010015#include <asm/gpio.h>
Ilko Iliev61fdb732009-06-12 21:20:39 +020016#include <asm/arch/at91sam9_smc.h>
17#include <asm/arch/at91_common.h>
Ilko Iliev61fdb732009-06-12 21:20:39 +020018#include <asm/arch/at91_rstc.h>
Asen Dimov9128acd2010-04-06 16:18:04 +030019#include <asm/arch/at91_matrix.h>
Ilko Iliev61fdb732009-06-12 21:20:39 +020020#include <asm/arch/clk.h>
Asen Dimov6a595142011-07-26 04:48:41 +000021#include <asm/arch/gpio.h>
Ilko Iliev61fdb732009-06-12 21:20:39 +020022#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
23#include <net.h>
24#endif
25#include <netdev.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060026#include <asm/mach-types.h>
Ilko Iliev61fdb732009-06-12 21:20:39 +020027
28DECLARE_GLOBAL_DATA_PTR;
29
30/* ------------------------------------------------------------------------- */
31/*
32 * Miscelaneous platform dependent initialisations
33 */
34
35#ifdef CONFIG_CMD_NAND
36static void pm9261_nand_hw_init(void)
37{
38 unsigned long csa;
Asen Dimov6a595142011-07-26 04:48:41 +000039 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
40 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
Ilko Iliev61fdb732009-06-12 21:20:39 +020041
42 /* Enable CS3 */
Asen Dimov9128acd2010-04-06 16:18:04 +030043 csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A;
44 writel(csa, &matrix->csa);
Ilko Iliev61fdb732009-06-12 21:20:39 +020045
46 /* Configure SMC CS3 for NAND/SmartMedia */
Asen Dimov9128acd2010-04-06 16:18:04 +030047 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
48 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
49 &smc->cs[3].setup);
50
51 writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
52 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
53 &smc->cs[3].pulse);
54
55 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
56 &smc->cs[3].cycle);
57
58 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
59 AT91_SMC_MODE_EXNW_DISABLE |
Ilko Iliev61fdb732009-06-12 21:20:39 +020060#ifdef CONFIG_SYS_NAND_DBW_16
Asen Dimov9128acd2010-04-06 16:18:04 +030061 AT91_SMC_MODE_DBW_16 |
Ilko Iliev61fdb732009-06-12 21:20:39 +020062#else /* CONFIG_SYS_NAND_DBW_8 */
Asen Dimov9128acd2010-04-06 16:18:04 +030063 AT91_SMC_MODE_DBW_8 |
Ilko Iliev61fdb732009-06-12 21:20:39 +020064#endif
Asen Dimov9128acd2010-04-06 16:18:04 +030065 AT91_SMC_MODE_TDF_CYCLE(2),
66 &smc->cs[3].mode);
67
Wenyou Yang78f89762016-02-03 10:16:50 +080068 at91_periph_clk_enable(ATMEL_ID_PIOA);
69 at91_periph_clk_enable(ATMEL_ID_PIOC);
Ilko Iliev61fdb732009-06-12 21:20:39 +020070
71 /* Configure RDY/BSY */
Andreas Bießmanna4c24d32013-11-29 12:13:45 +010072 gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
Ilko Iliev61fdb732009-06-12 21:20:39 +020073
74 /* Enable NandFlash */
Andreas Bießmanna4c24d32013-11-29 12:13:45 +010075 gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
Ilko Iliev61fdb732009-06-12 21:20:39 +020076
Asen Dimov9128acd2010-04-06 16:18:04 +030077 at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* NANDOE */
78 at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* NANDWE */
Ilko Iliev61fdb732009-06-12 21:20:39 +020079}
80#endif
81
82
83#ifdef CONFIG_DRIVER_DM9000
84static void pm9261_dm9000_hw_init(void)
85{
Asen Dimov6a595142011-07-26 04:48:41 +000086 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
Asen Dimov9128acd2010-04-06 16:18:04 +030087
Ilko Iliev61fdb732009-06-12 21:20:39 +020088 /* Configure SMC CS2 for DM9000 */
Asen Dimov9128acd2010-04-06 16:18:04 +030089 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
90 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
91 &smc->cs[2].setup);
92
93 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) |
94 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8),
95 &smc->cs[2].pulse);
96
97 writel(AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16),
98 &smc->cs[2].cycle);
99
100 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
101 AT91_SMC_MODE_EXNW_DISABLE |
102 AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 |
103 AT91_SMC_MODE_TDF_CYCLE(1),
104 &smc->cs[2].mode);
Ilko Iliev61fdb732009-06-12 21:20:39 +0200105
106 /* Configure Interrupt pin as input, no pull-up */
Wenyou Yang78f89762016-02-03 10:16:50 +0800107 at91_periph_clk_enable(ATMEL_ID_PIOA);
Asen Dimov9128acd2010-04-06 16:18:04 +0300108 at91_set_pio_input(AT91_PIO_PORTA, 24, 0);
Ilko Iliev61fdb732009-06-12 21:20:39 +0200109}
110#endif
111
Asen Dimov7aa4dc02011-12-09 10:59:07 +0000112int board_early_init_f(void)
Ilko Iliev61fdb732009-06-12 21:20:39 +0200113{
Asen Dimov7aa4dc02011-12-09 10:59:07 +0000114 return 0;
115}
116
117int board_init(void)
118{
119 /* arch number of PM9261-Board */
120 gd->bd->bi_arch_number = MACH_TYPE_PM9261;
121
Ilko Iliev61fdb732009-06-12 21:20:39 +0200122 /* adress of boot parameters */
123 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
124
Ilko Iliev61fdb732009-06-12 21:20:39 +0200125#ifdef CONFIG_CMD_NAND
126 pm9261_nand_hw_init();
127#endif
Ilko Iliev61fdb732009-06-12 21:20:39 +0200128#ifdef CONFIG_DRIVER_DM9000
129 pm9261_dm9000_hw_init();
130#endif
Ilko Iliev61fdb732009-06-12 21:20:39 +0200131 return 0;
132}
133
Ilko Ilievc120e9e2009-09-05 02:51:34 +0200134#ifdef CONFIG_DRIVER_DM9000
135int board_eth_init(bd_t *bis)
136{
137 return dm9000_initialize(bis);
138}
139#endif
140
Ilko Iliev61fdb732009-06-12 21:20:39 +0200141int dram_init(void)
142{
Asen Dimov5aae7462010-12-12 12:41:30 +0200143 /* dram_init must store complete ramsize in gd->ram_size */
Albert ARIBAUDa9606732011-07-03 05:55:33 +0000144 gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
Asen Dimov5aae7462010-12-12 12:41:30 +0200145 PHYS_SDRAM_SIZE);
146 return 0;
147}
148
Simon Glass2f949c32017-03-31 08:40:32 -0600149int dram_init_banksize(void)
Asen Dimov5aae7462010-12-12 12:41:30 +0200150{
Ilko Iliev61fdb732009-06-12 21:20:39 +0200151 gd->bd->bi_dram[0].start = PHYS_SDRAM;
152 gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
Simon Glass2f949c32017-03-31 08:40:32 -0600153
154 return 0;
Ilko Iliev61fdb732009-06-12 21:20:39 +0200155}
156
157#ifdef CONFIG_RESET_PHY_R
158void reset_phy(void)
159{
160#ifdef CONFIG_DRIVER_DM9000
161 /*
162 * Initialize ethernet HW addr prior to starting Linux,
163 * needed for nfsroot
164 */
Joe Hershberger3dbe17e2015-03-22 17:09:06 -0500165 eth_init();
Ilko Iliev61fdb732009-06-12 21:20:39 +0200166#endif
167}
168#endif
169
170#ifdef CONFIG_DISPLAY_BOARDINFO
171int checkboard (void)
172{
173 char buf[32];
174
175 printf ("Board : Ronetix PM9261\n");
176 printf ("Crystal frequency: %8s MHz\n",
177 strmhz(buf, get_main_clk_rate()));
178 printf ("CPU clock : %8s MHz\n",
179 strmhz(buf, get_cpu_clk_rate()));
180 printf ("Master clock : %8s MHz\n",
181 strmhz(buf, get_mck_clk_rate()));
182
183 return 0;
184}
185#endif