blob: bb2e7bedd106b3bdea7d0129bd4b347468d52996 [file] [log] [blame]
Tom Rinie33610c2021-12-14 13:36:35 -05001config ARCH_MAP_SYSMEM
Tom Rini53320122022-04-06 09:21:25 -04002 depends on SANDBOX
Tom Rinie33610c2021-12-14 13:36:35 -05003 def_bool y
4
Masahiro Yamada58654502015-07-15 20:59:29 +09005config CREATE_ARCH_SYMLINK
6 bool
7
Masahiro Yamada332b8292016-06-28 10:48:42 +09008config HAVE_ARCH_IOREMAP
9 bool
10
Heinrich Schuchardt8593a632024-11-03 18:54:00 +010011config HAVE_SETJMP
12 bool
13 help
14 The architecture supports setjmp() and longjmp().
15
Jiaxun Yang33e289a2024-07-17 16:07:02 +080016config SUPPORT_BIG_ENDIAN
17 bool
18
19config SUPPORT_LITTLE_ENDIAN
20 bool
21 default y if !SUPPORT_BIG_ENDIAN
22
Tom Rini3ef67ae2021-08-26 11:47:59 -040023config SYS_CACHE_SHIFT_4
24 bool
25
26config SYS_CACHE_SHIFT_5
27 bool
28
29config SYS_CACHE_SHIFT_6
30 bool
31
32config SYS_CACHE_SHIFT_7
33 bool
34
Dan Carpenter13ec9f82024-03-04 10:04:15 +030035config 32BIT
36 bool
37
38config 64BIT
39 bool
Andrew Goodbody5b5322c2024-12-16 18:07:35 +000040 help
41 Indicates that U-Boot proper will be built for a 64 bit
42 architecture.
43
44config SPL_64BIT
45 bool
46 help
47 Indicates that SPL will be built for a 64 bit architecture.
Dan Carpenter13ec9f82024-03-04 10:04:15 +030048
Tom Rini3ef67ae2021-08-26 11:47:59 -040049config SYS_CACHELINE_SIZE
50 int
51 default 128 if SYS_CACHE_SHIFT_7
52 default 64 if SYS_CACHE_SHIFT_6
53 default 32 if SYS_CACHE_SHIFT_5
54 default 16 if SYS_CACHE_SHIFT_4
55 # Fall-back for MIPS
56 default 32 if MIPS
57
Simon Glassb87153c2020-12-16 21:20:06 -070058config LINKER_LIST_ALIGN
59 int
60 default 32 if SANDBOX
61 default 8 if ARM64 || X86
62 default 4
63 help
64 Force the each linker list to be aligned to this boundary. This
65 is required if ll_entry_get() is used, since otherwise the linker
66 may add padding into the table, thus breaking it.
67 See linker_lists.rst for full details.
68
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090069choice
70 prompt "Architecture select"
71 default SANDBOX
72
73config ARC
74 bool "ARC architecture"
Michal Simek84f3dec2018-07-23 15:55:13 +020075 select ARC_TIMER
Vlad Zakharova465df72017-03-21 14:49:49 +030076 select CLK
Michal Simekd5d59bd2020-08-19 10:44:20 +020077 select DM
Michal Simek84f3dec2018-07-23 15:55:13 +020078 select HAVE_PRIVATE_LIBGCC
79 select SUPPORT_OF_CONTROL
Tom Rini3ef67ae2021-08-26 11:47:59 -040080 select SYS_CACHE_SHIFT_7
Vlad Zakharova465df72017-03-21 14:49:49 +030081 select TIMER
Jiaxun Yang33e289a2024-07-17 16:07:02 +080082 select SUPPORT_BIG_ENDIAN
83 select SUPPORT_LITTLE_ENDIAN
Tom Rini7b7e0ad2022-07-31 21:08:23 -040084 select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN
85 select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090086
87config ARM
88 bool "ARM architecture"
Heinrich Schuchardt8593a632024-11-03 18:54:00 +010089 select HAVE_SETJMP
Marek Behún4778a582021-05-20 13:24:22 +020090 select ARCH_SUPPORTS_LTO
Masahiro Yamada58654502015-07-15 20:59:29 +090091 select CREATE_ARCH_SYMLINK
Masahiro Yamada06280592015-07-03 16:13:09 +090092 select HAVE_PRIVATE_LIBGCC if !ARM64
Simon Glasse170f682021-12-01 09:02:38 -070093 select SUPPORT_ACPI
Jiaxun Yang33e289a2024-07-17 16:07:02 +080094 select SUPPORT_LITTLE_ENDIAN
Masahiro Yamada9fadbc82014-09-22 19:59:05 +090095 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090096
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090097config M68K
98 bool "M68000 architecture"
angelo@sysam.it5e798172015-12-06 17:47:59 +010099 select HAVE_PRIVATE_LIBGCC
Angelo Dureghello6000ebc2023-02-07 23:45:03 +0100100 select USE_PRIVATE_LIBGCC
Derald D. Woodseb730bd2018-01-22 17:17:10 -0600101 select SYS_BOOT_GET_CMDLINE
102 select SYS_BOOT_GET_KBD
Tom Rini3ef67ae2021-08-26 11:47:59 -0400103 select SYS_CACHE_SHIFT_4
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800104 select SUPPORT_BIG_ENDIAN
Angelo Dureghelloe007b152019-03-13 21:46:51 +0100105 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900106
107config MICROBLAZE
108 bool "MicroBlaze architecture"
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800109 select SUPPORT_BIG_ENDIAN
110 select SUPPORT_LITTLE_ENDIAN
Masahiro Yamada9fadbc82014-09-22 19:59:05 +0900111 select SUPPORT_OF_CONTROL
Michal Simeke8e52772022-06-24 14:16:32 +0200112 imply CMD_TIMER
113 imply SPL_REGMAP if SPL
114 imply SPL_TIMER if SPL
115 imply TIMER
116 imply XILINX_TIMER
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900117
118config MIPS
119 bool "MIPS architecture"
Masahiro Yamada332b8292016-06-28 10:48:42 +0900120 select HAVE_ARCH_IOREMAP
Masahiro Yamada9520b712014-10-24 01:30:43 +0900121 select HAVE_PRIVATE_LIBGCC
Daniel Schwierzeckde5b6e22015-12-19 20:20:48 +0100122 select SUPPORT_OF_CONTROL
Sean Anderson13871e12022-04-12 10:59:04 -0400123 select SPL_SEPARATE_BSS if SPL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900124
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900125config NIOS2
126 bool "Nios II architecture"
Thomas Chouc6170262015-10-21 21:34:57 +0800127 select CPU
Michal Simek84f3dec2018-07-23 15:55:13 +0200128 select DM
Tom Rini7d3684a2023-01-16 15:46:49 -0500129 select DM_EVENT
Michal Simek84f3dec2018-07-23 15:55:13 +0200130 select OF_CONTROL
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800131 select SUPPORT_LITTLE_ENDIAN
Michal Simek84f3dec2018-07-23 15:55:13 +0200132 select SUPPORT_OF_CONTROL
Michal Simek2e7c8192018-07-23 15:55:14 +0200133 imply CMD_DM
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900134
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900135config PPC
136 bool "PowerPC architecture"
Masahiro Yamada9520b712014-10-24 01:30:43 +0900137 select HAVE_PRIVATE_LIBGCC
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800138 select SUPPORT_BIG_ENDIAN
Simon Glass90f83c82015-02-07 11:51:35 -0700139 select SUPPORT_OF_CONTROL
Derald D. Woodseb730bd2018-01-22 17:17:10 -0600140 select SYS_BOOT_GET_CMDLINE
141 select SYS_BOOT_GET_KBD
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900142
Rick Chen3301bfc2017-12-26 13:55:58 +0800143config RISCV
Bin Meng6b697752018-09-26 06:55:06 -0700144 bool "RISC-V architecture"
Anup Patel0af3e852019-02-25 08:14:04 +0000145 select CREATE_ARCH_SYMLINK
Heinrich Schuchardt8593a632024-11-03 18:54:00 +0100146 select HAVE_SETJMP
Heinrich Schuchardt934addc2023-12-19 16:04:06 +0100147 select SUPPORT_ACPI
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800148 select SUPPORT_LITTLE_ENDIAN
Rick Chen3301bfc2017-12-26 13:55:58 +0800149 select SUPPORT_OF_CONTROL
Bin Menga760eba2018-09-26 06:55:19 -0700150 select OF_CONTROL
151 select DM
Tom Rini7d3684a2023-01-16 15:46:49 -0500152 select DM_EVENT
Zong Li324463e2022-11-16 07:08:39 +0000153 imply SPL_SEPARATE_BSS if SPL
Bin Meng3880c382018-09-26 06:55:20 -0700154 imply DM_SERIAL
Bin Meng3880c382018-09-26 06:55:20 -0700155 imply DM_MMC
156 imply DM_SPI
157 imply DM_SPI_FLASH
158 imply BLK
159 imply CLK
160 imply MTD
161 imply TIMER
Bin Menga760eba2018-09-26 06:55:19 -0700162 imply CMD_DM
Lukas Auer396f0bd2019-08-21 21:14:45 +0200163 imply SPL_DM
164 imply SPL_OF_CONTROL
165 imply SPL_LIBCOMMON_SUPPORT
166 imply SPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600167 imply SPL_SERIAL
Lukas Auer396f0bd2019-08-21 21:14:45 +0200168 imply SPL_TIMER
Rick Chen3301bfc2017-12-26 13:55:58 +0800169
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900170config SANDBOX
171 bool "Sandbox"
Heinrich Schuchardt8593a632024-11-03 18:54:00 +0100172 select HAVE_SETJMP
Marek Behún72434932021-05-20 13:24:07 +0200173 select ARCH_SUPPORTS_LTO
Tom Rini22d567e2017-01-22 19:43:11 -0500174 select BOARD_LATE_INIT
Michael Walle8ffe86c2020-05-22 14:07:38 +0200175 select BZIP2
Simon Glassc13bbdc2023-10-26 14:31:34 -0400176 select CMD_POWEROFF if CMDLINE
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900177 select DM
Tom Rini7d3684a2023-01-16 15:46:49 -0500178 select DM_EVENT
Andrew Scull451b8b12022-05-30 10:00:12 +0000179 select DM_FUZZING_ENGINE
Michal Simek84f3dec2018-07-23 15:55:13 +0200180 select DM_GPIO
181 select DM_I2C
Masahiro Yamadab11b2352016-09-08 18:47:35 +0900182 select DM_KEYBOARD
Michal Simek84f3dec2018-07-23 15:55:13 +0200183 select DM_MMC
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900184 select DM_SERIAL
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900185 select DM_SPI
Michal Simek84f3dec2018-07-23 15:55:13 +0200186 select DM_SPI_FLASH
Michael Walle8ffe86c2020-05-22 14:07:38 +0200187 select GZIP_COMPRESSED
Tom Rini6a4a9082022-11-19 18:45:23 -0500188 select IO_TRACE
Tom Rinic20bb732017-07-22 18:36:16 -0400189 select LZO
Tom Riniddb1ec12024-01-10 13:46:10 -0500190 select MTD
Heinrich Schuchardta3fc9a42020-03-14 12:13:40 +0100191 select OF_BOARD_SETUP
Ramon Friedc64f19b2019-04-27 11:15:23 +0300192 select PCI_ENDPOINT
Michal Simek84f3dec2018-07-23 15:55:13 +0200193 select SPI
194 select SUPPORT_OF_CONTROL
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800195 select SUPPORT_BIG_ENDIAN
196 select SUPPORT_LITTLE_ENDIAN
Simon Glassc13bbdc2023-10-26 14:31:34 -0400197 select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
Tom Rini3ef67ae2021-08-26 11:47:59 -0400198 select SYS_CACHE_SHIFT_4
Wasim Khan4dab60b2021-03-08 16:48:16 +0100199 select IRQ
Simon Glassc13bbdc2023-10-26 14:31:34 -0400200 select SUPPORT_EXTENSION_SCAN if CMDLINE
Simon Glassa6cee932021-12-01 09:02:36 -0700201 select SUPPORT_ACPI
Bin Meng0c0d9b02018-08-02 23:58:03 -0700202 imply BITREVERSE
Simon Glass78b0ef52018-11-15 18:43:53 -0700203 select BLOBLIST
Marek Behúnf8bd43f2021-05-20 13:24:08 +0200204 imply LTO
Michal Simek2e7c8192018-07-23 15:55:14 +0200205 imply CMD_DM
Heinrich Schuchardt0e298732020-11-12 00:29:59 +0100206 imply CMD_EXCEPTION
Simon Glassf4cb4742017-05-17 03:25:44 -0600207 imply CMD_GETTIME
Simon Glass027608e2017-05-17 03:25:25 -0600208 imply CMD_HASH
Simon Glass3bebbe62017-05-17 03:25:34 -0600209 imply CMD_IO
Simon Glass30daabc2017-05-17 03:25:36 -0600210 imply CMD_IOTRACE
Simon Glassbecaa8f2017-05-17 03:25:43 -0600211 imply CMD_LZMADEC
Tom Rinie5289a72019-05-29 17:01:28 -0400212 imply CMD_SF
Michal Simek84f3dec2018-07-23 15:55:13 +0200213 imply CMD_SF_TEST
Tom Rinid8532af2017-06-02 11:03:50 -0400214 imply CRC32_VERIFY
215 imply FAT_WRITE
Rajan Vajab3b2ddb2018-09-19 03:43:46 -0700216 imply FIRMWARE
Andrew Scull451b8b12022-05-30 10:00:12 +0000217 imply FUZZING_ENGINE_SANDBOX
Daniel Thompsona9e2c672017-05-19 17:26:58 +0100218 imply HASH_VERIFY
Tom Rinid8532af2017-06-02 11:03:50 -0400219 imply LZMA
Jens Wiklanderdca252d2018-09-25 16:40:17 +0200220 imply TEE
Jens Wiklanderf1edae92018-09-25 16:40:23 +0200221 imply AVB_VERIFY
222 imply LIBAVB
223 imply CMD_AVB
Heinrich Schuchardtce33bcd2022-01-16 13:04:06 +0100224 imply PARTITION_TYPE_GUID
Igor Opaniuk623369c2021-02-14 16:27:27 +0100225 imply SCP03
226 imply CMD_SCP03
Jens Wiklanderf1edae92018-09-25 16:40:23 +0200227 imply UDP_FUNCTION_FASTBOOT
Bin Meng1bb290d2018-10-15 02:21:26 -0700228 imply VIRTIO_MMIO
229 imply VIRTIO_PCI
230 imply VIRTIO_SANDBOX
Simon Glasse6832e62024-11-07 14:31:48 -0700231 # Re-enable this when fully implemented
232 # imply VIRTIO_BLK
Bin Meng1bb290d2018-10-15 02:21:26 -0700233 imply VIRTIO_NET
Simon Glass799b29b2018-12-10 10:37:31 -0700234 imply DM_SOUND
Ramon Friedc64f19b2019-04-27 11:15:23 +0300235 imply PCI_SANDBOX_EP
Simon Glass98d88f82019-02-16 20:24:49 -0700236 imply PCH
Alex Marginean0daa53a2019-06-03 19:12:28 +0300237 imply PHYLIB
238 imply DM_MDIO
Alex Marginean0649be52019-07-12 10:13:53 +0300239 imply DM_MDIO_MUX
Simon Glasse264be42023-05-04 16:54:57 -0600240 imply ACPI
Simon Glass8c501022019-12-06 21:41:54 -0700241 imply ACPI_PMC
242 imply ACPI_PMC_SANDBOX
243 imply CMD_PMC
John Chaufce6f982020-07-02 12:01:21 +0800244 imply CMD_CLONE
Simon Glass07a88862020-11-05 10:33:38 -0700245 imply SILENT_CONSOLE
Simon Glass529e2082020-11-05 10:33:48 -0700246 imply BOOTARGS_SUBST
Claudiu Manoild9eaa922021-03-14 20:14:57 +0800247 imply PHY_FIXED
248 imply DM_DSA
Kory Maincent965a34f2021-05-04 19:31:23 +0200249 imply CMD_EXTENSION
Simon Glass278efc682021-11-24 09:26:44 -0700250 imply KEYBOARD
Simon Glassef9e7622021-11-24 09:26:42 -0700251 imply PHYSMEM
Simon Glass29e64b52021-12-01 09:02:43 -0700252 imply GENERATE_ACPI_TABLE
Philippe Reynes462d1632022-03-28 22:56:53 +0200253 imply BINMAN
Alexander Gendin038cb022023-10-09 01:24:36 +0000254 imply CMD_MBR
255 imply CMD_MMC
Simon Glassb1dee9e2023-10-26 14:31:33 -0400256 imply BOOTSTD_DEFAULTS if BOOTSTD_FULL && CMDLINE
257 imply BOOTMETH_DISTRO if BOOTSTD_FULL && CMDLINE
258 imply CMD_SYSBOOT if BOOTSTD_FULL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900259
260config SH
261 bool "SuperH architecture"
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800262 select SUPPORT_LITTLE_ENDIAN
Masahiro Yamada9520b712014-10-24 01:30:43 +0900263 select HAVE_PRIVATE_LIBGCC
Marek Vasut8fc9fa12019-08-31 18:27:58 +0200264 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900265
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900266config X86
267 bool "x86 architecture"
Heinrich Schuchardt8593a632024-11-03 18:54:00 +0100268 select HAVE_SETJMP
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600269 select SUPPORT_SPL
270 select SUPPORT_TPL
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800271 select SUPPORT_LITTLE_ENDIAN
Masahiro Yamada58654502015-07-15 20:59:29 +0900272 select CREATE_ARCH_SYMLINK
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900273 select DM
Bin Meng59c4aa42018-10-15 02:21:16 -0700274 select HAVE_ARCH_IOMAP
Michal Simek84f3dec2018-07-23 15:55:13 +0200275 select HAVE_PRIVATE_LIBGCC
276 select OF_CONTROL
Bin Meng0e0204d2017-07-30 06:23:16 -0700277 select PCI
Simon Glassa6cee932021-12-01 09:02:36 -0700278 select SUPPORT_ACPI
Michal Simek84f3dec2018-07-23 15:55:13 +0200279 select SUPPORT_OF_CONTROL
Tom Rini3ef67ae2021-08-26 11:47:59 -0400280 select SYS_CACHE_SHIFT_6
Bin Mengf0e1c3e2017-07-30 06:23:07 -0700281 select TIMER
Michal Simek84f3dec2018-07-23 15:55:13 +0200282 select USE_PRIVATE_LIBGCC
Bin Mengf0e1c3e2017-07-30 06:23:07 -0700283 select X86_TSC_TIMER
Wasim Khan4a7fef72021-03-08 16:48:15 +0100284 select IRQ
Simon Glassf69c0092020-07-19 13:55:52 -0600285 imply HAS_ROM if X86_RESET_VECTOR
Bin Meng73f5bc12017-07-30 19:24:02 -0700286 imply BLK
Michal Simek2e7c8192018-07-23 15:55:14 +0200287 imply CMD_DM
Michal Simek84f3dec2018-07-23 15:55:13 +0200288 imply CMD_FPGA_LOADMK
289 imply CMD_GETTIME
290 imply CMD_IO
291 imply CMD_IRQ
292 imply CMD_PCI
Tom Rinie5289a72019-05-29 17:01:28 -0400293 imply CMD_SF
Michal Simek84f3dec2018-07-23 15:55:13 +0200294 imply CMD_SF_TEST
Bin Meng0e0204d2017-07-30 06:23:16 -0700295 imply DM_GPIO
296 imply DM_KEYBOARD
Simon Glass828b7252017-07-30 19:24:01 -0700297 imply DM_MMC
Bin Meng0e0204d2017-07-30 06:23:16 -0700298 imply DM_RTC
Tom Rini15a2ab52023-10-27 20:59:51 -0400299 imply SCSI
Michal Simek84f3dec2018-07-23 15:55:13 +0200300 imply DM_SERIAL
Tom Riniddb1ec12024-01-10 13:46:10 -0500301 imply MTD
Bin Meng0e0204d2017-07-30 06:23:16 -0700302 imply DM_SPI
303 imply DM_SPI_FLASH
304 imply DM_USB
Simon Glass1cedca12023-08-21 21:17:01 -0600305 imply LAST_STAGE_INIT
Simon Glass52cb5042022-10-18 07:46:31 -0600306 imply VIDEO
Bin Mengaf5b8d22018-07-19 03:07:33 -0700307 imply SYSRESET
Kever Yang525ea472019-04-02 20:41:25 +0800308 imply SPL_SYSRESET
Bin Mengaf5b8d22018-07-19 03:07:33 -0700309 imply SYSRESET_X86
Chris Packhamb110e112017-08-28 20:50:46 +1200310 imply USB_ETHER_ASIX
311 imply USB_ETHER_SMSC95XX
Michal Simek84f3dec2018-07-23 15:55:13 +0200312 imply USB_HOST_ETHER
Simon Glass98d88f82019-02-16 20:24:49 -0700313 imply PCH
Simon Glassef9e7622021-11-24 09:26:42 -0700314 imply PHYSMEM
Simon Glass56382fb2019-05-02 10:52:24 -0600315 imply RTC_MC146818
Simon Glasse264be42023-05-04 16:54:57 -0600316 imply ACPI
Simon Glassb0282282021-12-01 09:02:39 -0700317 imply ACPIGEN if !QEMU && !EFI_APP
Simon Glassbee77f62020-11-05 06:32:17 -0700318 imply SYSINFO if GENERATE_SMBIOS_TABLE
319 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
Simon Glass65831d92021-12-18 11:27:50 -0700320 imply TIMESTAMP
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900321
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600322 # Thing to enable for when SPL/TPL are enabled: SPL
323 imply SPL_DM
324 imply SPL_OF_LIBFDT
Simon Glass284cb9c2021-07-10 21:14:31 -0600325 imply SPL_DRIVERS_MISC
Simon Glass035939e2021-07-10 21:14:30 -0600326 imply SPL_GPIO
Simon Glass7b1ecb82019-12-06 21:42:51 -0700327 imply SPL_PINCTRL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600328 imply SPL_LIBCOMMON_SUPPORT
329 imply SPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600330 imply SPL_SERIAL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600331 imply SPL_SPI_FLASH_SUPPORT
Simon Glassa5820472021-08-08 12:20:14 -0600332 imply SPL_SPI
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600333 imply SPL_OF_CONTROL
334 imply SPL_TIMER
335 imply SPL_REGMAP
336 imply SPL_SYSCON
337 # TPL
338 imply TPL_DM
Simon Glass284cb9c2021-07-10 21:14:31 -0600339 imply TPL_DRIVERS_MISC
Simon Glass035939e2021-07-10 21:14:30 -0600340 imply TPL_GPIO
Simon Glass7b1ecb82019-12-06 21:42:51 -0700341 imply TPL_PINCTRL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600342 imply TPL_LIBCOMMON_SUPPORT
343 imply TPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600344 imply TPL_SERIAL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600345 imply TPL_OF_CONTROL
346 imply TPL_TIMER
347 imply TPL_REGMAP
348 imply TPL_SYSCON
349
Chris Zankel1387dab2016-08-10 18:36:44 +0300350config XTENSA
351 bool "Xtensa architecture"
352 select CREATE_ARCH_SYMLINK
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800353 select SUPPORT_LITTLE_ENDIAN
Chris Zankel1387dab2016-08-10 18:36:44 +0300354 select SUPPORT_OF_CONTROL
355
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900356endchoice
357
Masahiro Yamada52a5f972014-09-14 03:01:48 +0900358config SYS_ARCH
359 string
360 help
361 This option should contain the architecture name to build the
362 appropriate arch/<CONFIG_SYS_ARCH> directory.
363 All the architectures should specify this option correctly.
364
365config SYS_CPU
366 string
367 help
368 This option should contain the CPU name to build the correct
369 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
370
371 This is optional. For those targets without the CPU directory,
372 leave this option empty.
373
374config SYS_SOC
375 string
376 help
377 This option should contain the SoC name to build the directory
378 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
379
380 This is optional. For those targets without the SoC directory,
381 leave this option empty.
382
383config SYS_VENDOR
384 string
385 help
386 This option should contain the vendor name of the target board.
387 If it is set and
388 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
389 directory is compiled.
390 If CONFIG_SYS_BOARD is also set, the sources under
391 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
392
393 This is optional. For those targets without the vendor directory,
394 leave this option empty.
395
396config SYS_BOARD
397 string
398 help
399 This option should contain the name of the target board.
400 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
401 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
402 whether CONFIG_SYS_VENDOR is set or not.
403
404 This is optional. For those targets without the board directory,
405 leave this option empty.
406
407config SYS_CONFIG_NAME
Tom Rinibce01ee2024-01-22 17:39:20 -0500408 string "Board header file" if ARCH_MESON || ARCH_VERSAL || \
409 ARCH_VERSAL_NET || ARCH_ZYNQ || ARCH_ZYNQMP || \
410 ARCH_ZYNQMP_R5 || MICROBLAZE || NIOS2
411 default "meson64" if ARCH_MESON
412 default "microblaze-generic" if MICROBLAZE
413 default "xilinx_versal" if ARCH_VERSAL
414 default "xilinx_versal_net" if ARCH_VERSAL_NET
415 default "xilinx_zynqmp" if ARCH_ZYNQMP
416 default "xilinx_zynqmp_r5" if ARCH_ZYNQMP_R5
417 default "zynq-common" if ARCH_ZYNQ
Masahiro Yamada52a5f972014-09-14 03:01:48 +0900418 help
419 This option should contain the base name of board header file.
420 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
421 should be included from include/config.h.
422
Vignesh Raghavendra384c1412019-04-22 21:43:32 +0530423config SYS_DISABLE_DCACHE_OPS
424 bool
425 help
426 This option disables dcache flush and dcache invalidation
427 operations. For example, on coherent systems where cache
428 operatios are not required, enable this option to avoid them.
429 Note that, its up to the individual architectures to implement
430 this functionality.
431
Tom Rinie9269a02021-12-12 22:12:30 -0500432config SYS_IMMR
Tom Rini0c4dded2022-03-30 09:30:15 -0400433 hex "Address for the Internal Memory-Mapped Registers (IMMR) window"
Tom Rinie9269a02021-12-12 22:12:30 -0500434 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
435 default 0xFF000000 if MPC8xx
436 default 0xF0000000 if ARCH_MPC8313
437 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
438 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
Pali Rohárc68991e2022-05-02 18:29:25 +0200439 default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \
440 ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \
441 ARCH_P2020
Tom Rinie9269a02021-12-12 22:12:30 -0500442 default SYS_CCSRBAR_DEFAULT
443 help
444 Address for the Internal Memory-Mapped Registers (IMMR) window used
445 to configure the features of many Freescale / NXP SoCs.
446
Tom Rinib73cd902022-12-02 16:42:36 -0500447config MONITOR_IS_IN_RAM
448 bool "U-Boot is loaded in to RAM by a pre-loader"
449 depends on M68K || NIOS2
450
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100451menu "Skipping low level initialization functions"
Tom Rini53320122022-04-06 09:21:25 -0400452 depends on ARM || MIPS || RISCV
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100453
454config SKIP_LOWLEVEL_INIT
455 bool "Skip calls to certain low level initialization functions"
Tom Rinie1e85442021-08-27 21:18:30 -0400456 help
457 If enabled, then certain low level initializations (like setting up
458 the memory controller) are omitted and/or U-Boot does not relocate
459 itself into RAM.
460 Normally this variable MUST NOT be defined. The only exception is
461 when U-Boot is loaded (to RAM) by some other boot loader or by a
462 debugger which performs these initializations itself.
463
464config SPL_SKIP_LOWLEVEL_INIT
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100465 bool "Skip calls to certain low level initialization functions in SPL"
466 depends on SPL
Tom Rinie1e85442021-08-27 21:18:30 -0400467 help
468 If enabled, then certain low level initializations (like setting up
469 the memory controller) are omitted and/or U-Boot does not relocate
470 itself into RAM.
471 Normally this variable MUST NOT be defined. The only exception is
472 when U-Boot is loaded (to RAM) by some other boot loader or by a
473 debugger which performs these initializations itself.
474
475config TPL_SKIP_LOWLEVEL_INIT
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100476 bool "Skip calls to certain low level initialization functions in TPL"
Tom Rinie1e85442021-08-27 21:18:30 -0400477 depends on SPL && ARM
478 help
479 If enabled, then certain low level initializations (like setting up
480 the memory controller) are omitted and/or U-Boot does not relocate
481 itself into RAM.
482 Normally this variable MUST NOT be defined. The only exception is
483 when U-Boot is loaded (to RAM) by some other boot loader or by a
484 debugger which performs these initializations itself.
485
486config SKIP_LOWLEVEL_INIT_ONLY
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100487 bool "Skip call to lowlevel_init during early boot ONLY"
Tom Rinie1e85442021-08-27 21:18:30 -0400488 depends on ARM
489 help
490 This allows just the call to lowlevel_init() to be skipped. The
491 normal CP15 init (such as enabling the instruction cache) is still
492 performed.
493
494config SPL_SKIP_LOWLEVEL_INIT_ONLY
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100495 bool "Skip call to lowlevel_init during early SPL boot ONLY"
Tom Rinie1e85442021-08-27 21:18:30 -0400496 depends on SPL && ARM
497 help
498 This allows just the call to lowlevel_init() to be skipped. The
499 normal CP15 init (such as enabling the instruction cache) is still
500 performed.
501
502config TPL_SKIP_LOWLEVEL_INIT_ONLY
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100503 bool "Skip call to lowlevel_init during early TPL boot ONLY"
Tom Rinie1e85442021-08-27 21:18:30 -0400504 depends on TPL && ARM
505 help
506 This allows just the call to lowlevel_init() to be skipped. The
507 normal CP15 init (such as enabling the instruction cache) is still
508 performed.
509
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100510endmenu
511
Tom Rini295ab162022-10-28 20:27:10 -0400512config SYS_HAS_NONCACHED_MEMORY
513 bool "Enable reserving a non-cached memory area for drivers"
514 depends on (ARM || MIPS) && (RTL8169 || MEDIATEK_ETH)
515 help
516 This is useful for drivers that would otherwise require a lot of
517 explicit cache maintenance. For some drivers it's also impossible to
518 properly maintain the cache. For example if the regions that need to
519 be flushed are not a multiple of the cache-line size, *and* padding
520 cannot be allocated between the regions to align them (i.e. if the
521 HW requires a contiguous array of regions, and the size of each
522 region is not cache-aligned), then a flush of one region may result
523 in overwriting data that hardware has written to another region in
524 the same cache-line. This can happen for example in network drivers
525 where descriptors for buffers are typically smaller than the CPU
526 cache-line (e.g. 16 bytes vs. 32 or 64 bytes).
527
528config SYS_NONCACHED_MEMORY
529 hex "Size in bytes of the non-cached memory area"
530 depends on SYS_HAS_NONCACHED_MEMORY
531 default 0x100000
532 help
533 Size of non-cached memory area. This area of memory will be typically
534 located right below the malloc() area and mapped uncached in the MMU.
535
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900536source "arch/arc/Kconfig"
537source "arch/arm/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900538source "arch/m68k/Kconfig"
539source "arch/microblaze/Kconfig"
540source "arch/mips/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900541source "arch/nios2/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900542source "arch/powerpc/Kconfig"
543source "arch/sandbox/Kconfig"
544source "arch/sh/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900545source "arch/x86/Kconfig"
Chris Zankel1387dab2016-08-10 18:36:44 +0300546source "arch/xtensa/Kconfig"
Rick Chen3301bfc2017-12-26 13:55:58 +0800547source "arch/riscv/Kconfig"
Tom Rinia67ff802022-03-23 17:19:55 -0400548
Tom Rinic4aecf62022-06-16 14:04:36 -0400549if ARM || M68K || PPC
550
551source "arch/Kconfig.nxp"
552
553endif
554
Tom Rinia67ff802022-03-23 17:19:55 -0400555source "board/keymile/Kconfig"
Michal Simek9599f8f2022-06-24 14:14:59 +0200556
Michal Simek9599f8f2022-06-24 14:14:59 +0200557choice
558 prompt "Endianness selection"
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800559 default SYS_BIG_ENDIAN if MIPS || MICROBLAZE
560 default SYS_LITTLE_ENDIAN
Michal Simek9599f8f2022-06-24 14:14:59 +0200561 help
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800562 Some boards can be configured for either little or big endian
Michal Simek9599f8f2022-06-24 14:14:59 +0200563 byte order. These modes require different U-Boot images. In general there
564 is one preferred byteorder for a particular system but some systems are
565 just as commonly used in the one or the other endianness.
566
567config SYS_BIG_ENDIAN
568 bool "Big endian"
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800569 depends on SUPPORT_BIG_ENDIAN
Michal Simek9599f8f2022-06-24 14:14:59 +0200570
571config SYS_LITTLE_ENDIAN
572 bool "Little endian"
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800573 depends on SUPPORT_LITTLE_ENDIAN
Michal Simek9599f8f2022-06-24 14:14:59 +0200574endchoice