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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marek Vasutad43cd32017-07-21 23:15:21 +02002/*
3 * board/renesas/ulcb/ulcb.c
4 * This file is ULCB board support.
5 *
6 * Copyright (C) 2017 Renesas Electronics Corporation
Marek Vasutad43cd32017-07-21 23:15:21 +02007 */
8
Simon Glass2dc9c342020-05-10 11:40:01 -06009#include <image.h>
Simon Glass97589732020-05-10 11:40:02 -060010#include <init.h>
Marek Vasutad43cd32017-07-21 23:15:21 +020011#include <malloc.h>
12#include <netdev.h>
13#include <dm.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060014#include <asm/global_data.h>
Marek Vasutad43cd32017-07-21 23:15:21 +020015#include <dm/platform_data/serial_sh.h>
16#include <asm/processor.h>
17#include <asm/mach-types.h>
18#include <asm/io.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060019#include <linux/bitops.h>
Marek Vasutad43cd32017-07-21 23:15:21 +020020#include <linux/errno.h>
21#include <asm/arch/sys_proto.h>
22#include <asm/gpio.h>
23#include <asm/arch/gpio.h>
Marek Vasut97a070b2024-02-27 17:05:54 +010024#include <asm/arch/renesas.h>
Marek Vasutad43cd32017-07-21 23:15:21 +020025#include <asm/arch/rcar-mstp.h>
Marek Vasutad43cd32017-07-21 23:15:21 +020026#include <i2c.h>
27#include <mmc.h>
28
29DECLARE_GLOBAL_DATA_PTR;
30
Marek Vasutad43cd32017-07-21 23:15:21 +020031#define DVFS_MSTP926 BIT(26)
Marek Vasutcea5c8f2017-09-12 19:07:22 +020032#define HSUSB_MSTP704 BIT(4) /* HSUSB */
Marek Vasutad43cd32017-07-21 23:15:21 +020033
Marek Vasutad43cd32017-07-21 23:15:21 +020034int board_early_init_f(void)
35{
Tom Rini52b2e262021-08-18 23:12:24 -040036#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
Marek Vasutad43cd32017-07-21 23:15:21 +020037 /* DVFS for reset */
Hiroyuki Yokoyama7e172912018-09-26 16:00:09 +090038 mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
Marek Vasutad43cd32017-07-21 23:15:21 +020039#endif
40 return 0;
41}
42
Marek Vasutcea5c8f2017-09-12 19:07:22 +020043/* HSUSB block registers */
44#define HSUSB_REG_LPSTS 0xE6590102
45#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
46#define HSUSB_REG_UGCTRL2 0xE6590184
47#define HSUSB_REG_UGCTRL2_USB0SEL 0x30
48#define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10
49
Marek Vasutad43cd32017-07-21 23:15:21 +020050int board_init(void)
51{
Marek Vasutad43cd32017-07-21 23:15:21 +020052 /* USB1 pull-up */
53 setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
54
Marek Vasutcea5c8f2017-09-12 19:07:22 +020055 /* Configure the HSUSB block */
Hiroyuki Yokoyama7e172912018-09-26 16:00:09 +090056 mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
Marek Vasutcea5c8f2017-09-12 19:07:22 +020057 /* Choice USB0SEL */
58 clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
59 HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
60 /* low power status */
61 setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);
62
Marek Vasut7cf1c7f2017-08-20 17:13:48 +020063 return 0;
Marek Vasutad43cd32017-07-21 23:15:21 +020064}
Marek Vasutad43cd32017-07-21 23:15:21 +020065
Marek Vasut4726f062018-12-04 01:44:34 +010066#ifdef CONFIG_MULTI_DTB_FIT
67int board_fit_config_name_match(const char *name)
68{
69 /* PRR driver is not available yet */
Marek Vasut30fe98e2024-02-27 17:05:45 +010070 u32 cpu_type = renesas_get_cpu_type();
Marek Vasut4726f062018-12-04 01:44:34 +010071
Marek Vasutf9726612024-02-27 17:05:47 +010072 if ((cpu_type == RENESAS_CPU_TYPE_R8A7795) &&
Marek Vasutaf667542024-03-18 15:59:37 +010073 !strcmp(name, "r8a77951-ulcb"))
Marek Vasut4726f062018-12-04 01:44:34 +010074 return 0;
75
Marek Vasutf9726612024-02-27 17:05:47 +010076 if ((cpu_type == RENESAS_CPU_TYPE_R8A7796) &&
Marek Vasute789aeb2024-03-17 07:23:38 +010077 !strcmp(name, "r8a77960-ulcb"))
Marek Vasut4726f062018-12-04 01:44:34 +010078 return 0;
79
Marek Vasutf9726612024-02-27 17:05:47 +010080 if ((cpu_type == RENESAS_CPU_TYPE_R8A77965) &&
Marek Vasute789aeb2024-03-17 07:23:38 +010081 !strcmp(name, "r8a77965-ulcb"))
Marek Vasut5d611db2019-03-04 12:34:50 +010082 return 0;
83
Marek Vasut4726f062018-12-04 01:44:34 +010084 return -1;
85}
86#endif