wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 1 | /* |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 2 | * (C) Copyright 2003-2004 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 3 | * MPC Data Limited (http://www.mpc-data.co.uk) |
| 4 | * Dave Peverley <dpeverley at mpc-data.co.uk> |
| 5 | * |
| 6 | * Configuation settings for the TI OMAP Perseus 2 board. |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #ifndef __CONFIG_H |
| 28 | #define __CONFIG_H |
| 29 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 30 | /* allow to overwrite serial and ethaddr */ |
| 31 | #define CONFIG_ENV_OVERWRITE |
| 32 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 33 | /* |
| 34 | * High Level Configuration Options |
| 35 | * (easy to change) |
| 36 | */ |
| 37 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 38 | #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */ |
| 39 | #define CONFIG_OMAP 1 /* in a TI OMAP core */ |
| 40 | #define CONFIG_OMAP730 1 /* which is in a 730 */ |
| 41 | #define CONFIG_P2_OMAP730 1 /* a Perseus 2 Board */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 42 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 43 | /* |
| 44 | * Input clock of PLL |
| 45 | * The OMAP730 Perseus 2 has 13MHz input clock |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 46 | */ |
| 47 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 48 | #define CONFIG_SYS_CLK_FREQ 13000000 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 49 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 50 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 51 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 52 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 53 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 54 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 55 | /* |
| 56 | * Size of malloc() pool |
| 57 | */ |
| 58 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 59 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 60 | |
| 61 | /* |
| 62 | * Hardware drivers |
| 63 | */ |
| 64 | |
Nishanth Menon | ee1c20f | 2009-10-16 00:06:37 -0500 | [diff] [blame] | 65 | #define CONFIG_LAN91C96 |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 66 | #define CONFIG_LAN91C96_BASE 0x04000300 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 67 | #define CONFIG_LAN91C96_EXT_PHY |
| 68 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 69 | /* |
| 70 | * NS16550 Configuration |
| 71 | */ |
| 72 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 73 | #define CONFIG_SYS_NS16550 |
| 74 | #define CONFIG_SYS_NS16550_SERIAL |
| 75 | #define CONFIG_SYS_NS16550_REG_SIZE (1) |
| 76 | #define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */ |
| 77 | #define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 78 | * on perseus */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 79 | |
| 80 | /* |
| 81 | * select serial console configuration |
| 82 | */ |
| 83 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 84 | #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP730 Perseus 2 */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 85 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 86 | #define CONFIG_CONS_INDEX 1 |
| 87 | #define CONFIG_BAUDRATE 115200 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 88 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 89 | /* |
Jon Loeliger | 4bd7e1b | 2007-07-04 22:33:13 -0500 | [diff] [blame] | 90 | * Command line configuration. |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 91 | */ |
Jon Loeliger | 4bd7e1b | 2007-07-04 22:33:13 -0500 | [diff] [blame] | 92 | #include <config_cmd_default.h> |
| 93 | |
| 94 | #define CONFIG_CMD_DHCP |
| 95 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 96 | |
Jon Loeliger | c6d535a | 2007-07-09 21:57:31 -0500 | [diff] [blame] | 97 | /* |
| 98 | * BOOTP options |
| 99 | */ |
| 100 | #define CONFIG_BOOTP_SUBNETMASK |
| 101 | #define CONFIG_BOOTP_GATEWAY |
| 102 | #define CONFIG_BOOTP_HOSTNAME |
| 103 | #define CONFIG_BOOTP_BOOTPATH |
| 104 | |
Jon Loeliger | 4bd7e1b | 2007-07-04 22:33:13 -0500 | [diff] [blame] | 105 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 106 | #include <configs/omap730.h> |
| 107 | #include <configs/h2_p2_dbg_board.h> |
| 108 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 109 | #define CONFIG_BOOTDELAY 3 |
| 110 | #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw ip=bootp" |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 111 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 112 | #define CONFIG_LOADADDR 0x10000000 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 113 | |
| 114 | #define CONFIG_ETHADDR |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 115 | #define CONFIG_NETMASK 255.255.255.0 |
| 116 | #define CONFIG_IPADDR 192.168.0.23 |
| 117 | #define CONFIG_SERVERIP 192.150.0.100 |
| 118 | #define CONFIG_BOOTFILE "uImage" /* File to load */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 119 | |
Jon Loeliger | 4bd7e1b | 2007-07-04 22:33:13 -0500 | [diff] [blame] | 120 | #if defined(CONFIG_CMD_KGDB) |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 121 | #define CONFIG_KGDB_BAUDRATE 115200 /* Speed to run kgdb serial port */ |
| 122 | #define CONFIG_KGDB_SER_INDEX 1 /* Which serial port to use */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 123 | #endif |
| 124 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 125 | /* |
| 126 | * Miscellaneous configurable options |
| 127 | */ |
| 128 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 129 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 130 | #define CONFIG_SYS_PROMPT "OMAP730 P2 # " /* Monitor Command Prompt */ |
| 131 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 132 | /* Print Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 133 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
| 134 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 135 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 136 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 137 | #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ |
| 138 | #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 139 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 140 | #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 141 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 142 | /* The OMAP730 has 3 general purpose MPU timers, they can be driven by |
| 143 | * the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 144 | * local divisor. |
| 145 | */ |
Ladislav Michl | 993e57d | 2009-03-30 18:58:41 +0200 | [diff] [blame] | 146 | #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ |
| 147 | #define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ |
| 148 | #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 149 | |
| 150 | /*----------------------------------------------------------------------- |
| 151 | * Stack sizes |
| 152 | * |
| 153 | * The stack sizes are set up in start.S using the settings below |
| 154 | */ |
| 155 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 156 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 157 | #ifdef CONFIG_USE_IRQ |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 158 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| 159 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 160 | #endif |
| 161 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 162 | /*----------------------------------------------------------------------- |
| 163 | * Physical Memory Map |
| 164 | */ |
| 165 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 166 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
| 167 | #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ |
| 168 | #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 169 | |
| 170 | #if defined(CONFIG_CS0_BOOT) |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 171 | #define PHYS_FLASH_1 0x0C000000 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 172 | #elif defined(CONFIG_CS3_BOOT) |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 173 | #define PHYS_FLASH_1 0x00000000 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 174 | #else |
| 175 | #error Unknown Boot Chip-Select number |
| 176 | #endif |
| 177 | |
Aneesh V | 963bff7 | 2011-06-09 08:54:57 -0400 | [diff] [blame] | 178 | #define PHYS_SRAM 0x20000000 |
| 179 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 180 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 181 | |
| 182 | /*----------------------------------------------------------------------- |
| 183 | * FLASH and environment organization |
| 184 | */ |
| 185 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 186 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 187 | #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 188 | #define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 189 | /* addr of environment */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 190 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000) |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 191 | |
| 192 | /* timeout values are in ticks */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 193 | #define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
| 194 | #define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 195 | |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 196 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 197 | #define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ |
| 198 | #define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 199 | |
Aneesh V | 963bff7 | 2011-06-09 08:54:57 -0400 | [diff] [blame] | 200 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 201 | #define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM |
| 202 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 203 | #endif /* ! __CONFIG_H */ |