wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 1 | /* |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 2 | * (C) Copyright 2003-2004 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 3 | * MPC Data Limited (http://www.mpc-data.co.uk) |
| 4 | * Dave Peverley <dpeverley at mpc-data.co.uk> |
| 5 | * |
| 6 | * Configuation settings for the TI OMAP Perseus 2 board. |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #ifndef __CONFIG_H |
| 28 | #define __CONFIG_H |
| 29 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 30 | /* allow to overwrite serial and ethaddr */ |
| 31 | #define CONFIG_ENV_OVERWRITE |
| 32 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 33 | /* |
| 34 | * High Level Configuration Options |
| 35 | * (easy to change) |
| 36 | */ |
| 37 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 38 | #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */ |
| 39 | #define CONFIG_OMAP 1 /* in a TI OMAP core */ |
| 40 | #define CONFIG_OMAP730 1 /* which is in a 730 */ |
| 41 | #define CONFIG_P2_OMAP730 1 /* a Perseus 2 Board */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 42 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 43 | /* |
| 44 | * Input clock of PLL |
| 45 | * The OMAP730 Perseus 2 has 13MHz input clock |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 46 | */ |
| 47 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 48 | #define CONFIG_SYS_CLK_FREQ 13000000 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 49 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 50 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 51 | |
| 52 | #define CONFIG_MISC_INIT_R |
| 53 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 54 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 55 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 56 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 57 | /* |
| 58 | * Size of malloc() pool |
| 59 | */ |
| 60 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 61 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 62 | |
| 63 | /* |
| 64 | * Hardware drivers |
| 65 | */ |
| 66 | |
Nishanth Menon | ee1c20f | 2009-10-16 00:06:37 -0500 | [diff] [blame] | 67 | #define CONFIG_NET_MULTI |
| 68 | #define CONFIG_LAN91C96 |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 69 | #define CONFIG_LAN91C96_BASE 0x04000300 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 70 | #define CONFIG_LAN91C96_EXT_PHY |
| 71 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 72 | /* |
| 73 | * NS16550 Configuration |
| 74 | */ |
| 75 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 76 | #define CONFIG_SYS_NS16550 |
| 77 | #define CONFIG_SYS_NS16550_SERIAL |
| 78 | #define CONFIG_SYS_NS16550_REG_SIZE (1) |
| 79 | #define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */ |
| 80 | #define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 81 | * on perseus */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 82 | |
| 83 | /* |
| 84 | * select serial console configuration |
| 85 | */ |
| 86 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 87 | #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP730 Perseus 2 */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 88 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 89 | #define CONFIG_CONS_INDEX 1 |
| 90 | #define CONFIG_BAUDRATE 115200 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 91 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 92 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 93 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 94 | /* |
Jon Loeliger | 4bd7e1b | 2007-07-04 22:33:13 -0500 | [diff] [blame] | 95 | * Command line configuration. |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 96 | */ |
Jon Loeliger | 4bd7e1b | 2007-07-04 22:33:13 -0500 | [diff] [blame] | 97 | #include <config_cmd_default.h> |
| 98 | |
| 99 | #define CONFIG_CMD_DHCP |
| 100 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 101 | |
Jon Loeliger | c6d535a | 2007-07-09 21:57:31 -0500 | [diff] [blame] | 102 | /* |
| 103 | * BOOTP options |
| 104 | */ |
| 105 | #define CONFIG_BOOTP_SUBNETMASK |
| 106 | #define CONFIG_BOOTP_GATEWAY |
| 107 | #define CONFIG_BOOTP_HOSTNAME |
| 108 | #define CONFIG_BOOTP_BOOTPATH |
| 109 | |
Jon Loeliger | 4bd7e1b | 2007-07-04 22:33:13 -0500 | [diff] [blame] | 110 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 111 | #include <configs/omap730.h> |
| 112 | #include <configs/h2_p2_dbg_board.h> |
| 113 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 114 | #define CONFIG_BOOTDELAY 3 |
| 115 | #define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd root=/dev/nfs rw ip=bootp" |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 116 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 117 | #define CONFIG_LOADADDR 0x10000000 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 118 | |
| 119 | #define CONFIG_ETHADDR |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 120 | #define CONFIG_NETMASK 255.255.255.0 |
| 121 | #define CONFIG_IPADDR 192.168.0.23 |
| 122 | #define CONFIG_SERVERIP 192.150.0.100 |
| 123 | #define CONFIG_BOOTFILE "uImage" /* File to load */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 124 | |
Jon Loeliger | 4bd7e1b | 2007-07-04 22:33:13 -0500 | [diff] [blame] | 125 | #if defined(CONFIG_CMD_KGDB) |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 126 | #define CONFIG_KGDB_BAUDRATE 115200 /* Speed to run kgdb serial port */ |
| 127 | #define CONFIG_KGDB_SER_INDEX 1 /* Which serial port to use */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 128 | #endif |
| 129 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 130 | /* |
| 131 | * Miscellaneous configurable options |
| 132 | */ |
| 133 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 134 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 135 | #define CONFIG_SYS_PROMPT "OMAP730 P2 # " /* Monitor Command Prompt */ |
| 136 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 137 | /* Print Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 138 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
| 139 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 140 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 141 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | #define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ |
| 143 | #define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 144 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 145 | #define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 146 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 147 | /* The OMAP730 has 3 general purpose MPU timers, they can be driven by |
| 148 | * the RefClk (12Mhz) or by DPLL1. This time is further subdivided by a |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 149 | * local divisor. |
| 150 | */ |
Ladislav Michl | 993e57d | 2009-03-30 18:58:41 +0200 | [diff] [blame] | 151 | #define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ |
| 152 | #define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ |
| 153 | #define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 154 | |
| 155 | /*----------------------------------------------------------------------- |
| 156 | * Stack sizes |
| 157 | * |
| 158 | * The stack sizes are set up in start.S using the settings below |
| 159 | */ |
| 160 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 161 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 162 | #ifdef CONFIG_USE_IRQ |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 163 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| 164 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 165 | #endif |
| 166 | |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 167 | /*----------------------------------------------------------------------- |
| 168 | * Physical Memory Map |
| 169 | */ |
| 170 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 171 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
| 172 | #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ |
| 173 | #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 174 | |
| 175 | #if defined(CONFIG_CS0_BOOT) |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 176 | #define PHYS_FLASH_1 0x0C000000 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 177 | #elif defined(CONFIG_CS3_BOOT) |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 178 | #define PHYS_FLASH_1 0x00000000 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 179 | #else |
| 180 | #error Unknown Boot Chip-Select number |
| 181 | #endif |
| 182 | |
Aneesh V | 963bff7 | 2011-06-09 08:54:57 -0400 | [diff] [blame^] | 183 | #define PHYS_SRAM 0x20000000 |
| 184 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 185 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 186 | |
| 187 | /*----------------------------------------------------------------------- |
| 188 | * FLASH and environment organization |
| 189 | */ |
| 190 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 191 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 192 | #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 193 | #define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 194 | /* addr of environment */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 195 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000) |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 196 | |
| 197 | /* timeout values are in ticks */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 198 | #define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
| 199 | #define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 200 | |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 201 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 202 | #define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ |
| 203 | #define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */ |
wdenk | e3a0680 | 2004-06-06 23:13:55 +0000 | [diff] [blame] | 204 | |
Aneesh V | 963bff7 | 2011-06-09 08:54:57 -0400 | [diff] [blame^] | 205 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 206 | #define CONFIG_SYS_INIT_SP_ADDR PHYS_SRAM |
| 207 | |
wdenk | 914be13 | 2004-06-08 00:22:43 +0000 | [diff] [blame] | 208 | #endif /* ! __CONFIG_H */ |