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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Paul Kocialkowski3dee0002015-07-20 15:17:11 +02002/*
Paul Kocialkowski4db92762016-02-07 16:50:50 +01003 * LG Optimus Black codename sniper config
Paul Kocialkowski3dee0002015-07-20 15:17:11 +02004 *
5 * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
Paul Kocialkowski3dee0002015-07-20 15:17:11 +02006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11#include <asm/arch/cpu.h>
12#include <asm/arch/omap.h>
13
14/*
15 * CPU
16 */
17
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020018#define CONFIG_ARM_ARCH_CP15_ERRATA
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020019
20/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020021 * Board
22 */
23
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020024/*
25 * Clocks
26 */
27
28#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
29#define CONFIG_SYS_PTV 2
30
31#define V_NS16550_CLK 48000000
32#define V_OSCK 26000000
33#define V_SCLK (V_OSCK >> 1)
34
35/*
36 * DRAM
37 */
38
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020039#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
40#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
41
42/*
43 * Memory
44 */
45
Paul Kocialkowskid90f8832016-02-26 13:18:47 +010046#define CONFIG_SYS_SDRAM_BASE 0x80000000
47#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020048 GENERATED_GBL_DATA_SIZE)
49
50#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
51
52/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020053 * I2C
54 */
55
56#define CONFIG_SYS_I2C
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020057#define CONFIG_I2C_MULTI_BUS
58
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020059/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020060 * Input
61 */
62
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020063/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020064 * SPL
65 */
66
Tom Rinicfff4aa2016-08-26 13:30:43 -040067#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
68 CONFIG_SPL_TEXT_BASE)
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020069#define CONFIG_SPL_BSS_START_ADDR 0x80000000
70#define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024)
71#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
72#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
73#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
74
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020075#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
76#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
77
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020078#define CONFIG_SYS_CBSIZE 512
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020079
80/*
81 * Serial
82 */
83
Thomas Chou00ad1f02015-11-19 21:48:13 +080084#ifdef CONFIG_SPL_BUILD
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020085#define CONFIG_SYS_NS16550_SERIAL
86#define CONFIG_SYS_NS16550_REG_SIZE (-4)
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020087#endif
88
Thomas Chou52ac4432015-11-19 21:48:12 +080089#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020090#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020091
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020092#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \
93 115200 }
94
95/*
96 * Environment
97 */
98
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020099#define CONFIG_ENV_OVERWRITE
100
101#define CONFIG_EXTRA_ENV_SETTINGS \
102 "kernel_addr_r=0x82000000\0" \
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100103 "loadaddr=0x82000000\0" \
104 "fdt_addr_r=0x88000000\0" \
105 "fdtaddr=0x88000000\0" \
106 "ramdisk_addr_r=0x88080000\0" \
107 "pxefile_addr_r=0x80100000\0" \
108 "scriptaddr=0x80000000\0" \
109 "bootm_size=0x10000000\0" \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200110 "boot_mmc_dev=0\0" \
111 "kernel_mmc_part=3\0" \
112 "recovery_mmc_part=4\0" \
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100113 "fdtfile=omap3-sniper.dtb\0" \
114 "bootfile=/boot/extlinux/extlinux.conf\0" \
Paul Kocialkowskic6b6c7f2016-03-29 14:16:21 +0200115 "bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0"
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200116
117/*
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100118 * ATAGs
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200119 */
120
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200121#define CONFIG_SETUP_MEMORY_TAGS
122#define CONFIG_CMDLINE_TAG
123#define CONFIG_INITRD_TAG
124#define CONFIG_REVISION_TAG
Paul Kocialkowskic29a72f2015-07-20 15:17:14 +0200125#define CONFIG_SERIAL_TAG
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200126
127/*
128 * Boot
129 */
130
131#define CONFIG_SYS_LOAD_ADDR 0x82000000
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200132
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200133#define CONFIG_BOOTCOMMAND \
134 "setenv boot_mmc_part ${kernel_mmc_part}; " \
Paul Kocialkowski248b7912015-07-20 15:17:12 +0200135 "if test reboot-${reboot-mode} = reboot-r; then " \
136 "echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \
Paul Kocialkowski46f99102015-07-20 15:17:15 +0200137 "if test reboot-${reboot-mode} = reboot-b; then " \
138 "echo fastboot; fastboot 0; fi; " \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200139 "part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \
140 "part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \
141 "mmc dev ${boot_mmc_dev}; " \
142 "mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \
143 "bootm ${kernel_addr_r};"
144
145/*
146 * Defaults
147 */
148
149#include <config_defaults.h>
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200150
151#endif