blob: 34f7f6e51475920033b0907286c810044149382a [file] [log] [blame]
Paul Kocialkowski3dee0002015-07-20 15:17:11 +02001/*
2 * LG Optimus Black (P970) codename sniper config
3 *
4 * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#include <asm/arch/cpu.h>
13#include <asm/arch/omap.h>
14
15/*
16 * CPU
17 */
18
19#define CONFIG_SYS_CACHELINE_SIZE 64
20
21#define CONFIG_ARM_ARCH_CP15_ERRATA
22#define CONFIG_ARM_ERRATA_454179
23#define CONFIG_ARM_ERRATA_430973
24#define CONFIG_ARM_ERRATA_621766
25
26/*
27 * Platform
28 */
29
30#define CONFIG_OMAP
31#define CONFIG_OMAP_COMMON
32
33/*
34 * Board
35 */
36
Paul Kocialkowski248b7912015-07-20 15:17:12 +020037#define CONFIG_MISC_INIT_R
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020038
39/*
40 * Clocks
41 */
42
43#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
44#define CONFIG_SYS_PTV 2
45
46#define V_NS16550_CLK 48000000
47#define V_OSCK 26000000
48#define V_SCLK (V_OSCK >> 1)
49
50/*
51 * DRAM
52 */
53
54#define CONFIG_SDRC
55#define CONFIG_NR_DRAM_BANKS 2
56#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
57#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
58
59/*
60 * Memory
61 */
62
63#define CONFIG_SYS_TEXT_BASE 0x80100000
64#define CONFIG_SYS_SDRAM_BASE OMAP34XX_SDRC_CS0
65#define CONFIG_SYS_INIT_RAM_ADDR 0x4020F800
66#define CONFIG_SYS_INIT_RAM_SIZE 0x800
67#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
68 CONFIG_SYS_INIT_RAM_SIZE - \
69 GENERATED_GBL_DATA_SIZE)
70
71#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
72
73/*
74 * GPIO
75 */
76
77#define CONFIG_OMAP_GPIO
78#define CONFIG_OMAP3_GPIO_2
79#define CONFIG_OMAP3_GPIO_3
80#define CONFIG_OMAP3_GPIO_4
81#define CONFIG_OMAP3_GPIO_5
82#define CONFIG_OMAP3_GPIO_6
83
84/*
85 * I2C
86 */
87
88#define CONFIG_SYS_I2C
89#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
90#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
91#define CONFIG_SYS_I2C_OMAP34XX
92#define CONFIG_I2C_MULTI_BUS
93
94#define CONFIG_CMD_I2C
95
96/*
97 * Flash
98 */
99
100#define CONFIG_SYS_NO_FLASH
101
102/*
103 * MMC
104 */
105
106#define CONFIG_GENERIC_MMC
107#define CONFIG_MMC
108#define CONFIG_OMAP_HSMMC
109
110#define CONFIG_CMD_MMC
111
112/*
113 * Power
114 */
115
116#define CONFIG_TWL4030_POWER
117
118/*
119 * Input
120 */
121
122#define CONFIG_TWL4030_INPUT
123
124/*
125 * Partitions
126 */
127
128#define CONFIG_PARTITION_UUIDS
129#define CONFIG_DOS_PARTITION
130#define CONFIG_EFI_PARTITION
131
132#define CONFIG_CMD_PART
133
134/*
135 * Filesystems
136 */
137
138#define CONFIG_CMD_FS_GENERIC
139#define CONFIG_CMD_EXT2
140#define CONFIG_CMD_EXT4
141#define CONFIG_CMD_FAT
142
143/*
144 * SPL
145 */
146
147#define CONFIG_SPL_FRAMEWORK
148
149#define CONFIG_SPL_TEXT_BASE 0x40200000
150#define CONFIG_SPL_MAX_SIZE (54 * 1024)
151#define CONFIG_SPL_BSS_START_ADDR 0x80000000
152#define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024)
153#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
154#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
155#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
156
157#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
158#define CONFIG_SPL_BOARD_INIT
159
160#define CONFIG_SPL_LIBGENERIC_SUPPORT
161#define CONFIG_SPL_LIBCOMMON_SUPPORT
162#define CONFIG_SPL_LIBDISK_SUPPORT
163#define CONFIG_SPL_SERIAL_SUPPORT
164#define CONFIG_SPL_POWER_SUPPORT
165#define CONFIG_SPL_GPIO_SUPPORT
166#define CONFIG_SPL_I2C_SUPPORT
167#define CONFIG_SPL_MMC_SUPPORT
168#define CONFIG_SPL_FAT_SUPPORT
169
170#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 2
171
172#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
173#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
174
175/*
176 * Console
177 */
178
179#define CONFIG_SYS_CONSOLE_IS_IN_ENV
180
181#define CONFIG_DISPLAY_CPUINFO
182#define CONFIG_DISPLAY_BOARDINFO
183
184#define CONFIG_AUTO_COMPLETE
185
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200186#define CONFIG_SYS_LONGHELP
187#define CONFIG_SYS_HUSH_PARSER
188
189#define CONFIG_SYS_MAXARGS 16
190#define CONFIG_SYS_CBSIZE 512
191#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
192 + 16)
193
194/*
195 * Serial
196 */
197
198
199#ifndef CONFIG_SPL_BUILD
Thomas Chou52ac4432015-11-19 21:48:12 +0800200#define CONFIG_NS16550_SERIAL
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200201#else
202#define CONFIG_SYS_NS16550_SERIAL
203#define CONFIG_SYS_NS16550_REG_SIZE (-4)
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200204#endif
205
206#define CONFIG_SYS_NS16550
Thomas Chou52ac4432015-11-19 21:48:12 +0800207#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200208#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
209#define CONFIG_CONS_INDEX 3
210#define CONFIG_SERIAL3 3
211
212#define CONFIG_BAUDRATE 115200
213#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \
214 115200 }
215
216/*
Paul Kocialkowski46f99102015-07-20 15:17:15 +0200217 * USB gadget
218 */
219
220#define CONFIG_USB_MUSB_PIO_ONLY
221#define CONFIG_USB_MUSB_OMAP2PLUS
222#define CONFIG_TWL4030_USB
223
224#define CONFIG_USB_GADGET
225#define CONFIG_USB_GADGET_DUALSPEED
226#define CONFIG_USB_GADGET_VBUS_DRAW 0
227
228/*
229 * Download
230 */
231
232#define CONFIG_USB_GADGET_DOWNLOAD
233
234#define CONFIG_G_DNL_VENDOR_NUM 0x0451
235#define CONFIG_G_DNL_PRODUCT_NUM 0xd022
236#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
237
238/*
239 * Fastboot
240 */
241
242#define CONFIG_USB_FUNCTION_FASTBOOT
243
244#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
245#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
246
247#define CONFIG_FASTBOOT_FLASH
248#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
249
250#define CONFIG_CMD_FASTBOOT
251
252/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200253 * Environment
254 */
255
256#define CONFIG_ENV_SIZE (128 * 1024)
257#define CONFIG_ENV_IS_NOWHERE
258
259#define CONFIG_ENV_OVERWRITE
260
261#define CONFIG_EXTRA_ENV_SETTINGS \
262 "kernel_addr_r=0x82000000\0" \
263 "boot_mmc_dev=0\0" \
264 "kernel_mmc_part=3\0" \
265 "recovery_mmc_part=4\0" \
266 "bootargs=console=ttyO2 vram=5M,0x9FA00000 omapfb.vram=0:5M\0"
267
268/*
269 * ATAGs / Device Tree
270 */
271
272#define CONFIG_OF_LIBFDT
273#define CONFIG_SETUP_MEMORY_TAGS
274#define CONFIG_CMDLINE_TAG
275#define CONFIG_INITRD_TAG
276#define CONFIG_REVISION_TAG
Paul Kocialkowskic29a72f2015-07-20 15:17:14 +0200277#define CONFIG_SERIAL_TAG
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200278
279/*
280 * Boot
281 */
282
283#define CONFIG_SYS_LOAD_ADDR 0x82000000
284#define CONFIG_BOOTDELAY 1
285
286#define CONFIG_ANDROID_BOOT_IMAGE
287
288#define CONFIG_BOOTCOMMAND \
289 "setenv boot_mmc_part ${kernel_mmc_part}; " \
Paul Kocialkowski248b7912015-07-20 15:17:12 +0200290 "if test reboot-${reboot-mode} = reboot-r; then " \
291 "echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \
Paul Kocialkowski46f99102015-07-20 15:17:15 +0200292 "if test reboot-${reboot-mode} = reboot-b; then " \
293 "echo fastboot; fastboot 0; fi; " \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200294 "part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \
295 "part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \
296 "mmc dev ${boot_mmc_dev}; " \
297 "mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \
298 "bootm ${kernel_addr_r};"
299
300/*
301 * Defaults
302 */
303
304#include <config_defaults.h>
305
306#endif