blob: 7a665f64e19d9abcb78fc66b54f83e97a5f51d9c [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Paul Kocialkowski3dee0002015-07-20 15:17:11 +02002/*
Paul Kocialkowski4db92762016-02-07 16:50:50 +01003 * LG Optimus Black codename sniper config
Paul Kocialkowski3dee0002015-07-20 15:17:11 +02004 *
5 * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
Paul Kocialkowski3dee0002015-07-20 15:17:11 +02006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11#include <asm/arch/cpu.h>
12#include <asm/arch/omap.h>
13
14/*
15 * CPU
16 */
17
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020018#define CONFIG_ARM_ARCH_CP15_ERRATA
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020019
20/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020021 * Board
22 */
23
Paul Kocialkowski248b7912015-07-20 15:17:12 +020024#define CONFIG_MISC_INIT_R
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020025
26/*
27 * Clocks
28 */
29
30#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
31#define CONFIG_SYS_PTV 2
32
33#define V_NS16550_CLK 48000000
34#define V_OSCK 26000000
35#define V_SCLK (V_OSCK >> 1)
36
37/*
38 * DRAM
39 */
40
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020041#define CONFIG_NR_DRAM_BANKS 2
42#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
43#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
44
45/*
46 * Memory
47 */
48
Paul Kocialkowskid90f8832016-02-26 13:18:47 +010049#define CONFIG_SYS_SDRAM_BASE 0x80000000
50#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020051 GENERATED_GBL_DATA_SIZE)
52
53#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
54
55/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020056 * I2C
57 */
58
59#define CONFIG_SYS_I2C
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020060#define CONFIG_I2C_MULTI_BUS
61
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020062/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020063 * Input
64 */
65
66#define CONFIG_TWL4030_INPUT
67
68/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020069 * SPL
70 */
71
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020072#define CONFIG_SPL_TEXT_BASE 0x40200000
Tom Rinicfff4aa2016-08-26 13:30:43 -040073#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
74 CONFIG_SPL_TEXT_BASE)
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020075#define CONFIG_SPL_BSS_START_ADDR 0x80000000
76#define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024)
77#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
78#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
79#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
80
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020081#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
82#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
83
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020084#define CONFIG_SYS_CBSIZE 512
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020085
86/*
87 * Serial
88 */
89
Thomas Chou00ad1f02015-11-19 21:48:13 +080090#ifdef CONFIG_SPL_BUILD
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020091#define CONFIG_SYS_NS16550_SERIAL
92#define CONFIG_SYS_NS16550_REG_SIZE (-4)
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020093#endif
94
Thomas Chou52ac4432015-11-19 21:48:12 +080095#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020096#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020097
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020098#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \
99 115200 }
100
101/*
102 * Environment
103 */
104
105#define CONFIG_ENV_SIZE (128 * 1024)
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200106
107#define CONFIG_ENV_OVERWRITE
108
109#define CONFIG_EXTRA_ENV_SETTINGS \
110 "kernel_addr_r=0x82000000\0" \
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100111 "loadaddr=0x82000000\0" \
112 "fdt_addr_r=0x88000000\0" \
113 "fdtaddr=0x88000000\0" \
114 "ramdisk_addr_r=0x88080000\0" \
115 "pxefile_addr_r=0x80100000\0" \
116 "scriptaddr=0x80000000\0" \
117 "bootm_size=0x10000000\0" \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200118 "boot_mmc_dev=0\0" \
119 "kernel_mmc_part=3\0" \
120 "recovery_mmc_part=4\0" \
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100121 "fdtfile=omap3-sniper.dtb\0" \
122 "bootfile=/boot/extlinux/extlinux.conf\0" \
Paul Kocialkowskic6b6c7f2016-03-29 14:16:21 +0200123 "bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0"
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200124
125/*
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100126 * ATAGs
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200127 */
128
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200129#define CONFIG_SETUP_MEMORY_TAGS
130#define CONFIG_CMDLINE_TAG
131#define CONFIG_INITRD_TAG
132#define CONFIG_REVISION_TAG
Paul Kocialkowskic29a72f2015-07-20 15:17:14 +0200133#define CONFIG_SERIAL_TAG
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200134
135/*
136 * Boot
137 */
138
139#define CONFIG_SYS_LOAD_ADDR 0x82000000
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200140
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200141#define CONFIG_BOOTCOMMAND \
142 "setenv boot_mmc_part ${kernel_mmc_part}; " \
Paul Kocialkowski248b7912015-07-20 15:17:12 +0200143 "if test reboot-${reboot-mode} = reboot-r; then " \
144 "echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \
Paul Kocialkowski46f99102015-07-20 15:17:15 +0200145 "if test reboot-${reboot-mode} = reboot-b; then " \
146 "echo fastboot; fastboot 0; fi; " \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200147 "part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \
148 "part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \
149 "mmc dev ${boot_mmc_dev}; " \
150 "mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \
151 "bootm ${kernel_addr_r};"
152
153/*
154 * Defaults
155 */
156
157#include <config_defaults.h>
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200158
159#endif