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Paul Kocialkowski3dee0002015-07-20 15:17:11 +02001/*
Paul Kocialkowski4db92762016-02-07 16:50:50 +01002 * LG Optimus Black codename sniper config
Paul Kocialkowski3dee0002015-07-20 15:17:11 +02003 *
4 * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#include <asm/arch/cpu.h>
13#include <asm/arch/omap.h>
14
15/*
16 * CPU
17 */
18
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020019#define CONFIG_ARM_ARCH_CP15_ERRATA
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020020
21/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020022 * Board
23 */
24
Paul Kocialkowski248b7912015-07-20 15:17:12 +020025#define CONFIG_MISC_INIT_R
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020026
27/*
28 * Clocks
29 */
30
31#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
32#define CONFIG_SYS_PTV 2
33
34#define V_NS16550_CLK 48000000
35#define V_OSCK 26000000
36#define V_SCLK (V_OSCK >> 1)
37
38/*
39 * DRAM
40 */
41
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020042#define CONFIG_NR_DRAM_BANKS 2
43#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
44#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
45
46/*
47 * Memory
48 */
49
Paul Kocialkowskid90f8832016-02-26 13:18:47 +010050#define CONFIG_SYS_SDRAM_BASE 0x80000000
51#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020052 GENERATED_GBL_DATA_SIZE)
53
54#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
55
56/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020057 * I2C
58 */
59
60#define CONFIG_SYS_I2C
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020061#define CONFIG_I2C_MULTI_BUS
62
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020063/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020064 * Input
65 */
66
67#define CONFIG_TWL4030_INPUT
68
69/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020070 * SPL
71 */
72
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020073#define CONFIG_SPL_TEXT_BASE 0x40200000
Tom Rinicfff4aa2016-08-26 13:30:43 -040074#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
75 CONFIG_SPL_TEXT_BASE)
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020076#define CONFIG_SPL_BSS_START_ADDR 0x80000000
77#define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024)
78#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
79#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
80#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
81
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020082#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
83#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
84
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020085#define CONFIG_SYS_CBSIZE 512
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020086
87/*
88 * Serial
89 */
90
Thomas Chou00ad1f02015-11-19 21:48:13 +080091#ifdef CONFIG_SPL_BUILD
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020092#define CONFIG_SYS_NS16550_SERIAL
93#define CONFIG_SYS_NS16550_REG_SIZE (-4)
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020094#endif
95
Thomas Chou52ac4432015-11-19 21:48:12 +080096#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020097#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020098
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020099#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \
100 115200 }
101
102/*
103 * Environment
104 */
105
106#define CONFIG_ENV_SIZE (128 * 1024)
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200107
108#define CONFIG_ENV_OVERWRITE
109
110#define CONFIG_EXTRA_ENV_SETTINGS \
111 "kernel_addr_r=0x82000000\0" \
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100112 "loadaddr=0x82000000\0" \
113 "fdt_addr_r=0x88000000\0" \
114 "fdtaddr=0x88000000\0" \
115 "ramdisk_addr_r=0x88080000\0" \
116 "pxefile_addr_r=0x80100000\0" \
117 "scriptaddr=0x80000000\0" \
118 "bootm_size=0x10000000\0" \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200119 "boot_mmc_dev=0\0" \
120 "kernel_mmc_part=3\0" \
121 "recovery_mmc_part=4\0" \
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100122 "fdtfile=omap3-sniper.dtb\0" \
123 "bootfile=/boot/extlinux/extlinux.conf\0" \
Paul Kocialkowskic6b6c7f2016-03-29 14:16:21 +0200124 "bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0"
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200125
126/*
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100127 * ATAGs
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200128 */
129
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200130#define CONFIG_SETUP_MEMORY_TAGS
131#define CONFIG_CMDLINE_TAG
132#define CONFIG_INITRD_TAG
133#define CONFIG_REVISION_TAG
Paul Kocialkowskic29a72f2015-07-20 15:17:14 +0200134#define CONFIG_SERIAL_TAG
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200135
136/*
137 * Boot
138 */
139
140#define CONFIG_SYS_LOAD_ADDR 0x82000000
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200141
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200142#define CONFIG_BOOTCOMMAND \
143 "setenv boot_mmc_part ${kernel_mmc_part}; " \
Paul Kocialkowski248b7912015-07-20 15:17:12 +0200144 "if test reboot-${reboot-mode} = reboot-r; then " \
145 "echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \
Paul Kocialkowski46f99102015-07-20 15:17:15 +0200146 "if test reboot-${reboot-mode} = reboot-b; then " \
147 "echo fastboot; fastboot 0; fi; " \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200148 "part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \
149 "part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \
150 "mmc dev ${boot_mmc_dev}; " \
151 "mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \
152 "bootm ${kernel_addr_r};"
153
154/*
155 * Defaults
156 */
157
158#include <config_defaults.h>
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200159
160#endif