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git01.mediatek.com / filogic / uboot / 435970a60a10fb4d084bd4b1bfafd3261d8bab6b / . / arch / arm / dts / stm32mp15-u-boot.dtsi
blob: 8f9535a4dbc0cca22355d2aa525bd5ff47e43ae5 [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]2/*
3 * Copyright : STMicroelectronics 2018
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]4 */
5
6/ {
7 aliases {
8 gpio0 = &gpioa;
9 gpio1 = &gpiob;
10 gpio2 = &gpioc;
11 gpio3 = &gpiod;
12 gpio4 = &gpioe;
13 gpio5 = &gpiof;
14 gpio6 = &gpiog;
15 gpio7 = &gpioh;
16 gpio8 = &gpioi;
17 gpio9 = &gpioj;
18 gpio10 = &gpiok;
19 gpio25 = &gpioz;
Patrick Delaunay1b58b552019-04-12 14:38:28 +0200[diff] [blame]20 pinctrl0 = &pinctrl;
21 pinctrl1 = &pinctrl_z;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]22 };
23
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame]24 clocks {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]25 u-boot,dm-pre-reloc;
26 };
27
Patrick Delaunaycf45d9d2019-07-30 19:16:15 +0200[diff] [blame]28 /* need PSCI for sysreset during board_f */
29 psci {
30 u-boot,dm-pre-proper;
31 };
32
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame]33 reboot {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]34 u-boot,dm-pre-reloc;
35 };
36
37 soc {
38 u-boot,dm-pre-reloc;
Patrick Delaunay089d4352018-03-20 11:45:14 +0100[diff] [blame]39 };
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]40};
41
Patrick Delaunaybdd71362019-02-27 17:01:27 +0100[diff] [blame]42&bsec {
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame]43 u-boot,dm-pre-proper;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]44};
45
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]46&clk_csi {
47 u-boot,dm-pre-reloc;
48};
49
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame]50&clk_hsi {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]51 u-boot,dm-pre-reloc;
52};
53
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame]54&clk_hse {
Patrick Delaunay32ddd262018-03-20 14:15:06 +0100[diff] [blame]55 u-boot,dm-pre-reloc;
56};
57
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame]58&clk_lsi {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]59 u-boot,dm-pre-reloc;
60};
61
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame]62&clk_lse {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]63 u-boot,dm-pre-reloc;
64};
65
66&gpioa {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]67 u-boot,dm-pre-reloc;
68};
69
70&gpiob {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]71 u-boot,dm-pre-reloc;
72};
73
74&gpioc {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]75 u-boot,dm-pre-reloc;
76};
77
78&gpiod {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]79 u-boot,dm-pre-reloc;
80};
81
82&gpioe {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]83 u-boot,dm-pre-reloc;
84};
85
86&gpiof {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]87 u-boot,dm-pre-reloc;
88};
89
90&gpiog {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]91 u-boot,dm-pre-reloc;
92};
93
94&gpioh {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]95 u-boot,dm-pre-reloc;
96};
97
98&gpioi {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]99 u-boot,dm-pre-reloc;
100};
101
102&gpioj {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]103 u-boot,dm-pre-reloc;
104};
105
106&gpiok {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]107 u-boot,dm-pre-reloc;
108};
109
110&gpioz {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]111 u-boot,dm-pre-reloc;
112};
Patrice Chotard26d11072019-04-30 17:26:21 +0200[diff] [blame]113
Patrick Delaunay1ebe34b2019-07-30 19:16:14 +0200[diff] [blame]114&iwdg2 {
115 u-boot,dm-pre-reloc;
116};
117
Patrick Delaunayd918b882019-07-30 19:16:16 +0200[diff] [blame]118/* pre-reloc probe = reserve video frame buffer in video_reserve() */
119&ltdc {
120 u-boot,dm-pre-proper;
121};
122
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame]123&pinctrl {
124 u-boot,dm-pre-reloc;
125};
126
127&pinctrl_z {
128 u-boot,dm-pre-reloc;
129};
130
Patrick Delaunay900494d2020-01-28 10:10:59 +0100[diff] [blame]131&pwr_regulators {
Patrice Chotard26d11072019-04-30 17:26:21 +0200[diff] [blame]132 u-boot,dm-pre-reloc;
133};
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame]134
135&rcc {
136 u-boot,dm-pre-reloc;
Patrick Delaunayc22caac2020-01-28 10:11:03 +0100[diff] [blame]137 #address-cells = <1>;
138 #size-cells = <0>;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame]139};
140
141&sdmmc1 {
142 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
143};
144
145&sdmmc2 {
146 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
147};
148
149&sdmmc3 {
150 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
151};
152
153&usbotg_hs {
154 compatible = "st,stm32mp1-hsotg", "snps,dwc2";
155};