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git01.mediatek.com / filogic / uboot / a370530ba02f554edebb059abef470ac85b44be3 / . / arch / arm / dts / stm32mp157-u-boot.dtsi
blob: f7c7acc079d28474a799e7590c632779a3fa5051 [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]2/*
3 * Copyright : STMicroelectronics 2018
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]4 */
5
6/ {
7 aliases {
8 gpio0 = &gpioa;
9 gpio1 = &gpiob;
10 gpio2 = &gpioc;
11 gpio3 = &gpiod;
12 gpio4 = &gpioe;
13 gpio5 = &gpiof;
14 gpio6 = &gpiog;
15 gpio7 = &gpioh;
16 gpio8 = &gpioi;
17 gpio9 = &gpioj;
18 gpio10 = &gpiok;
19 gpio25 = &gpioz;
Patrick Delaunay1b58b552019-04-12 14:38:28 +0200[diff] [blame]20 pinctrl0 = &pinctrl;
21 pinctrl1 = &pinctrl_z;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]22 };
23
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame^]24 clocks {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]25 u-boot,dm-pre-reloc;
26 };
27
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame^]28 reboot {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]29 u-boot,dm-pre-reloc;
30 };
31
32 soc {
33 u-boot,dm-pre-reloc;
Patrick Delaunay089d4352018-03-20 11:45:14 +0100[diff] [blame]34 };
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]35};
36
Patrick Delaunaybdd71362019-02-27 17:01:27 +0100[diff] [blame]37&bsec {
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame^]38 u-boot,dm-pre-proper;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]39};
40
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]41&clk_csi {
42 u-boot,dm-pre-reloc;
43};
44
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame^]45&clk_hsi {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]46 u-boot,dm-pre-reloc;
47};
48
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame^]49&clk_hse {
Patrick Delaunay32ddd262018-03-20 14:15:06 +0100[diff] [blame]50 u-boot,dm-pre-reloc;
51};
52
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame^]53&clk_lsi {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]54 u-boot,dm-pre-reloc;
55};
56
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame^]57&clk_lse {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100[diff] [blame]58 u-boot,dm-pre-reloc;
59};
60
61&gpioa {
62 compatible = "st,stm32-gpio";
63 u-boot,dm-pre-reloc;
64};
65
66&gpiob {
67 compatible = "st,stm32-gpio";
68 u-boot,dm-pre-reloc;
69};
70
71&gpioc {
72 compatible = "st,stm32-gpio";
73 u-boot,dm-pre-reloc;
74};
75
76&gpiod {
77 compatible = "st,stm32-gpio";
78 u-boot,dm-pre-reloc;
79};
80
81&gpioe {
82 compatible = "st,stm32-gpio";
83 u-boot,dm-pre-reloc;
84};
85
86&gpiof {
87 compatible = "st,stm32-gpio";
88 u-boot,dm-pre-reloc;
89};
90
91&gpiog {
92 compatible = "st,stm32-gpio";
93 u-boot,dm-pre-reloc;
94};
95
96&gpioh {
97 compatible = "st,stm32-gpio";
98 u-boot,dm-pre-reloc;
99};
100
101&gpioi {
102 compatible = "st,stm32-gpio";
103 u-boot,dm-pre-reloc;
104};
105
106&gpioj {
107 compatible = "st,stm32-gpio";
108 u-boot,dm-pre-reloc;
109};
110
111&gpiok {
112 compatible = "st,stm32-gpio";
113 u-boot,dm-pre-reloc;
114};
115
116&gpioz {
117 compatible = "st,stm32-gpio";
118 u-boot,dm-pre-reloc;
119};
Patrice Chotard26d11072019-04-30 17:26:21 +0200[diff] [blame]120
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame^]121&pinctrl {
122 u-boot,dm-pre-reloc;
123};
124
125&pinctrl_z {
126 u-boot,dm-pre-reloc;
127};
128
129&pwr {
Patrice Chotard26d11072019-04-30 17:26:21 +0200[diff] [blame]130 u-boot,dm-pre-reloc;
131};
Patrick Delaunaya3705302019-07-11 11:15:28 +0200[diff] [blame^]132
133&rcc {
134 u-boot,dm-pre-reloc;
135};
136
137&sdmmc1 {
138 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
139};
140
141&sdmmc2 {
142 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
143};
144
145&sdmmc3 {
146 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
147};
148
149&usbotg_hs {
150 compatible = "st,stm32mp1-hsotg", "snps,dwc2";
151};