blob: 00d0b9b6a43cdce4efb0a67eeb44cc36bc880e52 [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -04001/* SPDX-License-Identifier: GPL-2.0 OR IBM-pibs */
Wolfgang Denk52744b42013-07-28 22:12:45 +02002/*
Wolfgang Denk52744b42013-07-28 22:12:45 +02003 * Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
4 */
wdenk214ec6b2001-10-08 19:18:17 +00005/*----------------------------------------------------------------------------+
6|
wdenk5256def2003-09-18 10:45:21 +00007| File Name: miiphy.h
wdenk214ec6b2001-10-08 19:18:17 +00008|
wdenk5256def2003-09-18 10:45:21 +00009| Function: Include file defining PHY registers.
wdenk214ec6b2001-10-08 19:18:17 +000010|
wdenk5256def2003-09-18 10:45:21 +000011| Author: Mark Wisner
wdenk214ec6b2001-10-08 19:18:17 +000012|
wdenk214ec6b2001-10-08 19:18:17 +000013+----------------------------------------------------------------------------*/
14#ifndef _miiphy_h_
15#define _miiphy_h_
16
Mike Frysingerd63ee712010-12-23 15:40:12 -050017#include <linux/mii.h>
Andy Flemingaecf6fc2011-04-08 02:10:27 -050018#include <linux/list.h>
Marian Balakowiczaab8c492005-10-28 22:30:33 +020019#include <net.h>
Andy Flemingaecf6fc2011-04-08 02:10:27 -050020#include <phy.h>
21
Wolfgang Denk934fcb62011-12-07 08:35:14 +010022int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -050023 unsigned short *value);
Wolfgang Denk934fcb62011-12-07 08:35:14 +010024int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -050025 unsigned short value);
Andy Flemingaea0c3e2011-04-07 14:38:35 -050026int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
Larry Johnson81b974b2007-10-31 11:21:29 -050027 unsigned char *model, unsigned char *rev);
Andy Flemingaea0c3e2011-04-07 14:38:35 -050028int miiphy_reset(const char *devname, unsigned char addr);
29int miiphy_speed(const char *devname, unsigned char addr);
30int miiphy_duplex(const char *devname, unsigned char addr);
31int miiphy_is_1000base_x(const char *devname, unsigned char addr);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020032#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
Andy Flemingaea0c3e2011-04-07 14:38:35 -050033int miiphy_link(const char *devname, unsigned char addr);
wdenk49c3f672003-10-08 22:33:00 +000034#endif
wdenk214ec6b2001-10-08 19:18:17 +000035
Andy Flemingaea0c3e2011-04-07 14:38:35 -050036int miiphy_set_current_dev(const char *devname);
37const char *miiphy_get_current_dev(void);
Andy Flemingaecf6fc2011-04-08 02:10:27 -050038struct mii_dev *mdio_get_current_dev(void);
Pankaj Bansal7c18fe82018-09-18 15:46:48 +053039struct list_head *mdio_get_list_head(void);
Andy Flemingaecf6fc2011-04-08 02:10:27 -050040struct mii_dev *miiphy_get_dev_by_name(const char *devname);
41struct phy_device *mdio_phydev_for_ethname(const char *devname);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020042
Andy Flemingaea0c3e2011-04-07 14:38:35 -050043void miiphy_listdev(void);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020044
Andy Flemingaecf6fc2011-04-08 02:10:27 -050045struct mii_dev *mdio_alloc(void);
Bin Menga961e1f2015-10-07 21:32:37 -070046void mdio_free(struct mii_dev *bus);
Andy Flemingaecf6fc2011-04-08 02:10:27 -050047int mdio_register(struct mii_dev *bus);
Michal Simek1a548f52016-12-08 10:06:26 +010048
49/**
50 * mdio_register_seq - Register mdio bus with sequence number
51 * @bus: mii device structure
52 * @seq: sequence number
53 *
54 * Return: 0 if success, negative value if error
55 */
56int mdio_register_seq(struct mii_dev *bus, int seq);
Bin Menga961e1f2015-10-07 21:32:37 -070057int mdio_unregister(struct mii_dev *bus);
Andy Flemingaecf6fc2011-04-08 02:10:27 -050058void mdio_list_devices(void);
59
Luigi 'Comio' Mantellini466827e2009-10-10 12:42:20 +020060#ifdef CONFIG_BITBANGMII
61
62#define BB_MII_DEVNAME "bb_miiphy"
63
Marek Vasut3d5149c2025-03-02 02:24:42 +010064struct bb_miiphy_bus_ops {
Marek Vasut183c10a2025-03-02 02:24:45 +010065 int (*mdio_active)(struct mii_dev *miidev);
66 int (*mdio_tristate)(struct mii_dev *miidev);
67 int (*set_mdio)(struct mii_dev *miidev, int v);
68 int (*get_mdio)(struct mii_dev *miidev, int *v);
69 int (*set_mdc)(struct mii_dev *miidev, int v);
70 int (*delay)(struct mii_dev *miidev);
Marek Vasut3d5149c2025-03-02 02:24:42 +010071};
72
Marek Vasut65867d32025-03-02 02:24:44 +010073int bb_miiphy_read(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops,
74 int addr, int devad, int reg);
75int bb_miiphy_write(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops,
76 int addr, int devad, int reg, u16 value);
Luigi 'Comio' Mantellini466827e2009-10-10 12:42:20 +020077#endif
wdenk214ec6b2001-10-08 19:18:17 +000078
79/* phy seed setup */
wdenk5256def2003-09-18 10:45:21 +000080#define AUTO 99
Larry Johnson81b974b2007-10-31 11:21:29 -050081#define _1000BASET 1000
wdenk5256def2003-09-18 10:45:21 +000082#define _100BASET 100
83#define _10BASET 10
84#define HALF 22
85#define FULL 44
wdenk214ec6b2001-10-08 19:18:17 +000086
87/* phy register offsets */
Mike Frysingerd63ee712010-12-23 15:40:12 -050088#define MII_MIPSCR 0x11
wdenk214ec6b2001-10-08 19:18:17 +000089
Mike Frysingerd63ee712010-12-23 15:40:12 -050090/* MII_LPA */
Larry Johnson81b974b2007-10-31 11:21:29 -050091#define PHY_ANLPAR_PSB_802_3 0x0001
92#define PHY_ANLPAR_PSB_802_9 0x0002
wdenk656140b2004-04-25 13:18:40 +000093
Mike Frysingerd63ee712010-12-23 15:40:12 -050094/* MII_CTRL1000 masks */
Larry Johnson966a80b2007-11-01 08:46:50 -050095#define PHY_1000BTCR_1000FD 0x0200
96#define PHY_1000BTCR_1000HD 0x0100
97
Mike Frysingerd63ee712010-12-23 15:40:12 -050098/* MII_STAT1000 masks */
Larry Johnson81b974b2007-10-31 11:21:29 -050099#define PHY_1000BTSR_MSCF 0x8000
100#define PHY_1000BTSR_MSCR 0x4000
101#define PHY_1000BTSR_LRS 0x2000
102#define PHY_1000BTSR_RRS 0x1000
103#define PHY_1000BTSR_1000FD 0x0800
104#define PHY_1000BTSR_1000HD 0x0400
wdenked2ac4b2004-03-14 18:23:55 +0000105
Larry Johnson966a80b2007-11-01 08:46:50 -0500106/* phy EXSR */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500107#define ESTATUS_1000XF 0x8000
108#define ESTATUS_1000XH 0x4000
Larry Johnson966a80b2007-11-01 08:46:50 -0500109
Alex Marginean1a5b0982019-06-03 19:10:30 +0300110/**
111 * struct mdio_perdev_priv - Per-device class data for MDIO DM
112 *
113 * @mii_bus: Supporting MII legacy bus
114 */
115struct mdio_perdev_priv {
116 struct mii_dev *mii_bus;
117};
118
119/**
120 * struct mdio_ops - MDIO bus operations
121 *
122 * @read: Read from a PHY register
123 * @write: Write to a PHY register
124 * @reset: Reset the MDIO bus, NULL if not supported
125 */
126struct mdio_ops {
127 int (*read)(struct udevice *mdio_dev, int addr, int devad, int reg);
128 int (*write)(struct udevice *mdio_dev, int addr, int devad, int reg,
129 u16 val);
130 int (*reset)(struct udevice *mdio_dev);
131};
132
133#define mdio_get_ops(dev) ((struct mdio_ops *)(dev)->driver->ops)
134
135/**
136 * dm_mdio_probe_devices - Call probe on all MII devices, currently used for
137 * MDIO console commands.
138 */
139void dm_mdio_probe_devices(void);
140
141/**
Marek BehĂșn0e0651d2022-04-07 00:32:58 +0200142 * dm_mdio_read - Wrapper over .read() operation for DM MDIO
143 *
144 * @mdiodev: mdio device
145 * @addr: PHY address on MDIO bus
146 * @devad: device address on PHY if C45; should be MDIO_DEVAD_NONE if C22
147 * @reg: register address
148 * Return: register value if non-negative, -error code otherwise
149 */
150int dm_mdio_read(struct udevice *mdio_dev, int addr, int devad, int reg);
151
152/**
153 * dm_mdio_write - Wrapper over .write() operation for DM MDIO
154 *
155 * @mdiodev: mdio device
156 * @addr: PHY address on MDIO bus
157 * @devad: device address on PHY if C45; should be MDIO_DEVAD_NONE if C22
158 * @reg: register address
159 * @val: value to write
160 * Return: 0 on success, -error code otherwise
161 */
162int dm_mdio_write(struct udevice *mdio_dev, int addr, int devad, int reg, u16 val);
163
164/**
165 * dm_mdio_reset - Wrapper over .reset() operation for DM MDIO
166 *
167 * @mdiodev: mdio device
168 * Return: 0 on success, -error code otherwise
169 */
170int dm_mdio_reset(struct udevice *mdio_dev);
171
172/**
Marek BehĂșn1c1c37f2022-04-27 12:41:49 +0200173 * dm_phy_find_by_ofnode - Find PHY device by ofnode
174 *
175 * @phynode: PHY's ofnode
176 *
177 * Return: pointer to phy_device, or NULL on error
178 */
179struct phy_device *dm_phy_find_by_ofnode(ofnode phynode);
180
181/**
Alex Marginean1a5b0982019-06-03 19:10:30 +0300182 * dm_mdio_phy_connect - Wrapper over phy_connect for DM MDIO
183 *
Alex Marginean6b3089e2019-11-25 17:15:11 +0200184 * @mdiodev: mdio device the PHY is accesible on
185 * @phyaddr: PHY address on MDIO bus
Alex Marginean1a5b0982019-06-03 19:10:30 +0300186 * @ethdev: ethernet device to connect to the PHY
187 * @interface: MAC-PHY protocol
188 *
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100189 * Return: pointer to phy_device, or 0 on error
Alex Marginean1a5b0982019-06-03 19:10:30 +0300190 */
Alex Marginean6b3089e2019-11-25 17:15:11 +0200191struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr,
Alex Marginean1a5b0982019-06-03 19:10:30 +0300192 struct udevice *ethdev,
193 phy_interface_t interface);
194
Alex Margineancf640552019-11-25 17:15:12 +0200195/**
196 * dm_eth_phy_connect - Connect an Eth device to a PHY based on device tree
197 *
198 * Picks up the DT phy-handle and phy-mode from ethernet device node and
199 * connects the ethernet device to the linked PHY.
200 *
201 * @ethdev: ethernet device
202 *
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100203 * Return: pointer to phy_device, or 0 on error
Alex Margineancf640552019-11-25 17:15:12 +0200204 */
205struct phy_device *dm_eth_phy_connect(struct udevice *ethdev);
206
Alex Margineanab8c2a52019-07-12 10:13:50 +0300207/* indicates none of the child buses is selected */
208#define MDIO_MUX_SELECT_NONE -1
209
210/**
211 * struct mdio_mux_ops - MDIO MUX operations
212 *
213 * @select: Selects a child bus
214 * @deselect: Clean up selection. Optional, can be NULL
215 */
216struct mdio_mux_ops {
217 int (*select)(struct udevice *mux, int cur, int sel);
218 int (*deselect)(struct udevice *mux, int sel);
219};
220
221#define mdio_mux_get_ops(dev) ((struct mdio_mux_ops *)(dev)->driver->ops)
222
223#endif