Tom Rini | 8b0c8a1 | 2018-05-06 18:27:01 -0400 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0 OR IBM-pibs */ |
Wolfgang Denk | 52744b4 | 2013-07-28 22:12:45 +0200 | [diff] [blame] | 2 | /* |
Wolfgang Denk | 52744b4 | 2013-07-28 22:12:45 +0200 | [diff] [blame] | 3 | * Additions (C) Copyright 2009 Industrie Dial Face S.p.A. |
| 4 | */ |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 5 | /*----------------------------------------------------------------------------+ |
| 6 | | |
wdenk | 5256def | 2003-09-18 10:45:21 +0000 | [diff] [blame] | 7 | | File Name: miiphy.h |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 8 | | |
wdenk | 5256def | 2003-09-18 10:45:21 +0000 | [diff] [blame] | 9 | | Function: Include file defining PHY registers. |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 10 | | |
wdenk | 5256def | 2003-09-18 10:45:21 +0000 | [diff] [blame] | 11 | | Author: Mark Wisner |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 12 | | |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 13 | +----------------------------------------------------------------------------*/ |
| 14 | #ifndef _miiphy_h_ |
| 15 | #define _miiphy_h_ |
| 16 | |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 17 | #include <common.h> |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 18 | #include <linux/mii.h> |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 19 | #include <linux/list.h> |
Marian Balakowicz | aab8c49 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 20 | #include <net.h> |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 21 | #include <phy.h> |
| 22 | |
Wolfgang Denk | 934fcb6 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 23 | int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 24 | unsigned short *value); |
Wolfgang Denk | 934fcb6 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 25 | int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 26 | unsigned short value); |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 27 | int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 28 | unsigned char *model, unsigned char *rev); |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 29 | int miiphy_reset(const char *devname, unsigned char addr); |
| 30 | int miiphy_speed(const char *devname, unsigned char addr); |
| 31 | int miiphy_duplex(const char *devname, unsigned char addr); |
| 32 | int miiphy_is_1000base_x(const char *devname, unsigned char addr); |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 33 | #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 34 | int miiphy_link(const char *devname, unsigned char addr); |
wdenk | 49c3f67 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 35 | #endif |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 36 | |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 37 | void miiphy_init(void); |
Marian Balakowicz | cbdd1c8 | 2005-11-30 18:06:04 +0100 | [diff] [blame] | 38 | |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 39 | int miiphy_set_current_dev(const char *devname); |
| 40 | const char *miiphy_get_current_dev(void); |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 41 | struct mii_dev *mdio_get_current_dev(void); |
| 42 | struct mii_dev *miiphy_get_dev_by_name(const char *devname); |
| 43 | struct phy_device *mdio_phydev_for_ethname(const char *devname); |
Marian Balakowicz | aab8c49 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 44 | |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 45 | void miiphy_listdev(void); |
Marian Balakowicz | aab8c49 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 46 | |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 47 | struct mii_dev *mdio_alloc(void); |
Bin Meng | a961e1f | 2015-10-07 21:32:37 -0700 | [diff] [blame] | 48 | void mdio_free(struct mii_dev *bus); |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 49 | int mdio_register(struct mii_dev *bus); |
Michal Simek | 1a548f5 | 2016-12-08 10:06:26 +0100 | [diff] [blame] | 50 | |
| 51 | /** |
| 52 | * mdio_register_seq - Register mdio bus with sequence number |
| 53 | * @bus: mii device structure |
| 54 | * @seq: sequence number |
| 55 | * |
| 56 | * Return: 0 if success, negative value if error |
| 57 | */ |
| 58 | int mdio_register_seq(struct mii_dev *bus, int seq); |
Bin Meng | a961e1f | 2015-10-07 21:32:37 -0700 | [diff] [blame] | 59 | int mdio_unregister(struct mii_dev *bus); |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 60 | void mdio_list_devices(void); |
| 61 | |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 62 | #ifdef CONFIG_BITBANGMII |
| 63 | |
| 64 | #define BB_MII_DEVNAME "bb_miiphy" |
| 65 | |
| 66 | struct bb_miiphy_bus { |
Mike Frysinger | 6b300dc | 2011-11-10 14:11:04 +0000 | [diff] [blame] | 67 | char name[16]; |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 68 | int (*init)(struct bb_miiphy_bus *bus); |
| 69 | int (*mdio_active)(struct bb_miiphy_bus *bus); |
| 70 | int (*mdio_tristate)(struct bb_miiphy_bus *bus); |
| 71 | int (*set_mdio)(struct bb_miiphy_bus *bus, int v); |
| 72 | int (*get_mdio)(struct bb_miiphy_bus *bus, int *v); |
| 73 | int (*set_mdc)(struct bb_miiphy_bus *bus, int v); |
| 74 | int (*delay)(struct bb_miiphy_bus *bus); |
| 75 | #ifdef CONFIG_BITBANGMII_MULTI |
| 76 | void *priv; |
| 77 | #endif |
| 78 | }; |
| 79 | |
| 80 | extern struct bb_miiphy_bus bb_miiphy_buses[]; |
| 81 | extern int bb_miiphy_buses_num; |
Marian Balakowicz | aab8c49 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 82 | |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 83 | void bb_miiphy_init(void); |
Joe Hershberger | 0c33319 | 2016-08-08 11:28:39 -0500 | [diff] [blame] | 84 | int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg); |
| 85 | int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, |
| 86 | u16 value); |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 87 | #endif |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 88 | |
| 89 | /* phy seed setup */ |
wdenk | 5256def | 2003-09-18 10:45:21 +0000 | [diff] [blame] | 90 | #define AUTO 99 |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 91 | #define _1000BASET 1000 |
wdenk | 5256def | 2003-09-18 10:45:21 +0000 | [diff] [blame] | 92 | #define _100BASET 100 |
| 93 | #define _10BASET 10 |
| 94 | #define HALF 22 |
| 95 | #define FULL 44 |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 96 | |
| 97 | /* phy register offsets */ |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 98 | #define MII_MIPSCR 0x11 |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 99 | |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 100 | /* MII_LPA */ |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 101 | #define PHY_ANLPAR_PSB_802_3 0x0001 |
| 102 | #define PHY_ANLPAR_PSB_802_9 0x0002 |
wdenk | 656140b | 2004-04-25 13:18:40 +0000 | [diff] [blame] | 103 | |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 104 | /* MII_CTRL1000 masks */ |
Larry Johnson | 966a80b | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 105 | #define PHY_1000BTCR_1000FD 0x0200 |
| 106 | #define PHY_1000BTCR_1000HD 0x0100 |
| 107 | |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 108 | /* MII_STAT1000 masks */ |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 109 | #define PHY_1000BTSR_MSCF 0x8000 |
| 110 | #define PHY_1000BTSR_MSCR 0x4000 |
| 111 | #define PHY_1000BTSR_LRS 0x2000 |
| 112 | #define PHY_1000BTSR_RRS 0x1000 |
| 113 | #define PHY_1000BTSR_1000FD 0x0800 |
| 114 | #define PHY_1000BTSR_1000HD 0x0400 |
wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 115 | |
Larry Johnson | 966a80b | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 116 | /* phy EXSR */ |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 117 | #define ESTATUS_1000XF 0x8000 |
| 118 | #define ESTATUS_1000XH 0x4000 |
Larry Johnson | 966a80b | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 119 | |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 120 | #endif |