Tom Rini | 8b0c8a1 | 2018-05-06 18:27:01 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 OR IBM-pibs */ |
Wolfgang Denk | 52744b4 | 2013-07-28 22:12:45 +0200 | [diff] [blame] | 2 | /* |
Wolfgang Denk | 52744b4 | 2013-07-28 22:12:45 +0200 | [diff] [blame] | 3 | * Additions (C) Copyright 2009 Industrie Dial Face S.p.A. |
| 4 | */ |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 5 | /*----------------------------------------------------------------------------+ |
| 6 | | |
wdenk | 5256def | 2003-09-18 10:45:21 +0000 | [diff] [blame] | 7 | | File Name: miiphy.h |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 8 | | |
wdenk | 5256def | 2003-09-18 10:45:21 +0000 | [diff] [blame] | 9 | | Function: Include file defining PHY registers. |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 10 | | |
wdenk | 5256def | 2003-09-18 10:45:21 +0000 | [diff] [blame] | 11 | | Author: Mark Wisner |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 12 | | |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 13 | +----------------------------------------------------------------------------*/ |
| 14 | #ifndef _miiphy_h_ |
| 15 | #define _miiphy_h_ |
| 16 | |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 17 | #include <linux/mii.h> |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 18 | #include <linux/list.h> |
Marian Balakowicz | aab8c49 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 19 | #include <net.h> |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 20 | #include <phy.h> |
| 21 | |
Wolfgang Denk | 934fcb6 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 22 | int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 23 | unsigned short *value); |
Wolfgang Denk | 934fcb6 | 2011-12-07 08:35:14 +0100 | [diff] [blame] | 24 | int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 25 | unsigned short value); |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 26 | int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 27 | unsigned char *model, unsigned char *rev); |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 28 | int miiphy_reset(const char *devname, unsigned char addr); |
| 29 | int miiphy_speed(const char *devname, unsigned char addr); |
| 30 | int miiphy_duplex(const char *devname, unsigned char addr); |
| 31 | int miiphy_is_1000base_x(const char *devname, unsigned char addr); |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 32 | #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 33 | int miiphy_link(const char *devname, unsigned char addr); |
wdenk | 49c3f67 | 2003-10-08 22:33:00 +0000 | [diff] [blame] | 34 | #endif |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 35 | |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 36 | int miiphy_set_current_dev(const char *devname); |
| 37 | const char *miiphy_get_current_dev(void); |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 38 | struct mii_dev *mdio_get_current_dev(void); |
Pankaj Bansal | 7c18fe8 | 2018-09-18 15:46:48 +0530 | [diff] [blame] | 39 | struct list_head *mdio_get_list_head(void); |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 40 | struct mii_dev *miiphy_get_dev_by_name(const char *devname); |
| 41 | struct phy_device *mdio_phydev_for_ethname(const char *devname); |
Marian Balakowicz | aab8c49 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 42 | |
Andy Fleming | aea0c3e | 2011-04-07 14:38:35 -0500 | [diff] [blame] | 43 | void miiphy_listdev(void); |
Marian Balakowicz | aab8c49 | 2005-10-28 22:30:33 +0200 | [diff] [blame] | 44 | |
Marek Vasut | bbf7a22 | 2025-02-22 21:33:22 +0100 | [diff] [blame] | 45 | void mdio_init(struct mii_dev *bus); |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 46 | struct mii_dev *mdio_alloc(void); |
Bin Meng | a961e1f | 2015-10-07 21:32:37 -0700 | [diff] [blame] | 47 | void mdio_free(struct mii_dev *bus); |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 48 | int mdio_register(struct mii_dev *bus); |
Michal Simek | 1a548f5 | 2016-12-08 10:06:26 +0100 | [diff] [blame] | 49 | |
| 50 | /** |
| 51 | * mdio_register_seq - Register mdio bus with sequence number |
| 52 | * @bus: mii device structure |
| 53 | * @seq: sequence number |
| 54 | * |
| 55 | * Return: 0 if success, negative value if error |
| 56 | */ |
| 57 | int mdio_register_seq(struct mii_dev *bus, int seq); |
Bin Meng | a961e1f | 2015-10-07 21:32:37 -0700 | [diff] [blame] | 58 | int mdio_unregister(struct mii_dev *bus); |
Andy Fleming | aecf6fc | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 59 | void mdio_list_devices(void); |
| 60 | |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 61 | #ifdef CONFIG_BITBANGMII |
| 62 | |
| 63 | #define BB_MII_DEVNAME "bb_miiphy" |
| 64 | |
Marek Vasut | 3d5149c | 2025-03-02 02:24:42 +0100 | [diff] [blame] | 65 | struct bb_miiphy_bus; |
| 66 | |
| 67 | struct bb_miiphy_bus_ops { |
Marek Vasut | 183c10a | 2025-03-02 02:24:45 +0100 | [diff] [blame^] | 68 | int (*mdio_active)(struct mii_dev *miidev); |
| 69 | int (*mdio_tristate)(struct mii_dev *miidev); |
| 70 | int (*set_mdio)(struct mii_dev *miidev, int v); |
| 71 | int (*get_mdio)(struct mii_dev *miidev, int *v); |
| 72 | int (*set_mdc)(struct mii_dev *miidev, int v); |
| 73 | int (*delay)(struct mii_dev *miidev); |
Marek Vasut | 3d5149c | 2025-03-02 02:24:42 +0100 | [diff] [blame] | 74 | }; |
| 75 | |
| 76 | struct bb_miiphy_bus { |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 77 | void *priv; |
Marek Vasut | a392ff5 | 2025-02-22 21:33:23 +0100 | [diff] [blame] | 78 | struct mii_dev mii; |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 79 | }; |
| 80 | |
Marek Vasut | a392ff5 | 2025-02-22 21:33:23 +0100 | [diff] [blame] | 81 | struct bb_miiphy_bus *bb_miiphy_alloc(void); |
| 82 | void bb_miiphy_free(struct bb_miiphy_bus *bus); |
| 83 | |
Marek Vasut | 65867d3 | 2025-03-02 02:24:44 +0100 | [diff] [blame] | 84 | int bb_miiphy_read(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, |
| 85 | int addr, int devad, int reg); |
| 86 | int bb_miiphy_write(struct mii_dev *miidev, const struct bb_miiphy_bus_ops *ops, |
| 87 | int addr, int devad, int reg, u16 value); |
Luigi 'Comio' Mantellini | 466827e | 2009-10-10 12:42:20 +0200 | [diff] [blame] | 88 | #endif |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 89 | |
| 90 | /* phy seed setup */ |
wdenk | 5256def | 2003-09-18 10:45:21 +0000 | [diff] [blame] | 91 | #define AUTO 99 |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 92 | #define _1000BASET 1000 |
wdenk | 5256def | 2003-09-18 10:45:21 +0000 | [diff] [blame] | 93 | #define _100BASET 100 |
| 94 | #define _10BASET 10 |
| 95 | #define HALF 22 |
| 96 | #define FULL 44 |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 97 | |
| 98 | /* phy register offsets */ |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 99 | #define MII_MIPSCR 0x11 |
wdenk | 214ec6b | 2001-10-08 19:18:17 +0000 | [diff] [blame] | 100 | |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 101 | /* MII_LPA */ |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 102 | #define PHY_ANLPAR_PSB_802_3 0x0001 |
| 103 | #define PHY_ANLPAR_PSB_802_9 0x0002 |
wdenk | 656140b | 2004-04-25 13:18:40 +0000 | [diff] [blame] | 104 | |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 105 | /* MII_CTRL1000 masks */ |
Larry Johnson | 966a80b | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 106 | #define PHY_1000BTCR_1000FD 0x0200 |
| 107 | #define PHY_1000BTCR_1000HD 0x0100 |
| 108 | |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 109 | /* MII_STAT1000 masks */ |
Larry Johnson | 81b974b | 2007-10-31 11:21:29 -0500 | [diff] [blame] | 110 | #define PHY_1000BTSR_MSCF 0x8000 |
| 111 | #define PHY_1000BTSR_MSCR 0x4000 |
| 112 | #define PHY_1000BTSR_LRS 0x2000 |
| 113 | #define PHY_1000BTSR_RRS 0x1000 |
| 114 | #define PHY_1000BTSR_1000FD 0x0800 |
| 115 | #define PHY_1000BTSR_1000HD 0x0400 |
wdenk | ed2ac4b | 2004-03-14 18:23:55 +0000 | [diff] [blame] | 116 | |
Larry Johnson | 966a80b | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 117 | /* phy EXSR */ |
Mike Frysinger | d63ee71 | 2010-12-23 15:40:12 -0500 | [diff] [blame] | 118 | #define ESTATUS_1000XF 0x8000 |
| 119 | #define ESTATUS_1000XH 0x4000 |
Larry Johnson | 966a80b | 2007-11-01 08:46:50 -0500 | [diff] [blame] | 120 | |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 121 | /** |
| 122 | * struct mdio_perdev_priv - Per-device class data for MDIO DM |
| 123 | * |
| 124 | * @mii_bus: Supporting MII legacy bus |
| 125 | */ |
| 126 | struct mdio_perdev_priv { |
| 127 | struct mii_dev *mii_bus; |
| 128 | }; |
| 129 | |
| 130 | /** |
| 131 | * struct mdio_ops - MDIO bus operations |
| 132 | * |
| 133 | * @read: Read from a PHY register |
| 134 | * @write: Write to a PHY register |
| 135 | * @reset: Reset the MDIO bus, NULL if not supported |
| 136 | */ |
| 137 | struct mdio_ops { |
| 138 | int (*read)(struct udevice *mdio_dev, int addr, int devad, int reg); |
| 139 | int (*write)(struct udevice *mdio_dev, int addr, int devad, int reg, |
| 140 | u16 val); |
| 141 | int (*reset)(struct udevice *mdio_dev); |
| 142 | }; |
| 143 | |
| 144 | #define mdio_get_ops(dev) ((struct mdio_ops *)(dev)->driver->ops) |
| 145 | |
| 146 | /** |
| 147 | * dm_mdio_probe_devices - Call probe on all MII devices, currently used for |
| 148 | * MDIO console commands. |
| 149 | */ |
| 150 | void dm_mdio_probe_devices(void); |
| 151 | |
| 152 | /** |
Marek BehĂșn | 0e0651d | 2022-04-07 00:32:58 +0200 | [diff] [blame] | 153 | * dm_mdio_read - Wrapper over .read() operation for DM MDIO |
| 154 | * |
| 155 | * @mdiodev: mdio device |
| 156 | * @addr: PHY address on MDIO bus |
| 157 | * @devad: device address on PHY if C45; should be MDIO_DEVAD_NONE if C22 |
| 158 | * @reg: register address |
| 159 | * Return: register value if non-negative, -error code otherwise |
| 160 | */ |
| 161 | int dm_mdio_read(struct udevice *mdio_dev, int addr, int devad, int reg); |
| 162 | |
| 163 | /** |
| 164 | * dm_mdio_write - Wrapper over .write() operation for DM MDIO |
| 165 | * |
| 166 | * @mdiodev: mdio device |
| 167 | * @addr: PHY address on MDIO bus |
| 168 | * @devad: device address on PHY if C45; should be MDIO_DEVAD_NONE if C22 |
| 169 | * @reg: register address |
| 170 | * @val: value to write |
| 171 | * Return: 0 on success, -error code otherwise |
| 172 | */ |
| 173 | int dm_mdio_write(struct udevice *mdio_dev, int addr, int devad, int reg, u16 val); |
| 174 | |
| 175 | /** |
| 176 | * dm_mdio_reset - Wrapper over .reset() operation for DM MDIO |
| 177 | * |
| 178 | * @mdiodev: mdio device |
| 179 | * Return: 0 on success, -error code otherwise |
| 180 | */ |
| 181 | int dm_mdio_reset(struct udevice *mdio_dev); |
| 182 | |
| 183 | /** |
Marek BehĂșn | 1c1c37f | 2022-04-27 12:41:49 +0200 | [diff] [blame] | 184 | * dm_phy_find_by_ofnode - Find PHY device by ofnode |
| 185 | * |
| 186 | * @phynode: PHY's ofnode |
| 187 | * |
| 188 | * Return: pointer to phy_device, or NULL on error |
| 189 | */ |
| 190 | struct phy_device *dm_phy_find_by_ofnode(ofnode phynode); |
| 191 | |
| 192 | /** |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 193 | * dm_mdio_phy_connect - Wrapper over phy_connect for DM MDIO |
| 194 | * |
Alex Marginean | 6b3089e | 2019-11-25 17:15:11 +0200 | [diff] [blame] | 195 | * @mdiodev: mdio device the PHY is accesible on |
| 196 | * @phyaddr: PHY address on MDIO bus |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 197 | * @ethdev: ethernet device to connect to the PHY |
| 198 | * @interface: MAC-PHY protocol |
| 199 | * |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 200 | * Return: pointer to phy_device, or 0 on error |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 201 | */ |
Alex Marginean | 6b3089e | 2019-11-25 17:15:11 +0200 | [diff] [blame] | 202 | struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr, |
Alex Marginean | 1a5b098 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 203 | struct udevice *ethdev, |
| 204 | phy_interface_t interface); |
| 205 | |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 206 | /** |
| 207 | * dm_eth_phy_connect - Connect an Eth device to a PHY based on device tree |
| 208 | * |
| 209 | * Picks up the DT phy-handle and phy-mode from ethernet device node and |
| 210 | * connects the ethernet device to the linked PHY. |
| 211 | * |
| 212 | * @ethdev: ethernet device |
| 213 | * |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 214 | * Return: pointer to phy_device, or 0 on error |
Alex Marginean | cf64055 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 215 | */ |
| 216 | struct phy_device *dm_eth_phy_connect(struct udevice *ethdev); |
| 217 | |
Alex Marginean | ab8c2a5 | 2019-07-12 10:13:50 +0300 | [diff] [blame] | 218 | /* indicates none of the child buses is selected */ |
| 219 | #define MDIO_MUX_SELECT_NONE -1 |
| 220 | |
| 221 | /** |
| 222 | * struct mdio_mux_ops - MDIO MUX operations |
| 223 | * |
| 224 | * @select: Selects a child bus |
| 225 | * @deselect: Clean up selection. Optional, can be NULL |
| 226 | */ |
| 227 | struct mdio_mux_ops { |
| 228 | int (*select)(struct udevice *mux, int cur, int sel); |
| 229 | int (*deselect)(struct udevice *mux, int sel); |
| 230 | }; |
| 231 | |
| 232 | #define mdio_mux_get_ops(dev) ((struct mdio_mux_ops *)(dev)->driver->ops) |
| 233 | |
| 234 | #endif |