blob: ef072323f3cf9c0fd083c478d61f3ae611d2ea56 [file] [log] [blame]
Michal Simek61015152016-05-26 08:06:38 +02001CONFIG_ARM=y
Michal Simek61015152016-05-26 08:06:38 +02002CONFIG_ARCH_ZYNQMP=y
Michal Simek19abc1d2017-02-10 13:57:35 +01003CONFIG_SYS_TEXT_BASE=0x8000000
Michal Simekcbd91182016-06-03 11:35:17 +02004CONFIG_SYS_MALLOC_F_LEN=0x8000
Siva Durga Prasad Paladugu809438d2016-07-29 15:31:47 +05305CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm018 dc4"
Michal Simek61015152016-05-26 08:06:38 +02006CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
Tom Rini256aa742017-06-19 09:47:40 -04007CONFIG_DEBUG_UART=y
Tom Rini8db91cf2016-11-29 09:14:57 -05008CONFIG_DISTRO_DEFAULTS=y
Michal Simek61015152016-05-26 08:06:38 +02009CONFIG_FIT=y
10CONFIG_FIT_VERBOSE=y
Michal Simek437c59c2016-05-17 08:38:53 +020011CONFIG_SPL_LOAD_FIT=y
Lokesh Vutlafbad3702016-10-08 14:41:44 -040012# CONFIG_DISPLAY_CPUINFO is not set
Lokesh Vutla94d95e42016-10-11 21:33:46 -040013# CONFIG_DISPLAY_BOARDINFO is not set
Simon Glassffe19762016-09-12 23:18:22 -060014CONFIG_SPL=y
Heiko Schocher1d12ba22016-10-06 07:55:15 +020015CONFIG_SPL_OS_BOOT=y
Michal Simek406d1c62017-12-08 15:01:19 +010016CONFIG_SPL_RAM_SUPPORT=y
17CONFIG_SPL_RAM_DEVICE=y
Michal Simek61015152016-05-26 08:06:38 +020018CONFIG_SYS_PROMPT="ZynqMP> "
Michal Simek61015152016-05-26 08:06:38 +020019CONFIG_CMD_MEMTEST=y
Michal Simek41f70e22017-12-01 15:35:43 +010020CONFIG_CMD_CLK=y
Michal Simek61015152016-05-26 08:06:38 +020021# CONFIG_CMD_FLASH is not set
Michal Simek61015152016-05-26 08:06:38 +020022CONFIG_CMD_I2C=y
Tom Rini78873cd2017-08-14 19:58:53 -040023CONFIG_CMD_MMC=y
Michal Simek61015152016-05-26 08:06:38 +020024CONFIG_CMD_TFTPPUT=y
Michal Simek61015152016-05-26 08:06:38 +020025CONFIG_CMD_TIME=y
26CONFIG_CMD_TIMER=y
Michal Simek61015152016-05-26 08:06:38 +020027CONFIG_CMD_EXT4_WRITE=y
Patrick Delaunay21d3bce2017-01-27 11:00:38 +010028# CONFIG_SPL_ISO_PARTITION is not set
Michal Simek4c1f7f82016-07-15 08:41:46 +020029CONFIG_SPL_OF_CONTROL=y
Michal Simek61015152016-05-26 08:06:38 +020030CONFIG_OF_EMBED=y
Tom Rini5b0b0402017-08-28 07:16:32 -040031CONFIG_ENV_IS_IN_FAT=y
Michal Simek61015152016-05-26 08:06:38 +020032CONFIG_NET_RANDOM_ETHADDR=y
Michal Simekb9c5d132016-07-27 15:08:03 +020033CONFIG_SPL_DM=y
Michal Simek4c1f7f82016-07-15 08:41:46 +020034CONFIG_SPL_DM_SEQ_ALIAS=y
Siva Durga Prasad Paladugu460fdce2016-01-13 16:25:37 +053035CONFIG_FPGA_XILINX=y
36CONFIG_FPGA_ZYNQMPPL=y
Tom Riniafea41d2016-09-08 16:11:59 -040037CONFIG_DM_GPIO=y
Michal Simekb9c5d132016-07-27 15:08:03 +020038CONFIG_DM_I2C=y
Michal Simek61015152016-05-26 08:06:38 +020039CONFIG_SYS_I2C_CADENCE=y
Michal Simek46408712017-12-08 14:46:30 +010040CONFIG_MISC=y
Michal Simek61015152016-05-26 08:06:38 +020041CONFIG_DM_MMC=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +090042CONFIG_MMC_SDHCI=y
Michal Simek19abc1d2017-02-10 13:57:35 +010043CONFIG_MMC_SDHCI_ZYNQ=y
Michal Simek61015152016-05-26 08:06:38 +020044CONFIG_DM_ETH=y
Tom Rinica22e962017-08-07 22:00:34 -040045CONFIG_PHY_GIGE=y
Michal Simek61015152016-05-26 08:06:38 +020046CONFIG_ZYNQ_GEM=y
Michal Simek61015152016-05-26 08:06:38 +020047CONFIG_DEBUG_UART_ZYNQ=y
48CONFIG_DEBUG_UART_BASE=0xff000000
49CONFIG_DEBUG_UART_CLOCK=100000000
50CONFIG_DEBUG_UART_ANNOUNCE=y
Michal Simekab754532017-11-06 09:16:05 +010051CONFIG_ZYNQ_SERIAL=y