blob: 61f3ff9deb6eea66a7499df380c82db05e88c4c8 [file] [log] [blame]
Michal Simek61015152016-05-26 08:06:38 +02001CONFIG_ARM=y
Michal Simek61015152016-05-26 08:06:38 +02002CONFIG_ARCH_ZYNQMP=y
Michal Simek19abc1d2017-02-10 13:57:35 +01003CONFIG_SYS_TEXT_BASE=0x8000000
Michal Simekcbd91182016-06-03 11:35:17 +02004CONFIG_SYS_MALLOC_F_LEN=0x8000
Siva Durga Prasad Paladugu809438d2016-07-29 15:31:47 +05305CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm018 dc4"
Michal Simek61015152016-05-26 08:06:38 +02006CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
Tom Rini8db91cf2016-11-29 09:14:57 -05007CONFIG_DISTRO_DEFAULTS=y
Michal Simek61015152016-05-26 08:06:38 +02008CONFIG_FIT=y
9CONFIG_FIT_VERBOSE=y
Michal Simek437c59c2016-05-17 08:38:53 +020010CONFIG_SPL_LOAD_FIT=y
Lokesh Vutlafbad3702016-10-08 14:41:44 -040011# CONFIG_DISPLAY_CPUINFO is not set
Lokesh Vutla94d95e42016-10-11 21:33:46 -040012# CONFIG_DISPLAY_BOARDINFO is not set
Simon Glassffe19762016-09-12 23:18:22 -060013CONFIG_SPL=y
14CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Heiko Schocher1d12ba22016-10-06 07:55:15 +020015CONFIG_SPL_OS_BOOT=y
Michal Simek61015152016-05-26 08:06:38 +020016CONFIG_SYS_PROMPT="ZynqMP> "
17# CONFIG_CMD_IMLS is not set
18CONFIG_CMD_MEMTEST=y
Masahiro Yamada2737fd32017-02-05 10:42:56 +090019CONFIG_CMD_UNZIP=y
Michal Simek61015152016-05-26 08:06:38 +020020# CONFIG_CMD_FLASH is not set
21CONFIG_CMD_MMC=y
22CONFIG_CMD_I2C=y
23CONFIG_CMD_TFTPPUT=y
Michal Simek61015152016-05-26 08:06:38 +020024CONFIG_CMD_TIME=y
25CONFIG_CMD_TIMER=y
Michal Simek61015152016-05-26 08:06:38 +020026CONFIG_CMD_EXT4_WRITE=y
Patrick Delaunay21d3bce2017-01-27 11:00:38 +010027# CONFIG_SPL_ISO_PARTITION is not set
Michal Simek4c1f7f82016-07-15 08:41:46 +020028CONFIG_SPL_OF_CONTROL=y
Michal Simek61015152016-05-26 08:06:38 +020029CONFIG_OF_EMBED=y
30CONFIG_NET_RANDOM_ETHADDR=y
Michal Simekb9c5d132016-07-27 15:08:03 +020031CONFIG_SPL_DM=y
Michal Simek4c1f7f82016-07-15 08:41:46 +020032CONFIG_SPL_DM_SEQ_ALIAS=y
Siva Durga Prasad Paladugu460fdce2016-01-13 16:25:37 +053033CONFIG_FPGA_XILINX=y
34CONFIG_FPGA_ZYNQMPPL=y
Tom Riniafea41d2016-09-08 16:11:59 -040035CONFIG_DM_GPIO=y
Michal Simekb9c5d132016-07-27 15:08:03 +020036CONFIG_DM_I2C=y
Michal Simek61015152016-05-26 08:06:38 +020037CONFIG_SYS_I2C_CADENCE=y
38CONFIG_DM_MMC=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +090039CONFIG_MMC_SDHCI=y
Michal Simek19abc1d2017-02-10 13:57:35 +010040CONFIG_MMC_SDHCI_ZYNQ=y
Michal Simek61015152016-05-26 08:06:38 +020041CONFIG_DM_ETH=y
42CONFIG_ZYNQ_GEM=y
43CONFIG_DEBUG_UART=y
44CONFIG_DEBUG_UART_ZYNQ=y
45CONFIG_DEBUG_UART_BASE=0xff000000
46CONFIG_DEBUG_UART_CLOCK=100000000
47CONFIG_DEBUG_UART_ANNOUNCE=y