blob: b7ed38c7e21a98117963236a74ac410387f1f211 [file] [log] [blame]
Michal Simek61015152016-05-26 08:06:38 +02001CONFIG_ARM=y
Michal Simek61015152016-05-26 08:06:38 +02002CONFIG_ARCH_ZYNQMP=y
Michal Simek19abc1d2017-02-10 13:57:35 +01003CONFIG_SYS_TEXT_BASE=0x8000000
Michal Simekcbd91182016-06-03 11:35:17 +02004CONFIG_SYS_MALLOC_F_LEN=0x8000
Siva Durga Prasad Paladugu809438d2016-07-29 15:31:47 +05305CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm018 dc4"
Michal Simek61015152016-05-26 08:06:38 +02006CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
Tom Rini256aa742017-06-19 09:47:40 -04007CONFIG_DEBUG_UART=y
Tom Rini8db91cf2016-11-29 09:14:57 -05008CONFIG_DISTRO_DEFAULTS=y
Michal Simek61015152016-05-26 08:06:38 +02009CONFIG_FIT=y
10CONFIG_FIT_VERBOSE=y
Michal Simek437c59c2016-05-17 08:38:53 +020011CONFIG_SPL_LOAD_FIT=y
Simon Glass5b32e182017-07-23 21:19:47 -060012CONFIG_ENV_IS_IN_FAT=y
Lokesh Vutlafbad3702016-10-08 14:41:44 -040013# CONFIG_DISPLAY_CPUINFO is not set
Lokesh Vutla94d95e42016-10-11 21:33:46 -040014# CONFIG_DISPLAY_BOARDINFO is not set
Simon Glassffe19762016-09-12 23:18:22 -060015CONFIG_SPL=y
16CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Heiko Schocher1d12ba22016-10-06 07:55:15 +020017CONFIG_SPL_OS_BOOT=y
Michal Simek61015152016-05-26 08:06:38 +020018CONFIG_SYS_PROMPT="ZynqMP> "
19# CONFIG_CMD_IMLS is not set
20CONFIG_CMD_MEMTEST=y
Masahiro Yamada2737fd32017-02-05 10:42:56 +090021CONFIG_CMD_UNZIP=y
Michal Simek61015152016-05-26 08:06:38 +020022# CONFIG_CMD_FLASH is not set
23CONFIG_CMD_MMC=y
24CONFIG_CMD_I2C=y
25CONFIG_CMD_TFTPPUT=y
Michal Simek61015152016-05-26 08:06:38 +020026CONFIG_CMD_TIME=y
27CONFIG_CMD_TIMER=y
Michal Simek61015152016-05-26 08:06:38 +020028CONFIG_CMD_EXT4_WRITE=y
Patrick Delaunay21d3bce2017-01-27 11:00:38 +010029# CONFIG_SPL_ISO_PARTITION is not set
Michal Simek4c1f7f82016-07-15 08:41:46 +020030CONFIG_SPL_OF_CONTROL=y
Michal Simek61015152016-05-26 08:06:38 +020031CONFIG_OF_EMBED=y
32CONFIG_NET_RANDOM_ETHADDR=y
Michal Simekb9c5d132016-07-27 15:08:03 +020033CONFIG_SPL_DM=y
Michal Simek4c1f7f82016-07-15 08:41:46 +020034CONFIG_SPL_DM_SEQ_ALIAS=y
Siva Durga Prasad Paladugu460fdce2016-01-13 16:25:37 +053035CONFIG_FPGA_XILINX=y
36CONFIG_FPGA_ZYNQMPPL=y
Tom Riniafea41d2016-09-08 16:11:59 -040037CONFIG_DM_GPIO=y
Michal Simekb9c5d132016-07-27 15:08:03 +020038CONFIG_DM_I2C=y
Michal Simek61015152016-05-26 08:06:38 +020039CONFIG_SYS_I2C_CADENCE=y
40CONFIG_DM_MMC=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +090041CONFIG_MMC_SDHCI=y
Michal Simek19abc1d2017-02-10 13:57:35 +010042CONFIG_MMC_SDHCI_ZYNQ=y
Michal Simek61015152016-05-26 08:06:38 +020043CONFIG_DM_ETH=y
Tom Rinica22e962017-08-07 22:00:34 -040044CONFIG_PHY_GIGE=y
Michal Simek61015152016-05-26 08:06:38 +020045CONFIG_ZYNQ_GEM=y
Michal Simek61015152016-05-26 08:06:38 +020046CONFIG_DEBUG_UART_ZYNQ=y
47CONFIG_DEBUG_UART_BASE=0xff000000
48CONFIG_DEBUG_UART_CLOCK=100000000
49CONFIG_DEBUG_UART_ANNOUNCE=y