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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Rob Herring73089ad2011-10-24 08:50:20 +00002/*
3 * Copyright 2010-2011 Calxeda, Inc.
Rob Herring73089ad2011-10-24 08:50:20 +00004 */
5
6#include <common.h>
7#include <ahci.h>
Simon Glass1d91ba72019-11-14 12:57:37 -07008#include <cpu_func.h>
Simon Glass5e6201b2019-08-01 09:46:51 -06009#include <env.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060010#include <fdt_support.h>
Simon Glass97589732020-05-10 11:40:02 -060011#include <init.h>
Simon Glass274e0b02020-05-10 11:39:56 -060012#include <net.h>
Rob Herring12db8022012-02-21 12:52:26 +000013#include <netdev.h>
Rob Herring73089ad2011-10-24 08:50:20 +000014#include <scsi.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060015#include <asm/global_data.h>
Rob Herring73089ad2011-10-24 08:50:20 +000016
Alexey Brodkin267d8e22014-02-26 17:47:58 +040017#include <linux/sizes.h>
Rob Herring02fe7852012-02-01 16:57:54 +000018#include <asm/io.h>
Rob Herring73089ad2011-10-24 08:50:20 +000019
Rob Herringfd7ec6e2013-06-12 22:24:52 -050020#define HB_AHCI_BASE 0xffe08000
21
Rob Herring37057562015-06-05 00:58:42 +010022#define HB_SCU_A9_PWR_STATUS 0xfff10008
Rob Herringf9904ce2012-02-01 16:57:55 +000023#define HB_SREG_A9_PWR_REQ 0xfff3cf00
Rob Herring06d00742012-02-01 16:57:57 +000024#define HB_SREG_A9_BOOT_SRC_STAT 0xfff3cf04
Rob Herringfd7ec6e2013-06-12 22:24:52 -050025#define HB_SREG_A9_PWRDOM_STAT 0xfff3cf20
Mark Langsdorf1a707a22015-06-05 00:58:43 +010026#define HB_SREG_A15_PWR_CTRL 0xfff3c200
Rob Herringfd7ec6e2013-06-12 22:24:52 -050027
Rob Herringf9904ce2012-02-01 16:57:55 +000028#define HB_PWR_SUSPEND 0
29#define HB_PWR_SOFT_RESET 1
30#define HB_PWR_HARD_RESET 2
31#define HB_PWR_SHUTDOWN 3
32
Rob Herringfd7ec6e2013-06-12 22:24:52 -050033#define PWRDOM_STAT_SATA 0x80000000
34#define PWRDOM_STAT_PCI 0x40000000
35#define PWRDOM_STAT_EMMC 0x20000000
36
Rob Herring37057562015-06-05 00:58:42 +010037#define HB_SCU_A9_PWR_NORMAL 0
38#define HB_SCU_A9_PWR_DORMANT 2
39#define HB_SCU_A9_PWR_OFF 3
40
Rob Herring73089ad2011-10-24 08:50:20 +000041DECLARE_GLOBAL_DATA_PTR;
42
Mark Langsdorff913ff52015-06-05 00:58:49 +010043void cphy_disable_overrides(void);
44
Rob Herring73089ad2011-10-24 08:50:20 +000045/*
46 * Miscellaneous platform dependent initialisations
47 */
48int board_init(void)
49{
50 icache_enable();
51
52 return 0;
53}
54
Rob Herring6fd09422011-12-15 11:15:50 +000055/* We know all the init functions have been run now */
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +090056int board_eth_init(struct bd_info *bis)
Rob Herring6fd09422011-12-15 11:15:50 +000057{
58 int rc = 0;
59
60#ifdef CONFIG_CALXEDA_XGMAC
61 rc += calxedaxgmac_initialize(0, 0xfff50000);
62 rc += calxedaxgmac_initialize(1, 0xfff51000);
63#endif
64 return rc;
65}
66
Ian Campbell5af74b62014-03-07 01:20:57 +000067#ifdef CONFIG_SCSI_AHCI_PLAT
68void scsi_init(void)
Rob Herring73089ad2011-10-24 08:50:20 +000069{
Rob Herringfd7ec6e2013-06-12 22:24:52 -050070 u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
Rob Herring06d00742012-02-01 16:57:57 +000071
Mark Langsdorff913ff52015-06-05 00:58:49 +010072 cphy_disable_overrides();
Rob Herringfd7ec6e2013-06-12 22:24:52 -050073 if (reg & PWRDOM_STAT_SATA) {
Scott Wood16519a32015-04-17 09:19:01 -050074 ahci_init((void __iomem *)HB_AHCI_BASE);
Simon Glass48228732017-06-14 21:28:41 -060075 scsi_scan(true);
Rob Herringfd7ec6e2013-06-12 22:24:52 -050076 }
Ian Campbell5af74b62014-03-07 01:20:57 +000077}
78#endif
79
80#ifdef CONFIG_MISC_INIT_R
81int misc_init_r(void)
82{
83 char envbuffer[16];
84 u32 boot_choice;
Rob Herring06d00742012-02-01 16:57:57 +000085
86 boot_choice = readl(HB_SREG_A9_BOOT_SRC_STAT) & 0xff;
87 sprintf(envbuffer, "bootcmd%d", boot_choice);
Simon Glass64b723f2017-08-03 12:22:12 -060088 if (env_get(envbuffer)) {
Rob Herring06d00742012-02-01 16:57:57 +000089 sprintf(envbuffer, "run bootcmd%d", boot_choice);
Simon Glass6a38e412017-08-03 12:22:09 -060090 env_set("bootcmd", envbuffer);
Rob Herring06d00742012-02-01 16:57:57 +000091 } else
Simon Glass6a38e412017-08-03 12:22:09 -060092 env_set("bootcmd", "");
Rob Herring06d00742012-02-01 16:57:57 +000093
Rob Herring73089ad2011-10-24 08:50:20 +000094 return 0;
95}
Rob Herring13b17c32013-06-12 22:24:53 -050096#endif
Rob Herring73089ad2011-10-24 08:50:20 +000097
98int dram_init(void)
99{
100 gd->ram_size = SZ_512M;
101 return 0;
102}
103
Rob Herringfd7ec6e2013-06-12 22:24:52 -0500104#if defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900105int ft_board_setup(void *fdt, struct bd_info *bd)
Rob Herringfd7ec6e2013-06-12 22:24:52 -0500106{
107 static const char disabled[] = "disabled";
108 u32 reg = readl(HB_SREG_A9_PWRDOM_STAT);
109
110 if (!(reg & PWRDOM_STAT_SATA))
111 do_fixup_by_compat(fdt, "calxeda,hb-ahci", "status",
112 disabled, sizeof(disabled), 1);
113
114 if (!(reg & PWRDOM_STAT_EMMC))
115 do_fixup_by_compat(fdt, "calxeda,hb-sdhci", "status",
116 disabled, sizeof(disabled), 1);
Simon Glass2aec3cc2014-10-23 18:58:47 -0600117
118 return 0;
Rob Herringfd7ec6e2013-06-12 22:24:52 -0500119}
120#endif
121
Mark Langsdorf1a707a22015-06-05 00:58:43 +0100122static int is_highbank(void)
123{
124 uint32_t midr;
125
126 asm volatile ("mrc p15, 0, %0, c0, c0, 0\n" : "=r"(midr));
127
128 return (midr & 0xfff0) == 0xc090;
129}
130
Harald Seiler6f14d5f2020-12-15 16:47:52 +0100131void reset_cpu(void)
Rob Herring73089ad2011-10-24 08:50:20 +0000132{
Rob Herringf9904ce2012-02-01 16:57:55 +0000133 writel(HB_PWR_HARD_RESET, HB_SREG_A9_PWR_REQ);
Mark Langsdorf1a707a22015-06-05 00:58:43 +0100134 if (is_highbank())
135 writeb(HB_SCU_A9_PWR_OFF, HB_SCU_A9_PWR_STATUS);
136 else
137 writel(0x1, HB_SREG_A15_PWR_CTRL);
Rob Herring35139602012-12-02 17:06:22 +0000138
139 wfi();
Rob Herring73089ad2011-10-24 08:50:20 +0000140}
Mark Langsdorff913ff52015-06-05 00:58:49 +0100141
142/*
143 * turn off the override before transferring control to Linux, since Linux
144 * may not support spread spectrum.
145 */
146void arch_preboot_os(void)
147{
148 cphy_disable_overrides();
149}