blob: d3136ac850fe68e732ba9a3b92c1f095f9e11db3 [file] [log] [blame]
Eugen Hristev32f36cf2023-02-22 11:05:12 +02001CONFIG_ARM=y
2CONFIG_SKIP_LOWLEVEL_INIT=y
3CONFIG_COUNTER_FREQUENCY=24000000
4CONFIG_ARCH_ROCKCHIP=y
5CONFIG_TEXT_BASE=0x00a00000
6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
8CONFIG_NR_DRAM_BANKS=2
9CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
10CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
11CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b"
12CONFIG_DM_RESET=y
13CONFIG_ROCKCHIP_RK3588=y
14CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
15CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
16CONFIG_SPL_MMC=y
17CONFIG_SPL_SERIAL=y
18CONFIG_SPL_STACK_R_ADDR=0x600000
19CONFIG_TARGET_ROCK5B_RK3588=y
20CONFIG_SPL_STACK=0x400000
21CONFIG_DEBUG_UART_BASE=0xFEB50000
22CONFIG_DEBUG_UART_CLOCK=24000000
23CONFIG_SYS_LOAD_ADDR=0xc00800
24CONFIG_DEBUG_UART=y
25CONFIG_FIT=y
26CONFIG_FIT_VERBOSE=y
27CONFIG_SPL_FIT_SIGNATURE=y
28CONFIG_SPL_LOAD_FIT=y
Eugen Hristev7ea88fa2023-02-22 11:05:13 +020029CONFIG_OF_BOARD_SETUP=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +020030CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb"
31# CONFIG_DISPLAY_CPUINFO is not set
32CONFIG_DISPLAY_BOARDINFO_LATE=y
33CONFIG_SPL_MAX_SIZE=0x20000
34CONFIG_SPL_PAD_TO=0x7f8000
35CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
36CONFIG_SPL_BSS_START_ADDR=0x4000000
37CONFIG_SPL_BSS_MAX_SIZE=0x4000
38# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
39# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
40CONFIG_SPL_STACK_R=y
41CONFIG_SPL_ATF=y
42CONFIG_CMD_GPT=y
43CONFIG_CMD_MMC=y
44# CONFIG_CMD_SETEXPR is not set
45# CONFIG_SPL_DOS_PARTITION is not set
46CONFIG_SPL_OF_CONTROL=y
47CONFIG_OF_LIVE=y
48CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
49CONFIG_NET_RANDOM_ETHADDR=y
50CONFIG_SPL_REGMAP=y
51CONFIG_SPL_SYSCON=y
52CONFIG_SPL_CLK=y
53CONFIG_ROCKCHIP_GPIO=y
54CONFIG_SYS_I2C_ROCKCHIP=y
55CONFIG_MISC=y
56CONFIG_SUPPORT_EMMC_RPMB=y
57CONFIG_MMC_DW=y
58CONFIG_MMC_DW_ROCKCHIP=y
59CONFIG_MMC_SDHCI=y
60CONFIG_MMC_SDHCI_SDMA=y
Jonas Karlman5d259362023-04-18 16:46:45 +000061# CONFIG_SPL_MMC_SDHCI_SDMA is not set
Eugen Hristev32f36cf2023-02-22 11:05:12 +020062CONFIG_MMC_SDHCI_ROCKCHIP=y
63CONFIG_ETH_DESIGNWARE=y
64CONFIG_GMAC_ROCKCHIP=y
65CONFIG_REGULATOR_PWM=y
66CONFIG_PWM_ROCKCHIP=y
67CONFIG_SPL_RAM=y
68CONFIG_BAUDRATE=1500000
69CONFIG_DEBUG_UART_SHIFT=2
Eugen Hristev32f36cf2023-02-22 11:05:12 +020070CONFIG_SYSRESET=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +020071CONFIG_ERRNO_STR=y