| Eugen Hristev | 32f36cf | 2023-02-22 11:05:12 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_SKIP_LOWLEVEL_INIT=y |
| 3 | CONFIG_COUNTER_FREQUENCY=24000000 |
| 4 | CONFIG_ARCH_ROCKCHIP=y |
| 5 | CONFIG_TEXT_BASE=0x00a00000 |
| 6 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
| 7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
| 8 | CONFIG_NR_DRAM_BANKS=2 |
| 9 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 10 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 |
| 11 | CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b" |
| 12 | CONFIG_DM_RESET=y |
| 13 | CONFIG_ROCKCHIP_RK3588=y |
| 14 | CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y |
| 15 | CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y |
| 16 | CONFIG_SPL_MMC=y |
| 17 | CONFIG_SPL_SERIAL=y |
| 18 | CONFIG_SPL_STACK_R_ADDR=0x600000 |
| 19 | CONFIG_TARGET_ROCK5B_RK3588=y |
| 20 | CONFIG_SPL_STACK=0x400000 |
| 21 | CONFIG_DEBUG_UART_BASE=0xFEB50000 |
| 22 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| 23 | CONFIG_SYS_LOAD_ADDR=0xc00800 |
| 24 | CONFIG_DEBUG_UART=y |
| 25 | CONFIG_FIT=y |
| 26 | CONFIG_FIT_VERBOSE=y |
| 27 | CONFIG_SPL_FIT_SIGNATURE=y |
| 28 | CONFIG_SPL_LOAD_FIT=y |
| Eugen Hristev | 7ea88fa | 2023-02-22 11:05:13 +0200 | [diff] [blame^] | 29 | CONFIG_OF_BOARD_SETUP=y |
| Eugen Hristev | 32f36cf | 2023-02-22 11:05:12 +0200 | [diff] [blame] | 30 | CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb" |
| 31 | # CONFIG_DISPLAY_CPUINFO is not set |
| 32 | CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 33 | CONFIG_SPL_MAX_SIZE=0x20000 |
| 34 | CONFIG_SPL_PAD_TO=0x7f8000 |
| 35 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 36 | CONFIG_SPL_BSS_START_ADDR=0x4000000 |
| 37 | CONFIG_SPL_BSS_MAX_SIZE=0x4000 |
| 38 | # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| 39 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| 40 | CONFIG_SPL_STACK_R=y |
| 41 | CONFIG_SPL_ATF=y |
| 42 | CONFIG_CMD_GPT=y |
| 43 | CONFIG_CMD_MMC=y |
| 44 | # CONFIG_CMD_SETEXPR is not set |
| 45 | # CONFIG_SPL_DOS_PARTITION is not set |
| 46 | CONFIG_SPL_OF_CONTROL=y |
| 47 | CONFIG_OF_LIVE=y |
| 48 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| 49 | CONFIG_NET_RANDOM_ETHADDR=y |
| 50 | CONFIG_SPL_REGMAP=y |
| 51 | CONFIG_SPL_SYSCON=y |
| 52 | CONFIG_SPL_CLK=y |
| 53 | CONFIG_ROCKCHIP_GPIO=y |
| 54 | CONFIG_SYS_I2C_ROCKCHIP=y |
| 55 | CONFIG_MISC=y |
| 56 | CONFIG_SUPPORT_EMMC_RPMB=y |
| 57 | CONFIG_MMC_DW=y |
| 58 | CONFIG_MMC_DW_ROCKCHIP=y |
| 59 | CONFIG_MMC_SDHCI=y |
| 60 | CONFIG_MMC_SDHCI_SDMA=y |
| 61 | CONFIG_MMC_SDHCI_ROCKCHIP=y |
| 62 | CONFIG_ETH_DESIGNWARE=y |
| 63 | CONFIG_GMAC_ROCKCHIP=y |
| 64 | CONFIG_REGULATOR_PWM=y |
| 65 | CONFIG_PWM_ROCKCHIP=y |
| 66 | CONFIG_SPL_RAM=y |
| 67 | CONFIG_BAUDRATE=1500000 |
| 68 | CONFIG_DEBUG_UART_SHIFT=2 |
| 69 | CONFIG_DEBUG_UART_ANNOUNCE=y |
| 70 | CONFIG_SYSRESET=y |
| 71 | # CONFIG_BINMAN_FDT is not set |
| 72 | CONFIG_ERRNO_STR=y |