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David Feng3b5458c2013-12-14 11:47:37 +08001/*
2 * Configuration for Versatile Express. Parts were derived from other ARM
3 * configurations.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __VEXPRESS_AEMV8A_H
9#define __VEXPRESS_AEMV8A_H
10
Linus Walleij800d6fd2015-01-23 11:50:53 +010011#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
Darwin Rambod32d4112014-06-09 11:12:59 -070012#ifndef CONFIG_SEMIHOSTING
Linus Walleij800d6fd2015-01-23 11:50:53 +010013#error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
Darwin Rambod32d4112014-06-09 11:12:59 -070014#endif
Darwin Rambod32d4112014-06-09 11:12:59 -070015#define CONFIG_ARMV8_SWITCH_TO_EL1
16#endif
17
David Feng3b5458c2013-12-14 11:47:37 +080018#define CONFIG_REMAKE_ELF
19
David Feng3b5458c2013-12-14 11:47:37 +080020#define CONFIG_SUPPORT_RAW_INITRD
21
Alexander Graf5889e392016-03-04 01:09:51 +010022/* MMU Definitions */
23#define CONFIG_SYS_CACHELINE_SIZE 64
David Feng3b5458c2013-12-14 11:47:37 +080024
25#define CONFIG_IDENT_STRING " vexpress_aemv8a"
Bin Meng75574052016-02-05 19:30:11 -080026#define CONFIG_BOOTP_VCI_STRING "U-Boot.armv8.vexpress_aemv8a"
David Feng3b5458c2013-12-14 11:47:37 +080027
28/* Link Definitions */
Ryan Harkinb6b96652015-10-09 17:18:02 +010029#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
30 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
Darwin Rambod32d4112014-06-09 11:12:59 -070031/* ATF loads u-boot here for BASE_FVP model */
32#define CONFIG_SYS_TEXT_BASE 0x88000000
33#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
Linus Walleijc5822502015-01-23 14:41:10 +010034#elif CONFIG_TARGET_VEXPRESS64_JUNO
35#define CONFIG_SYS_TEXT_BASE 0xe0000000
36#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
Darwin Rambod32d4112014-06-09 11:12:59 -070037#endif
David Feng3b5458c2013-12-14 11:47:37 +080038
Ryan Harkin642aa2c2015-10-09 17:18:01 +010039#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
40
David Feng3b5458c2013-12-14 11:47:37 +080041/* CS register bases for the original memory map. */
42#define V2M_PA_CS0 0x00000000
43#define V2M_PA_CS1 0x14000000
44#define V2M_PA_CS2 0x18000000
45#define V2M_PA_CS3 0x1c000000
46#define V2M_PA_CS4 0x0c000000
47#define V2M_PA_CS5 0x10000000
48
49#define V2M_PERIPH_OFFSET(x) (x << 16)
50#define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
51#define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
52#define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
53
54#define V2M_BASE 0x80000000
55
David Feng3b5458c2013-12-14 11:47:37 +080056/* Common peripherals relative to CS7. */
57#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
58#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
59#define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
60#define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
61
Linus Walleijc5822502015-01-23 14:41:10 +010062#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
63#define V2M_UART0 0x7ff80000
64#define V2M_UART1 0x7ff70000
65#else /* Not Juno */
David Feng3b5458c2013-12-14 11:47:37 +080066#define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
67#define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
68#define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
69#define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
Linus Walleijc5822502015-01-23 14:41:10 +010070#endif
David Feng3b5458c2013-12-14 11:47:37 +080071
72#define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
73
74#define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
75#define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
76
77#define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
78#define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
79
80#define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
81
82#define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
83
84/* System register offsets. */
85#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
86#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
87#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
88
89/* Generic Timer Definitions */
90#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
91
92/* Generic Interrupt Controller Definitions */
David Feng79bbde02014-03-14 14:26:27 +080093#ifdef CONFIG_GICV3
94#define GICD_BASE (0x2f000000)
95#define GICR_BASE (0x2f100000)
96#else
Darwin Rambod32d4112014-06-09 11:12:59 -070097
Ryan Harkinb6b96652015-10-09 17:18:02 +010098#if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
99 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
Darwin Rambod32d4112014-06-09 11:12:59 -0700100#define GICD_BASE (0x2f000000)
101#define GICC_BASE (0x2c000000)
Linus Walleijc5822502015-01-23 14:41:10 +0100102#elif CONFIG_TARGET_VEXPRESS64_JUNO
103#define GICD_BASE (0x2C010000)
104#define GICC_BASE (0x2C02f000)
David Feng79bbde02014-03-14 14:26:27 +0800105#endif
Linus Walleija90caa32015-03-23 11:06:14 +0100106#endif /* !CONFIG_GICV3 */
David Feng3b5458c2013-12-14 11:47:37 +0800107
David Feng3b5458c2013-12-14 11:47:37 +0800108/* Size of malloc() pool */
Tom Rini7e76aa42014-08-14 06:42:37 -0400109#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
David Feng3b5458c2013-12-14 11:47:37 +0800110
Linus Walleij48b47552015-02-17 11:35:25 +0100111/* Ethernet Configuration */
112#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
113/* The real hardware Versatile express uses SMSC9118 */
114#define CONFIG_SMC911X 1
115#define CONFIG_SMC911X_32_BIT 1
116#define CONFIG_SMC911X_BASE (0x018000000)
117#else
118/* The Vexpress64 simulators use SMSC91C111 */
Bhupesh Sharmae997f352014-01-16 09:47:40 -0600119#define CONFIG_SMC91111 1
120#define CONFIG_SMC91111_BASE (0x01A000000)
Linus Walleij48b47552015-02-17 11:35:25 +0100121#endif
David Feng3b5458c2013-12-14 11:47:37 +0800122
123/* PL011 Serial Configuration */
Linus Walleij31e476e2015-04-14 10:01:35 +0200124#define CONFIG_BAUDRATE 115200
David Fengab33c2c2015-01-31 11:55:29 +0800125#define CONFIG_CONS_INDEX 0
Linus Walleij31e476e2015-04-14 10:01:35 +0200126#define CONFIG_PL01X_SERIAL
David Feng3b5458c2013-12-14 11:47:37 +0800127#define CONFIG_PL011_SERIAL
Linus Walleijc5822502015-01-23 14:41:10 +0100128#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
129#define CONFIG_PL011_CLOCK 7273800
130#else
David Feng3b5458c2013-12-14 11:47:37 +0800131#define CONFIG_PL011_CLOCK 24000000
Linus Walleijc5822502015-01-23 14:41:10 +0100132#endif
David Feng3b5458c2013-12-14 11:47:37 +0800133
134/* Command line configuration */
135#define CONFIG_MENU
136/*#define CONFIG_MENU_SHOW*/
Tom Rini9557a4a2014-08-14 06:42:38 -0400137#define CONFIG_CMD_BOOTI
138#define CONFIG_CMD_UNZIP
David Feng3b5458c2013-12-14 11:47:37 +0800139#define CONFIG_CMD_PXE
140#define CONFIG_CMD_ENV
David Feng3b5458c2013-12-14 11:47:37 +0800141#define CONFIG_DOS_PARTITION
142
143/* BOOTP options */
144#define CONFIG_BOOTP_BOOTFILESIZE
145#define CONFIG_BOOTP_BOOTPATH
146#define CONFIG_BOOTP_GATEWAY
147#define CONFIG_BOOTP_HOSTNAME
148#define CONFIG_BOOTP_PXE
149#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
150
151/* Miscellaneous configurable options */
152#define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
153
154/* Physical Memory Map */
David Feng3b5458c2013-12-14 11:47:37 +0800155#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
Linus Walleij0a38bfe2015-05-11 10:03:57 +0200156/* Top 16MB reserved for secure world use */
157#define DRAM_SEC_SIZE 0x01000000
158#define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
159#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
160
Ryan Harkin98d2fff2015-11-18 10:39:07 +0000161#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
162#define CONFIG_NR_DRAM_BANKS 2
163#define PHYS_SDRAM_2 (0x880000000)
164#define PHYS_SDRAM_2_SIZE 0x180000000
165#else
166#define CONFIG_NR_DRAM_BANKS 1
167#endif
168
Linus Walleij0a38bfe2015-05-11 10:03:57 +0200169/* Enable memtest */
Linus Walleij0a38bfe2015-05-11 10:03:57 +0200170#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
171#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
David Feng3b5458c2013-12-14 11:47:37 +0800172
173/* Initial environment variables */
Linus Walleijc39566a2015-04-05 01:48:32 +0200174#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
175/*
176 * Defines where the kernel and FDT exist in NOR flash and where it will
177 * be copied into DRAM
178 */
179#define CONFIG_EXTRA_ENV_SETTINGS \
Ryan Harkin66fe7ee2015-10-09 17:18:07 +0100180 "kernel_name=norkern\0" \
181 "kernel_alt_name=Image\0" \
Andre Przywaraa9415102016-01-04 15:43:36 +0000182 "kernel_addr=0x80080000\0" \
Ryan Harkinf7e1e9e2015-10-09 17:18:06 +0100183 "initrd_name=ramdisk.img\0" \
184 "initrd_addr=0x84000000\0" \
Alexander Grafaf684802016-03-04 01:10:11 +0100185 "fdtfile=board.dtb\0" \
Ryan Harkin66fe7ee2015-10-09 17:18:07 +0100186 "fdt_alt_name=juno\0" \
Linus Walleijc39566a2015-04-05 01:48:32 +0200187 "fdt_addr=0x83000000\0" \
188 "fdt_high=0xffffffffffffffff\0" \
189 "initrd_high=0xffffffffffffffff\0" \
190
191/* Assume we boot with root on the first partition of a USB stick */
192#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " \
Ryan Harkina30356f2015-10-09 17:18:08 +0100193 "root=/dev/sda2 rw " \
Linus Walleij77e36f72015-05-14 17:38:33 +0200194 "rootwait "\
Ryan Harkin64541f22015-10-09 17:17:59 +0100195 "earlyprintk=pl011,0x7ff80000 debug "\
196 "user_debug=31 "\
Ryan Harkin6abfbf42015-10-09 17:18:03 +0100197 "androidboot.hardware=juno "\
Linus Walleijc39566a2015-04-05 01:48:32 +0200198 "loglevel=9"
199
200/* Copy the kernel and FDT to DRAM memory and boot */
201#define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \
Ryan Harkin66fe7ee2015-10-09 17:18:07 +0100202 "if test $? -eq 1; then "\
203 " echo Loading ${kernel_alt_name} instead of "\
204 "${kernel_name}; "\
205 " afs load ${kernel_alt_name} ${kernel_addr};"\
206 "fi ; "\
Alexander Grafaf684802016-03-04 01:10:11 +0100207 "afs load ${fdtfile} ${fdt_addr} ; " \
Ryan Harkin66fe7ee2015-10-09 17:18:07 +0100208 "if test $? -eq 1; then "\
209 " echo Loading ${fdt_alt_name} instead of "\
Alexander Grafaf684802016-03-04 01:10:11 +0100210 "${fdtfile}; "\
Ryan Harkin66fe7ee2015-10-09 17:18:07 +0100211 " afs load ${fdt_alt_name} ${fdt_addr}; "\
212 "fi ; "\
Linus Walleijc39566a2015-04-05 01:48:32 +0200213 "fdt addr ${fdt_addr}; fdt resize; " \
Ryan Harkinf7e1e9e2015-10-09 17:18:06 +0100214 "if afs load ${initrd_name} ${initrd_addr} ; "\
215 "then "\
216 " setenv initrd_param ${initrd_addr}; "\
217 " else setenv initrd_param -; "\
218 "fi ; " \
219 "booti ${kernel_addr} ${initrd_param} ${fdt_addr}"
Linus Walleijc39566a2015-04-05 01:48:32 +0200220
221#define CONFIG_BOOTDELAY 1
222
223#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
Darwin Rambod32d4112014-06-09 11:12:59 -0700224#define CONFIG_EXTRA_ENV_SETTINGS \
Linus Walleij4d30c9d2015-05-27 09:45:39 +0200225 "kernel_name=Image\0" \
Andre Przywaraa9415102016-01-04 15:43:36 +0000226 "kernel_addr=0x80080000\0" \
Darwin Rambod32d4112014-06-09 11:12:59 -0700227 "initrd_name=ramdisk.img\0" \
Linus Walleije08177c2015-03-23 11:06:12 +0100228 "initrd_addr=0x88000000\0" \
Alexander Grafaf684802016-03-04 01:10:11 +0100229 "fdtfile=devtree.dtb\0" \
Linus Walleije08177c2015-03-23 11:06:12 +0100230 "fdt_addr=0x83000000\0" \
Darwin Rambod32d4112014-06-09 11:12:59 -0700231 "fdt_high=0xffffffffffffffff\0" \
232 "initrd_high=0xffffffffffffffff\0"
233
234#define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
235 "0x1c090000 debug user_debug=31 "\
236 "loglevel=9"
237
Linus Walleije08177c2015-03-23 11:06:12 +0100238#define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \
Alexander Grafaf684802016-03-04 01:10:11 +0100239 "smhload ${fdtfile} ${fdt_addr}; " \
Ryan Harkin64541f22015-10-09 17:17:59 +0100240 "smhload ${initrd_name} ${initrd_addr} "\
241 "initrd_end; " \
Linus Walleij4d30c9d2015-05-27 09:45:39 +0200242 "fdt addr ${fdt_addr}; fdt resize; " \
243 "fdt chosen ${initrd_addr} ${initrd_end}; " \
244 "booti $kernel_addr - $fdt_addr"
Darwin Rambod32d4112014-06-09 11:12:59 -0700245
246#define CONFIG_BOOTDELAY 1
247
Ryan Harkinb6b96652015-10-09 17:18:02 +0100248#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM
249#define CONFIG_EXTRA_ENV_SETTINGS \
250 "kernel_addr=0x80080000\0" \
251 "initrd_addr=0x84000000\0" \
252 "fdt_addr=0x83000000\0" \
253 "fdt_high=0xffffffffffffffff\0" \
254 "initrd_high=0xffffffffffffffff\0"
255
256#define CONFIG_BOOTARGS "console=ttyAMA0 earlyprintk=pl011,"\
257 "0x1c090000 debug user_debug=31 "\
258 "androidboot.hardware=fvpbase "\
259 "root=/dev/vda2 rw "\
260 "rootwait "\
261 "loglevel=9"
262
263#define CONFIG_BOOTCOMMAND "booti $kernel_addr $initrd_addr $fdt_addr"
264
265#define CONFIG_BOOTDELAY 1
266
Darwin Rambod32d4112014-06-09 11:12:59 -0700267#endif
David Feng3b5458c2013-12-14 11:47:37 +0800268
David Feng3b5458c2013-12-14 11:47:37 +0800269/* Monitor Command Prompt */
270#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
David Feng3b5458c2013-12-14 11:47:37 +0800271#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
272 sizeof(CONFIG_SYS_PROMPT) + 16)
David Feng3b5458c2013-12-14 11:47:37 +0800273#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
274#define CONFIG_SYS_LONGHELP
Tom Rini7e76aa42014-08-14 06:42:37 -0400275#define CONFIG_CMDLINE_EDITING
David Feng3b5458c2013-12-14 11:47:37 +0800276#define CONFIG_SYS_MAXARGS 64 /* max command args */
277
Ryan Harkinad5b2a22015-11-18 10:39:09 +0000278#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
279#define CONFIG_SYS_FLASH_BASE 0x08000000
280/* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */
281#define CONFIG_SYS_MAX_FLASH_SECT 259
282/* Store environment at top of flash in the same location as blank.img */
283/* in the Juno firmware. */
284#define CONFIG_ENV_ADDR 0x0BFC0000
285#define CONFIG_ENV_SECT_SIZE 0x00010000
Linus Walleij6ba4b6a2015-02-19 17:19:37 +0100286#else
Ryan Harkinad5b2a22015-11-18 10:39:09 +0000287#define CONFIG_SYS_FLASH_BASE 0x0C000000
288/* 256 x 256KiB sectors */
289#define CONFIG_SYS_MAX_FLASH_SECT 256
290/* Store environment at top of flash */
291#define CONFIG_ENV_ADDR 0x0FFC0000
292#define CONFIG_ENV_SECT_SIZE 0x00040000
293#endif
294
Linus Walleij6ba4b6a2015-02-19 17:19:37 +0100295#define CONFIG_SYS_FLASH_CFI 1
296#define CONFIG_FLASH_CFI_DRIVER 1
Ryan Harkinb1a4a672015-05-08 18:07:52 +0100297#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
Ryan Harkinad5b2a22015-11-18 10:39:09 +0000298#define CONFIG_SYS_MAX_FLASH_BANKS 1
Linus Walleij6ba4b6a2015-02-19 17:19:37 +0100299
Linus Walleij6ba4b6a2015-02-19 17:19:37 +0100300#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
301#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
302#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
Ryan Harkinad5b2a22015-11-18 10:39:09 +0000303#define FLASH_MAX_SECTOR_SIZE 0x00040000
304#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
305#define CONFIG_ENV_IS_IN_FLASH 1
Linus Walleij6ba4b6a2015-02-19 17:19:37 +0100306
David Feng3b5458c2013-12-14 11:47:37 +0800307#endif /* __VEXPRESS_AEMV8A_H */