Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 2 | /* |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 3 | * Copyright 2017-2018 NXP |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | 3bbe70c | 2019-12-28 10:44:54 -0700 | [diff] [blame^] | 7 | #include <fdt_support.h> |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 8 | #include <i2c.h> |
| 9 | #include <asm/io.h> |
| 10 | #include <asm/arch/clock.h> |
| 11 | #include <asm/arch/fsl_serdes.h> |
Prabhakar Kushwaha | 74d129b | 2017-01-30 17:05:35 +0530 | [diff] [blame] | 12 | #ifdef CONFIG_FSL_LS_PPA |
| 13 | #include <asm/arch/ppa.h> |
| 14 | #endif |
York Sun | 729f2d1 | 2017-03-06 09:02:34 -0800 | [diff] [blame] | 15 | #include <asm/arch/mmu.h> |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 16 | #include <asm/arch/soc.h> |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 17 | #include <fsl_esdhc.h> |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 18 | #include <hwconfig.h> |
Simon Glass | 9d1f619 | 2019-08-02 09:44:25 -0600 | [diff] [blame] | 19 | #include <env_internal.h> |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 20 | #include <fsl_mmdc.h> |
| 21 | #include <netdev.h> |
Vinitha V Pillai | ad698c3 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 22 | #include <fsl_sec.h> |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 23 | |
| 24 | DECLARE_GLOBAL_DATA_PTR; |
| 25 | |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 26 | static inline int get_board_version(void) |
| 27 | { |
Pramod Kumar | 46d752a | 2018-08-14 09:49:55 +0530 | [diff] [blame] | 28 | uint32_t val; |
| 29 | #ifdef CONFIG_TARGET_LS1012AFRDM |
| 30 | val = 0; |
| 31 | #else |
| 32 | struct ccsr_gpio *pgpio = (void *)(GPIO2_BASE_ADDR); |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 33 | |
Pramod Kumar | 46d752a | 2018-08-14 09:49:55 +0530 | [diff] [blame] | 34 | val = in_be32(&pgpio->gpdat) & BOARD_REV_MASK;/*Get GPIO2 11,12,14*/ |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 35 | |
Pramod Kumar | 46d752a | 2018-08-14 09:49:55 +0530 | [diff] [blame] | 36 | #endif |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 37 | return val; |
| 38 | } |
| 39 | |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 40 | int checkboard(void) |
| 41 | { |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 42 | #ifdef CONFIG_TARGET_LS1012AFRDM |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 43 | puts("Board: LS1012AFRDM "); |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 44 | #else |
| 45 | int rev; |
| 46 | |
| 47 | rev = get_board_version(); |
| 48 | |
| 49 | puts("Board: FRWY-LS1012A "); |
| 50 | |
| 51 | puts("Version"); |
| 52 | |
| 53 | switch (rev) { |
Pramod Kumar | 46d752a | 2018-08-14 09:49:55 +0530 | [diff] [blame] | 54 | case BOARD_REV_A_B: |
| 55 | puts(": RevA/B "); |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 56 | break; |
Pramod Kumar | 46d752a | 2018-08-14 09:49:55 +0530 | [diff] [blame] | 57 | case BOARD_REV_C: |
| 58 | puts(": RevC "); |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 59 | break; |
| 60 | default: |
| 61 | puts(": unknown"); |
| 62 | break; |
| 63 | } |
| 64 | #endif |
| 65 | |
| 66 | return 0; |
| 67 | } |
| 68 | |
| 69 | #ifdef CONFIG_TARGET_LS1012AFRWY |
| 70 | int esdhc_status_fixup(void *blob, const char *compat) |
| 71 | { |
| 72 | char esdhc0_path[] = "/soc/esdhc@1560000"; |
| 73 | char esdhc1_path[] = "/soc/esdhc@1580000"; |
| 74 | |
| 75 | do_fixup_by_path(blob, esdhc0_path, "status", "okay", |
| 76 | sizeof("okay"), 1); |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 77 | |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 78 | do_fixup_by_path(blob, esdhc1_path, "status", "disabled", |
| 79 | sizeof("disabled"), 1); |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 80 | return 0; |
| 81 | } |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 82 | #endif |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 83 | |
Rajesh Bhagat | 487084e | 2018-11-05 18:03:08 +0000 | [diff] [blame] | 84 | #ifdef CONFIG_TFABOOT |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 85 | int dram_init(void) |
| 86 | { |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 87 | #ifdef CONFIG_TARGET_LS1012AFRWY |
| 88 | int board_rev; |
| 89 | #endif |
Rajesh Bhagat | 487084e | 2018-11-05 18:03:08 +0000 | [diff] [blame] | 90 | |
| 91 | gd->ram_size = tfa_get_dram_size(); |
| 92 | |
| 93 | if (!gd->ram_size) { |
| 94 | #ifdef CONFIG_TARGET_LS1012AFRWY |
| 95 | board_rev = get_board_version(); |
| 96 | |
| 97 | if (board_rev & BOARD_REV_C) |
| 98 | gd->ram_size = SYS_SDRAM_SIZE_1024; |
| 99 | else |
| 100 | gd->ram_size = SYS_SDRAM_SIZE_512; |
| 101 | #else |
| 102 | gd->ram_size = CONFIG_SYS_SDRAM_SIZE; |
| 103 | #endif |
| 104 | } |
| 105 | return 0; |
| 106 | } |
| 107 | #else |
| 108 | int dram_init(void) |
| 109 | { |
| 110 | #ifdef CONFIG_TARGET_LS1012AFRWY |
| 111 | int board_rev; |
| 112 | #endif |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 113 | struct fsl_mmdc_info mparam = { |
York Sun | c1e979b | 2016-09-26 08:09:25 -0700 | [diff] [blame] | 114 | 0x04180000, /* mdctl */ |
| 115 | 0x00030035, /* mdpdc */ |
| 116 | 0x12554000, /* mdotc */ |
| 117 | 0xbabf7954, /* mdcfg0 */ |
| 118 | 0xdb328f64, /* mdcfg1 */ |
| 119 | 0x01ff00db, /* mdcfg2 */ |
| 120 | 0x00001680, /* mdmisc */ |
| 121 | 0x0f3c8000, /* mdref */ |
| 122 | 0x00002000, /* mdrwd */ |
| 123 | 0x00bf1023, /* mdor */ |
| 124 | 0x0000003f, /* mdasp */ |
| 125 | 0x0000022a, /* mpodtctrl */ |
| 126 | 0xa1390003, /* mpzqhwctrl */ |
| 127 | }; |
| 128 | |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 129 | #ifdef CONFIG_TARGET_LS1012AFRWY |
| 130 | board_rev = get_board_version(); |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 131 | |
Pramod Kumar | 46d752a | 2018-08-14 09:49:55 +0530 | [diff] [blame] | 132 | if (board_rev == BOARD_REV_C) { |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 133 | mparam.mdctl = 0x05180000; |
| 134 | gd->ram_size = SYS_SDRAM_SIZE_1024; |
| 135 | } else { |
| 136 | gd->ram_size = SYS_SDRAM_SIZE_512; |
| 137 | } |
| 138 | #else |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 139 | gd->ram_size = CONFIG_SYS_SDRAM_SIZE; |
Bhaskar Upadhaya | 5e6f598 | 2018-05-23 11:03:30 +0530 | [diff] [blame] | 140 | #endif |
| 141 | mmdc_init(&mparam); |
| 142 | |
York Sun | 729f2d1 | 2017-03-06 09:02:34 -0800 | [diff] [blame] | 143 | #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) |
| 144 | /* This will break-before-make MMU for DDR */ |
| 145 | update_early_mmu_table(); |
| 146 | #endif |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 147 | |
| 148 | return 0; |
| 149 | } |
Rajesh Bhagat | 487084e | 2018-11-05 18:03:08 +0000 | [diff] [blame] | 150 | #endif |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 151 | |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 152 | int board_early_init_f(void) |
| 153 | { |
| 154 | fsl_lsch2_early_init_f(); |
| 155 | |
| 156 | return 0; |
| 157 | } |
| 158 | |
| 159 | int board_init(void) |
| 160 | { |
Ashish Kumar | 1123406 | 2017-08-11 11:09:14 +0530 | [diff] [blame] | 161 | struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR + |
| 162 | CONFIG_SYS_CCI400_OFFSET); |
| 163 | |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 164 | /* |
| 165 | * Set CCI-400 control override register to enable barrier |
| 166 | * transaction |
| 167 | */ |
Rajesh Bhagat | 487084e | 2018-11-05 18:03:08 +0000 | [diff] [blame] | 168 | if (current_el() == 3) |
| 169 | out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 170 | |
| 171 | #ifdef CONFIG_ENV_IS_NOWHERE |
| 172 | gd->env_addr = (ulong)&default_environment[0]; |
| 173 | #endif |
| 174 | |
Vinitha V Pillai | ad698c3 | 2018-05-23 11:03:31 +0530 | [diff] [blame] | 175 | #ifdef CONFIG_FSL_CAAM |
| 176 | sec_init(); |
| 177 | #endif |
| 178 | |
Prabhakar Kushwaha | 74d129b | 2017-01-30 17:05:35 +0530 | [diff] [blame] | 179 | #ifdef CONFIG_FSL_LS_PPA |
| 180 | ppa_init(); |
| 181 | #endif |
Prabhakar Kushwaha | 9e7ee7b | 2016-06-03 18:41:36 +0530 | [diff] [blame] | 182 | return 0; |
| 183 | } |
| 184 | |
| 185 | int ft_board_setup(void *blob, bd_t *bd) |
| 186 | { |
| 187 | arch_fixup_fdt(blob); |
| 188 | |
| 189 | ft_cpu_setup(blob, bd); |
| 190 | |
| 191 | return 0; |
| 192 | } |