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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk591dda52002-11-18 00:14:45 +00002/*
Bin Meng8c5acf42014-12-12 21:05:22 +08003 * U-Boot - x86 Startup Code
wdenk591dda52002-11-18 00:14:45 +00004 *
Simon Glass202a0962019-09-25 08:11:44 -06005 * This is always the first code to run from the U-Boot source. To spell it out:
6 *
7 * 1. When TPL (Tertiary Program Loader) is enabled, the boot flow is
8 * TPL->SPL->U-Boot and this file is used for TPL. Then start_from_tpl.S is used
9 * for SPL and start_from_spl.S is used for U-Boot proper.
10 *
11 * 2. When SPL (Secondary Program Loader) is enabled, but not TPL, the boot
12 * flow is SPL->U-Boot and this file is used for SPL. Then start_from_spl.S is
13 * used for U-Boot proper.
14 *
15 * 3. When neither TPL nor SPL is used, this file is used for U-Boot proper.
16 *
Graeme Russ45fc1d82011-04-13 19:43:26 +100017 * (C) Copyright 2008-2011
18 * Graeme Russ, <graeme.russ@gmail.com>
19 *
20 * (C) Copyright 2002
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +020021 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk591dda52002-11-18 00:14:45 +000022 */
23
wdenk591dda52002-11-18 00:14:45 +000024#include <config.h>
Graeme Russ5fb91cc2010-10-07 20:03:29 +110025#include <asm/global_data.h>
Simon Glass245561d2014-11-12 22:42:09 -070026#include <asm/post.h>
Graeme Russ391bb952011-12-31 10:24:36 +110027#include <asm/processor.h>
Graeme Russ93efcb22011-02-12 15:11:32 +110028#include <asm/processor-flags.h>
Graeme Russ35368962011-12-31 22:58:15 +110029#include <generated/generic-asm-offsets.h>
Bin Meng8c5acf42014-12-12 21:05:22 +080030#include <generated/asm-offsets.h>
Bin Meng253a24a2018-10-25 03:05:37 -070031#include <linux/linkage.h>
wdenk591dda52002-11-18 00:14:45 +000032
Alexander Graf94a10f22018-06-12 07:48:37 +020033.section .text.start
wdenk591dda52002-11-18 00:14:45 +000034.code32
35.globl _start
wdenk57b2d802003-06-27 21:31:46 +000036.type _start, @function
Graeme Russcbfce1d2011-04-13 19:43:28 +100037.globl _x86boot_start
38_x86boot_start:
Graeme Russ8accbb92010-04-24 00:05:42 +100039 /*
Simon Glass611f7492015-07-31 09:31:25 -060040 * This is the fail-safe 32-bit bootstrap entry point.
41 *
42 * This code is used when booting from another boot loader like
43 * coreboot or EFI. So we repeat some of the same init found in
44 * start16.
Graeme Russ8accbb92010-04-24 00:05:42 +100045 */
46 cli
47 cld
48
Graeme Russc379b5d2011-11-08 02:33:23 +000049 /* Turn off cache (this might require a 486-class CPU) */
Graeme Russ8accbb92010-04-24 00:05:42 +100050 movl %cr0, %eax
Graeme Russ93efcb22011-02-12 15:11:32 +110051 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Graeme Russ8accbb92010-04-24 00:05:42 +100052 movl %eax, %cr0
Andy Shevchenkof3514a62020-02-17 17:30:12 +020053 wbinvd
Graeme Russ8accbb92010-04-24 00:05:42 +100054
Simon Glassf95ad8c2015-08-04 12:33:57 -060055 /*
56 * Zero the BIST (Built-In Self Test) value since we don't have it.
57 * It must be 0 or the previous loader would have reported an error.
58 */
59 movl $0, %ebp
60
Gabe Blackef899322012-11-03 11:41:28 +000061 jmp 1f
Simon Glass5d18dc92015-07-31 09:31:28 -060062
63 /* Add a way for tools to discover the _start entry point */
64 .align 4
65 .long 0x12345678
wdenk57b2d802003-06-27 21:31:46 +000066_start:
Stefan Roesefaa88212019-08-16 14:45:28 +020067 /* This is the 32-bit cold-reset entry point, coming from start16 */
Simon Glassf95ad8c2015-08-04 12:33:57 -060068
Simon Glass1f4476c2014-11-06 13:20:10 -070069 /* Save BIST */
70 movl %eax, %ebp
Simon Glassf95ad8c2015-08-04 12:33:57 -0600711:
72
73 /* Save table pointer */
74 movl %ecx, %esi
Graeme Russ8accbb92010-04-24 00:05:42 +100075
Andy Shevchenko2ae7da02017-02-05 16:52:00 +030076#ifdef CONFIG_X86_LOAD_FROM_32_BIT
Simon Glassb4ded742016-03-16 07:44:40 -060077 lgdt gdt_ptr2
78#endif
79
Simon Glass611f7492015-07-31 09:31:25 -060080 /* Load the segement registers to match the GDT loaded in start16.S */
Graeme Russ391bb952011-12-31 10:24:36 +110081 movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
Graeme Russ3e6ec382010-10-07 20:03:21 +110082 movw %ax, %fs
83 movw %ax, %ds
84 movw %ax, %gs
85 movw %ax, %es
86 movw %ax, %ss
wdenk57b2d802003-06-27 21:31:46 +000087
Mike Williamsbf895ad2011-07-22 04:01:30 +000088 /* Clear the interrupt vectors */
Graeme Russ8accbb92010-04-24 00:05:42 +100089 lidt blank_idt_ptr
90
Andy Shevchenko3e902442020-08-20 13:02:20 +030091#ifdef CONFIG_USE_EARLY_BOARD_INIT
Simon Glass611f7492015-07-31 09:31:25 -060092 /*
93 * Critical early platform init - generally not used, we prefer init
94 * to happen later when we have a console, in case something goes
95 * wrong.
96 */
wdenk591dda52002-11-18 00:14:45 +000097 jmp early_board_init
Graeme Russ157b0e92010-10-07 20:03:27 +110098.globl early_board_init_ret
wdenk591dda52002-11-18 00:14:45 +000099early_board_init_ret:
Andy Shevchenko3e902442020-08-20 13:02:20 +0300100#endif
101
Simon Glass245561d2014-11-12 22:42:09 -0700102 post_code(POST_START)
wdenk57b2d802003-06-27 21:31:46 +0000103
Graeme Russbc761932011-02-12 15:11:52 +1100104 /* Initialise Cache-As-RAM */
105 jmp car_init
106.globl car_init_ret
107car_init_ret:
Simon Glass9e60b432019-09-25 08:11:43 -0600108#ifdef CONFIG_USE_CAR
Graeme Russbc761932011-02-12 15:11:52 +1100109 /*
110 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
111 * or fully initialised SDRAM - we really don't care which)
112 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
Simon Glass611f7492015-07-31 09:31:25 -0600113 * and early malloc() area. The MRC requires some space at the top.
Simon Glassa4fd0db2014-11-06 13:20:04 -0700114 *
115 * Stack grows down from top of CAR. We have:
116 *
117 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
Simon Glass268eefd2014-11-12 22:42:28 -0700118 * MRC area
Simon Glass0e27b872015-08-10 20:44:32 -0600119 * global_data with x86 global descriptor table
Simon Glassa4fd0db2014-11-06 13:20:04 -0700120 * early malloc area
121 * stack
122 * bottom-> CONFIG_SYS_CAR_ADDR
Graeme Russbc761932011-02-12 15:11:52 +1100123 */
Simon Glass268eefd2014-11-12 22:42:28 -0700124 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
125#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
126 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
127#endif
Bin Meng005f0af2014-12-12 21:05:31 +0800128#else
129 /*
Simon Glass1062e342020-07-16 21:22:35 -0600130 * Instructions for FSP1, but not FSP2:
Bin Meng73574dc2015-08-20 06:40:20 -0700131 * U-Boot enters here twice. For the first time it comes from
132 * car_init_done() with esp points to a temporary stack and esi
133 * set to zero. For the second time it comes from fsp_init_done()
134 * with esi holding the HOB list address returned by the FSP.
Bin Meng005f0af2014-12-12 21:05:31 +0800135 */
136#endif
Simon Glass0e27b872015-08-10 20:44:32 -0600137 /* Set up global data */
138 mov %esp, %eax
Albert ARIBAUD6cb4c462015-11-25 17:56:32 +0100139 call board_init_f_alloc_reserve
Simon Glass0e27b872015-08-10 20:44:32 -0600140 mov %eax, %esp
Albert ARIBAUD6cb4c462015-11-25 17:56:32 +0100141 call board_init_f_init_reserve
Graeme Russ007818a2012-11-27 15:38:36 +0000142
Simon Glass47730122015-10-18 19:51:26 -0600143#ifdef CONFIG_DEBUG_UART
144 call debug_uart_init
145#endif
Simon Glass9bbb37f2015-08-02 18:07:21 -0600146
Simon Glass0e27b872015-08-10 20:44:32 -0600147 /* Get address of global_data */
148 mov %fs:0, %edx
Simon Glass9e60b432019-09-25 08:11:43 -0600149#if defined(CONFIG_USE_HOB) && !defined(CONFIG_USE_CAR)
Simon Glass0e27b872015-08-10 20:44:32 -0600150 /* Store the HOB list if we have one */
Bin Mengd560c5c2015-06-07 11:33:14 +0800151 test %esi, %esi
152 jz skip_hob
Simon Glass0e27b872015-08-10 20:44:32 -0600153 movl %esi, GD_HOB_LIST(%edx)
Bin Meng005f0af2014-12-12 21:05:31 +0800154
Park, Aiden6e3cc362019-08-03 08:30:12 +0000155#ifdef CONFIG_HAVE_FSP
Bin Meng12440cd2015-08-20 06:40:19 -0700156 /*
157 * After fsp_init() returns, the stack has already been switched to a
158 * place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
159 * Enlarge the size of malloc() pool before relocation since we have
160 * plenty of memory now.
161 */
162 subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
163 movl %esp, GD_MALLOC_BASE(%edx)
Park, Aiden6e3cc362019-08-03 08:30:12 +0000164#endif
Bin Mengd560c5c2015-06-07 11:33:14 +0800165skip_hob:
Simon Glassf95ad8c2015-08-04 12:33:57 -0600166#else
167 /* Store table pointer */
Simon Glass0e27b872015-08-10 20:44:32 -0600168 movl %esi, GD_TABLE(%edx)
Bin Mengd560c5c2015-06-07 11:33:14 +0800169#endif
Simon Glass0e27b872015-08-10 20:44:32 -0600170 /* Store BIST */
171 movl %ebp, GD_BIST(%edx)
Graeme Russ35368962011-12-31 22:58:15 +1100172
Graeme Russ38183932011-02-12 15:11:54 +1100173 /* Set parameter to board_init_f() to boot flags */
Simon Glass245561d2014-11-12 22:42:09 -0700174 post_code(POST_START_DONE)
Graeme Russ45fc1d82011-04-13 19:43:26 +1000175 xorl %eax, %eax
Graeme Russ5fb91cc2010-10-07 20:03:29 +1100176
Simon Glass611f7492015-07-31 09:31:25 -0600177 /* Enter, U-Boot! */
Graeme Russ45fc1d82011-04-13 19:43:26 +1000178 call board_init_f
wdenk591dda52002-11-18 00:14:45 +0000179
180 /* indicate (lack of) progress */
wdenk57b2d802003-06-27 21:31:46 +0000181 movw $0x85, %ax
Graeme Russ9c44afc2011-02-12 15:11:58 +1100182 jmp die
183
Graeme Russd7755b42012-01-01 15:06:39 +1100184.globl board_init_f_r_trampoline
185.type board_init_f_r_trampoline, @function
186board_init_f_r_trampoline:
Graeme Russ9c44afc2011-02-12 15:11:58 +1100187 /*
188 * SDRAM has been initialised, U-Boot code has been copied into
189 * RAM, BSS has been cleared and relocation adjustments have been
190 * made. It is now time to jump into the in-RAM copy of U-Boot
191 *
Graeme Russd7755b42012-01-01 15:06:39 +1100192 * %eax = Address of top of new stack
Graeme Russ9c44afc2011-02-12 15:11:58 +1100193 */
194
Graeme Russ007818a2012-11-27 15:38:36 +0000195 /* Stack grows down from top of SDRAM */
Graeme Russ9c44afc2011-02-12 15:11:58 +1100196 movl %eax, %esp
197
Simon Glass0e27b872015-08-10 20:44:32 -0600198 /* See if we need to disable CAR */
Simon Glass78da72c2015-01-01 16:18:13 -0700199 call car_uninit
Bin Meng253a24a2018-10-25 03:05:37 -0700200
Simon Glass611f7492015-07-31 09:31:25 -0600201 /* Re-enter U-Boot by calling board_init_f_r() */
Graeme Russd7755b42012-01-01 15:06:39 +1100202 call board_init_f_r
Graeme Russ9c44afc2011-02-12 15:11:58 +1100203
Simon Glassd4f266f2019-05-02 10:52:27 -0600204#ifdef CONFIG_TPL
205.globl jump_to_spl
206.type jump_to_spl, @function
207jump_to_spl:
208 /* Reset stack to the top of CAR space */
209 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
210#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
211 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
212#endif
213
214 jmp *%eax
215#endif
216
Graeme Russc379b5d2011-11-08 02:33:23 +0000217die:
218 hlt
wdenk591dda52002-11-18 00:14:45 +0000219 jmp die
wdenk57b2d802003-06-27 21:31:46 +0000220 hlt
Graeme Russ8accbb92010-04-24 00:05:42 +1000221
Bin Meng253a24a2018-10-25 03:05:37 -0700222WEAK(car_uninit)
223 ret
224ENDPROC(car_uninit)
225
Graeme Russ8accbb92010-04-24 00:05:42 +1000226blank_idt_ptr:
227 .word 0 /* limit */
228 .long 0 /* base */
Graeme Russ786c3952011-11-08 02:33:19 +0000229
230 .p2align 2 /* force 4-byte alignment */
231
Simon Glass611f7492015-07-31 09:31:25 -0600232 /* Add a multiboot header so U-Boot can be loaded by GRUB2 */
Graeme Russ786c3952011-11-08 02:33:19 +0000233multiboot_header:
234 /* magic */
Simon Glass611f7492015-07-31 09:31:25 -0600235 .long 0x1badb002
Graeme Russ786c3952011-11-08 02:33:19 +0000236 /* flags */
237 .long (1 << 16)
238 /* checksum */
239 .long -0x1BADB002 - (1 << 16)
240 /* header addr */
241 .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
242 /* load addr */
243 .long CONFIG_SYS_TEXT_BASE
244 /* load end addr */
245 .long 0
246 /* bss end addr */
247 .long 0
248 /* entry addr */
249 .long CONFIG_SYS_TEXT_BASE
Simon Glassb4ded742016-03-16 07:44:40 -0600250
Andy Shevchenko2ae7da02017-02-05 16:52:00 +0300251#ifdef CONFIG_X86_LOAD_FROM_32_BIT
Simon Glassb4ded742016-03-16 07:44:40 -0600252 /*
253 * The following Global Descriptor Table is just enough to get us into
254 * 'Flat Protected Mode' - It will be discarded as soon as the final
255 * GDT is setup in a safe location in RAM
256 */
257gdt_ptr2:
258 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
259 .long gdt_rom2 /* base */
260
261 /* Some CPUs are picky about GDT alignment... */
262 .align 16
263.globl gdt_rom2
264gdt_rom2:
265 /*
266 * The GDT table ...
267 *
268 * Selector Type
269 * 0x00 NULL
270 * 0x08 Unused
271 * 0x10 32bit code
272 * 0x18 32bit data/stack
273 */
274 /* The NULL Desciptor - Mandatory */
275 .word 0x0000 /* limit_low */
276 .word 0x0000 /* base_low */
277 .byte 0x00 /* base_middle */
278 .byte 0x00 /* access */
279 .byte 0x00 /* flags + limit_high */
280 .byte 0x00 /* base_high */
281
282 /* Unused Desciptor - (matches Linux) */
283 .word 0x0000 /* limit_low */
284 .word 0x0000 /* base_low */
285 .byte 0x00 /* base_middle */
286 .byte 0x00 /* access */
287 .byte 0x00 /* flags + limit_high */
288 .byte 0x00 /* base_high */
289
290 /*
291 * The Code Segment Descriptor:
292 * - Base = 0x00000000
293 * - Size = 4GB
294 * - Access = Present, Ring 0, Exec (Code), Readable
295 * - Flags = 4kB Granularity, 32-bit
296 */
297 .word 0xffff /* limit_low */
298 .word 0x0000 /* base_low */
299 .byte 0x00 /* base_middle */
300 .byte 0x9b /* access */
301 .byte 0xcf /* flags + limit_high */
302 .byte 0x00 /* base_high */
303
304 /*
305 * The Data Segment Descriptor:
306 * - Base = 0x00000000
307 * - Size = 4GB
308 * - Access = Present, Ring 0, Non-Exec (Data), Writable
309 * - Flags = 4kB Granularity, 32-bit
310 */
311 .word 0xffff /* limit_low */
312 .word 0x0000 /* base_low */
313 .byte 0x00 /* base_middle */
314 .byte 0x93 /* access */
315 .byte 0xcf /* flags + limit_high */
316 .byte 0x00 /* base_high */
317#endif