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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
wdenk591dda52002-11-18 00:14:45 +00002/*
Bin Meng8c5acf42014-12-12 21:05:22 +08003 * U-Boot - x86 Startup Code
wdenk591dda52002-11-18 00:14:45 +00004 *
Graeme Russ45fc1d82011-04-13 19:43:26 +10005 * (C) Copyright 2008-2011
6 * Graeme Russ, <graeme.russ@gmail.com>
7 *
8 * (C) Copyright 2002
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +02009 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk591dda52002-11-18 00:14:45 +000010 */
11
wdenk591dda52002-11-18 00:14:45 +000012#include <config.h>
Graeme Russ5fb91cc2010-10-07 20:03:29 +110013#include <asm/global_data.h>
Simon Glass245561d2014-11-12 22:42:09 -070014#include <asm/post.h>
Graeme Russ391bb952011-12-31 10:24:36 +110015#include <asm/processor.h>
Graeme Russ93efcb22011-02-12 15:11:32 +110016#include <asm/processor-flags.h>
Graeme Russ35368962011-12-31 22:58:15 +110017#include <generated/generic-asm-offsets.h>
Bin Meng8c5acf42014-12-12 21:05:22 +080018#include <generated/asm-offsets.h>
Bin Meng253a24a2018-10-25 03:05:37 -070019#include <linux/linkage.h>
wdenk591dda52002-11-18 00:14:45 +000020
Alexander Graf94a10f22018-06-12 07:48:37 +020021.section .text.start
wdenk591dda52002-11-18 00:14:45 +000022.code32
23.globl _start
wdenk57b2d802003-06-27 21:31:46 +000024.type _start, @function
Graeme Russcbfce1d2011-04-13 19:43:28 +100025.globl _x86boot_start
26_x86boot_start:
Graeme Russ8accbb92010-04-24 00:05:42 +100027 /*
Simon Glass611f7492015-07-31 09:31:25 -060028 * This is the fail-safe 32-bit bootstrap entry point.
29 *
30 * This code is used when booting from another boot loader like
31 * coreboot or EFI. So we repeat some of the same init found in
32 * start16.
Graeme Russ8accbb92010-04-24 00:05:42 +100033 */
34 cli
35 cld
36
Graeme Russc379b5d2011-11-08 02:33:23 +000037 /* Turn off cache (this might require a 486-class CPU) */
Graeme Russ8accbb92010-04-24 00:05:42 +100038 movl %cr0, %eax
Graeme Russ93efcb22011-02-12 15:11:32 +110039 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Graeme Russ8accbb92010-04-24 00:05:42 +100040 movl %eax, %cr0
41 wbinvd
42
Simon Glassf95ad8c2015-08-04 12:33:57 -060043 /*
44 * Zero the BIST (Built-In Self Test) value since we don't have it.
45 * It must be 0 or the previous loader would have reported an error.
46 */
47 movl $0, %ebp
48
Gabe Blackef899322012-11-03 11:41:28 +000049 jmp 1f
Simon Glass5d18dc92015-07-31 09:31:28 -060050
51 /* Add a way for tools to discover the _start entry point */
52 .align 4
53 .long 0x12345678
wdenk57b2d802003-06-27 21:31:46 +000054_start:
Stefan Roesefaa88212019-08-16 14:45:28 +020055 /* This is the 32-bit cold-reset entry point, coming from start16 */
Simon Glassf95ad8c2015-08-04 12:33:57 -060056
Simon Glass1f4476c2014-11-06 13:20:10 -070057 /* Save BIST */
58 movl %eax, %ebp
Simon Glassf95ad8c2015-08-04 12:33:57 -0600591:
60
61 /* Save table pointer */
62 movl %ecx, %esi
Graeme Russ8accbb92010-04-24 00:05:42 +100063
Andy Shevchenko2ae7da02017-02-05 16:52:00 +030064#ifdef CONFIG_X86_LOAD_FROM_32_BIT
Simon Glassb4ded742016-03-16 07:44:40 -060065 lgdt gdt_ptr2
66#endif
67
Simon Glass611f7492015-07-31 09:31:25 -060068 /* Load the segement registers to match the GDT loaded in start16.S */
Graeme Russ391bb952011-12-31 10:24:36 +110069 movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
Graeme Russ3e6ec382010-10-07 20:03:21 +110070 movw %ax, %fs
71 movw %ax, %ds
72 movw %ax, %gs
73 movw %ax, %es
74 movw %ax, %ss
wdenk57b2d802003-06-27 21:31:46 +000075
Mike Williamsbf895ad2011-07-22 04:01:30 +000076 /* Clear the interrupt vectors */
Graeme Russ8accbb92010-04-24 00:05:42 +100077 lidt blank_idt_ptr
78
Simon Glass611f7492015-07-31 09:31:25 -060079 /*
80 * Critical early platform init - generally not used, we prefer init
81 * to happen later when we have a console, in case something goes
82 * wrong.
83 */
wdenk591dda52002-11-18 00:14:45 +000084 jmp early_board_init
Graeme Russ157b0e92010-10-07 20:03:27 +110085.globl early_board_init_ret
wdenk591dda52002-11-18 00:14:45 +000086early_board_init_ret:
Simon Glass245561d2014-11-12 22:42:09 -070087 post_code(POST_START)
wdenk57b2d802003-06-27 21:31:46 +000088
Graeme Russbc761932011-02-12 15:11:52 +110089 /* Initialise Cache-As-RAM */
90 jmp car_init
91.globl car_init_ret
92car_init_ret:
Park, Aiden6e3cc362019-08-03 08:30:12 +000093#ifndef CONFIG_USE_HOB
Graeme Russbc761932011-02-12 15:11:52 +110094 /*
95 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
96 * or fully initialised SDRAM - we really don't care which)
97 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
Simon Glass611f7492015-07-31 09:31:25 -060098 * and early malloc() area. The MRC requires some space at the top.
Simon Glassa4fd0db2014-11-06 13:20:04 -070099 *
100 * Stack grows down from top of CAR. We have:
101 *
102 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
Simon Glass268eefd2014-11-12 22:42:28 -0700103 * MRC area
Simon Glass0e27b872015-08-10 20:44:32 -0600104 * global_data with x86 global descriptor table
Simon Glassa4fd0db2014-11-06 13:20:04 -0700105 * early malloc area
106 * stack
107 * bottom-> CONFIG_SYS_CAR_ADDR
Graeme Russbc761932011-02-12 15:11:52 +1100108 */
Simon Glass268eefd2014-11-12 22:42:28 -0700109 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
110#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
111 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
112#endif
Bin Meng005f0af2014-12-12 21:05:31 +0800113#else
114 /*
Bin Meng73574dc2015-08-20 06:40:20 -0700115 * U-Boot enters here twice. For the first time it comes from
116 * car_init_done() with esp points to a temporary stack and esi
117 * set to zero. For the second time it comes from fsp_init_done()
118 * with esi holding the HOB list address returned by the FSP.
Bin Meng005f0af2014-12-12 21:05:31 +0800119 */
120#endif
Simon Glass0e27b872015-08-10 20:44:32 -0600121 /* Set up global data */
122 mov %esp, %eax
Albert ARIBAUD6cb4c462015-11-25 17:56:32 +0100123 call board_init_f_alloc_reserve
Simon Glass0e27b872015-08-10 20:44:32 -0600124 mov %eax, %esp
Albert ARIBAUD6cb4c462015-11-25 17:56:32 +0100125 call board_init_f_init_reserve
Graeme Russ007818a2012-11-27 15:38:36 +0000126
Simon Glass47730122015-10-18 19:51:26 -0600127#ifdef CONFIG_DEBUG_UART
128 call debug_uart_init
129#endif
Simon Glass9bbb37f2015-08-02 18:07:21 -0600130
Simon Glass0e27b872015-08-10 20:44:32 -0600131 /* Get address of global_data */
132 mov %fs:0, %edx
Park, Aiden6e3cc362019-08-03 08:30:12 +0000133#ifdef CONFIG_USE_HOB
Simon Glass0e27b872015-08-10 20:44:32 -0600134 /* Store the HOB list if we have one */
Bin Mengd560c5c2015-06-07 11:33:14 +0800135 test %esi, %esi
136 jz skip_hob
Simon Glass0e27b872015-08-10 20:44:32 -0600137 movl %esi, GD_HOB_LIST(%edx)
Bin Meng005f0af2014-12-12 21:05:31 +0800138
Park, Aiden6e3cc362019-08-03 08:30:12 +0000139#ifdef CONFIG_HAVE_FSP
Bin Meng12440cd2015-08-20 06:40:19 -0700140 /*
141 * After fsp_init() returns, the stack has already been switched to a
142 * place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
143 * Enlarge the size of malloc() pool before relocation since we have
144 * plenty of memory now.
145 */
146 subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
147 movl %esp, GD_MALLOC_BASE(%edx)
Park, Aiden6e3cc362019-08-03 08:30:12 +0000148#endif
Bin Mengd560c5c2015-06-07 11:33:14 +0800149skip_hob:
Simon Glassf95ad8c2015-08-04 12:33:57 -0600150#else
151 /* Store table pointer */
Simon Glass0e27b872015-08-10 20:44:32 -0600152 movl %esi, GD_TABLE(%edx)
Bin Mengd560c5c2015-06-07 11:33:14 +0800153#endif
Simon Glass0e27b872015-08-10 20:44:32 -0600154 /* Store BIST */
155 movl %ebp, GD_BIST(%edx)
Graeme Russ35368962011-12-31 22:58:15 +1100156
Graeme Russ38183932011-02-12 15:11:54 +1100157 /* Set parameter to board_init_f() to boot flags */
Simon Glass245561d2014-11-12 22:42:09 -0700158 post_code(POST_START_DONE)
Graeme Russ45fc1d82011-04-13 19:43:26 +1000159 xorl %eax, %eax
Graeme Russ5fb91cc2010-10-07 20:03:29 +1100160
Simon Glass611f7492015-07-31 09:31:25 -0600161 /* Enter, U-Boot! */
Graeme Russ45fc1d82011-04-13 19:43:26 +1000162 call board_init_f
wdenk591dda52002-11-18 00:14:45 +0000163
164 /* indicate (lack of) progress */
wdenk57b2d802003-06-27 21:31:46 +0000165 movw $0x85, %ax
Graeme Russ9c44afc2011-02-12 15:11:58 +1100166 jmp die
167
Graeme Russd7755b42012-01-01 15:06:39 +1100168.globl board_init_f_r_trampoline
169.type board_init_f_r_trampoline, @function
170board_init_f_r_trampoline:
Graeme Russ9c44afc2011-02-12 15:11:58 +1100171 /*
172 * SDRAM has been initialised, U-Boot code has been copied into
173 * RAM, BSS has been cleared and relocation adjustments have been
174 * made. It is now time to jump into the in-RAM copy of U-Boot
175 *
Graeme Russd7755b42012-01-01 15:06:39 +1100176 * %eax = Address of top of new stack
Graeme Russ9c44afc2011-02-12 15:11:58 +1100177 */
178
Graeme Russ007818a2012-11-27 15:38:36 +0000179 /* Stack grows down from top of SDRAM */
Graeme Russ9c44afc2011-02-12 15:11:58 +1100180 movl %eax, %esp
181
Simon Glass0e27b872015-08-10 20:44:32 -0600182 /* See if we need to disable CAR */
Simon Glass78da72c2015-01-01 16:18:13 -0700183 call car_uninit
Bin Meng253a24a2018-10-25 03:05:37 -0700184
Simon Glass611f7492015-07-31 09:31:25 -0600185 /* Re-enter U-Boot by calling board_init_f_r() */
Graeme Russd7755b42012-01-01 15:06:39 +1100186 call board_init_f_r
Graeme Russ9c44afc2011-02-12 15:11:58 +1100187
Simon Glassd4f266f2019-05-02 10:52:27 -0600188#ifdef CONFIG_TPL
189.globl jump_to_spl
190.type jump_to_spl, @function
191jump_to_spl:
192 /* Reset stack to the top of CAR space */
193 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
194#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
195 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
196#endif
197
198 jmp *%eax
199#endif
200
Graeme Russc379b5d2011-11-08 02:33:23 +0000201die:
202 hlt
wdenk591dda52002-11-18 00:14:45 +0000203 jmp die
wdenk57b2d802003-06-27 21:31:46 +0000204 hlt
Graeme Russ8accbb92010-04-24 00:05:42 +1000205
Bin Meng253a24a2018-10-25 03:05:37 -0700206WEAK(car_uninit)
207 ret
208ENDPROC(car_uninit)
209
Graeme Russ8accbb92010-04-24 00:05:42 +1000210blank_idt_ptr:
211 .word 0 /* limit */
212 .long 0 /* base */
Graeme Russ786c3952011-11-08 02:33:19 +0000213
214 .p2align 2 /* force 4-byte alignment */
215
Simon Glass611f7492015-07-31 09:31:25 -0600216 /* Add a multiboot header so U-Boot can be loaded by GRUB2 */
Graeme Russ786c3952011-11-08 02:33:19 +0000217multiboot_header:
218 /* magic */
Simon Glass611f7492015-07-31 09:31:25 -0600219 .long 0x1badb002
Graeme Russ786c3952011-11-08 02:33:19 +0000220 /* flags */
221 .long (1 << 16)
222 /* checksum */
223 .long -0x1BADB002 - (1 << 16)
224 /* header addr */
225 .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
226 /* load addr */
227 .long CONFIG_SYS_TEXT_BASE
228 /* load end addr */
229 .long 0
230 /* bss end addr */
231 .long 0
232 /* entry addr */
233 .long CONFIG_SYS_TEXT_BASE
Simon Glassb4ded742016-03-16 07:44:40 -0600234
Andy Shevchenko2ae7da02017-02-05 16:52:00 +0300235#ifdef CONFIG_X86_LOAD_FROM_32_BIT
Simon Glassb4ded742016-03-16 07:44:40 -0600236 /*
237 * The following Global Descriptor Table is just enough to get us into
238 * 'Flat Protected Mode' - It will be discarded as soon as the final
239 * GDT is setup in a safe location in RAM
240 */
241gdt_ptr2:
242 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
243 .long gdt_rom2 /* base */
244
245 /* Some CPUs are picky about GDT alignment... */
246 .align 16
247.globl gdt_rom2
248gdt_rom2:
249 /*
250 * The GDT table ...
251 *
252 * Selector Type
253 * 0x00 NULL
254 * 0x08 Unused
255 * 0x10 32bit code
256 * 0x18 32bit data/stack
257 */
258 /* The NULL Desciptor - Mandatory */
259 .word 0x0000 /* limit_low */
260 .word 0x0000 /* base_low */
261 .byte 0x00 /* base_middle */
262 .byte 0x00 /* access */
263 .byte 0x00 /* flags + limit_high */
264 .byte 0x00 /* base_high */
265
266 /* Unused Desciptor - (matches Linux) */
267 .word 0x0000 /* limit_low */
268 .word 0x0000 /* base_low */
269 .byte 0x00 /* base_middle */
270 .byte 0x00 /* access */
271 .byte 0x00 /* flags + limit_high */
272 .byte 0x00 /* base_high */
273
274 /*
275 * The Code Segment Descriptor:
276 * - Base = 0x00000000
277 * - Size = 4GB
278 * - Access = Present, Ring 0, Exec (Code), Readable
279 * - Flags = 4kB Granularity, 32-bit
280 */
281 .word 0xffff /* limit_low */
282 .word 0x0000 /* base_low */
283 .byte 0x00 /* base_middle */
284 .byte 0x9b /* access */
285 .byte 0xcf /* flags + limit_high */
286 .byte 0x00 /* base_high */
287
288 /*
289 * The Data Segment Descriptor:
290 * - Base = 0x00000000
291 * - Size = 4GB
292 * - Access = Present, Ring 0, Non-Exec (Data), Writable
293 * - Flags = 4kB Granularity, 32-bit
294 */
295 .word 0xffff /* limit_low */
296 .word 0x0000 /* base_low */
297 .byte 0x00 /* base_middle */
298 .byte 0x93 /* access */
299 .byte 0xcf /* flags + limit_high */
300 .byte 0x00 /* base_high */
301#endif