blob: e2b5ef4b742173919401c1dd7ae99f84c00e6ae7 [file] [log] [blame]
wdenk591dda52002-11-18 00:14:45 +00001/*
Bin Meng8c5acf42014-12-12 21:05:22 +08002 * U-Boot - x86 Startup Code
wdenk591dda52002-11-18 00:14:45 +00003 *
Graeme Russ45fc1d82011-04-13 19:43:26 +10004 * (C) Copyright 2008-2011
5 * Graeme Russ, <graeme.russ@gmail.com>
6 *
7 * (C) Copyright 2002
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +02008 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk591dda52002-11-18 00:14:45 +00009 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
wdenk591dda52002-11-18 00:14:45 +000011 */
12
wdenk591dda52002-11-18 00:14:45 +000013#include <config.h>
Graeme Russ5fb91cc2010-10-07 20:03:29 +110014#include <asm/global_data.h>
Simon Glass245561d2014-11-12 22:42:09 -070015#include <asm/post.h>
Graeme Russ391bb952011-12-31 10:24:36 +110016#include <asm/processor.h>
Graeme Russ93efcb22011-02-12 15:11:32 +110017#include <asm/processor-flags.h>
Graeme Russ35368962011-12-31 22:58:15 +110018#include <generated/generic-asm-offsets.h>
Bin Meng8c5acf42014-12-12 21:05:22 +080019#include <generated/asm-offsets.h>
wdenk591dda52002-11-18 00:14:45 +000020
wdenk591dda52002-11-18 00:14:45 +000021.section .text
22.code32
23.globl _start
wdenk57b2d802003-06-27 21:31:46 +000024.type _start, @function
Graeme Russcbfce1d2011-04-13 19:43:28 +100025.globl _x86boot_start
26_x86boot_start:
Graeme Russ8accbb92010-04-24 00:05:42 +100027 /*
Simon Glass611f7492015-07-31 09:31:25 -060028 * This is the fail-safe 32-bit bootstrap entry point.
29 *
30 * This code is used when booting from another boot loader like
31 * coreboot or EFI. So we repeat some of the same init found in
32 * start16.
Graeme Russ8accbb92010-04-24 00:05:42 +100033 */
34 cli
35 cld
36
Graeme Russc379b5d2011-11-08 02:33:23 +000037 /* Turn off cache (this might require a 486-class CPU) */
Graeme Russ8accbb92010-04-24 00:05:42 +100038 movl %cr0, %eax
Graeme Russ93efcb22011-02-12 15:11:32 +110039 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Graeme Russ8accbb92010-04-24 00:05:42 +100040 movl %eax, %cr0
41 wbinvd
42
Gabe Blackef899322012-11-03 11:41:28 +000043 /* Tell 32-bit code it is being entered from an in-RAM copy */
Simon Glass5d18dc92015-07-31 09:31:28 -060044 movl $GD_FLG_WARM_BOOT, %ebx
Simon Glassf95ad8c2015-08-04 12:33:57 -060045
46 /*
47 * Zero the BIST (Built-In Self Test) value since we don't have it.
48 * It must be 0 or the previous loader would have reported an error.
49 */
50 movl $0, %ebp
51
Gabe Blackef899322012-11-03 11:41:28 +000052 jmp 1f
Simon Glass5d18dc92015-07-31 09:31:28 -060053
54 /* Add a way for tools to discover the _start entry point */
55 .align 4
56 .long 0x12345678
wdenk57b2d802003-06-27 21:31:46 +000057_start:
Gabe Blackef899322012-11-03 11:41:28 +000058 /*
Simon Glass611f7492015-07-31 09:31:25 -060059 * This is the 32-bit cold-reset entry point, coming from start16.
Simon Glass5d18dc92015-07-31 09:31:28 -060060 * Set %ebx to GD_FLG_COLD_BOOT to indicate this.
Gabe Blackef899322012-11-03 11:41:28 +000061 */
Simon Glass5d18dc92015-07-31 09:31:28 -060062 movl $GD_FLG_COLD_BOOT, %ebx
Simon Glassf95ad8c2015-08-04 12:33:57 -060063
Simon Glass1f4476c2014-11-06 13:20:10 -070064 /* Save BIST */
65 movl %eax, %ebp
Simon Glassf95ad8c2015-08-04 12:33:57 -0600661:
67
68 /* Save table pointer */
69 movl %ecx, %esi
Graeme Russ8accbb92010-04-24 00:05:42 +100070
Simon Glass611f7492015-07-31 09:31:25 -060071 /* Load the segement registers to match the GDT loaded in start16.S */
Graeme Russ391bb952011-12-31 10:24:36 +110072 movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
Graeme Russ3e6ec382010-10-07 20:03:21 +110073 movw %ax, %fs
74 movw %ax, %ds
75 movw %ax, %gs
76 movw %ax, %es
77 movw %ax, %ss
wdenk57b2d802003-06-27 21:31:46 +000078
Mike Williamsbf895ad2011-07-22 04:01:30 +000079 /* Clear the interrupt vectors */
Graeme Russ8accbb92010-04-24 00:05:42 +100080 lidt blank_idt_ptr
81
Simon Glass611f7492015-07-31 09:31:25 -060082 /*
83 * Critical early platform init - generally not used, we prefer init
84 * to happen later when we have a console, in case something goes
85 * wrong.
86 */
wdenk591dda52002-11-18 00:14:45 +000087 jmp early_board_init
Graeme Russ157b0e92010-10-07 20:03:27 +110088.globl early_board_init_ret
wdenk591dda52002-11-18 00:14:45 +000089early_board_init_ret:
Simon Glass245561d2014-11-12 22:42:09 -070090 post_code(POST_START)
wdenk57b2d802003-06-27 21:31:46 +000091
Graeme Russbc761932011-02-12 15:11:52 +110092 /* Initialise Cache-As-RAM */
93 jmp car_init
94.globl car_init_ret
95car_init_ret:
Bin Meng005f0af2014-12-12 21:05:31 +080096#ifndef CONFIG_HAVE_FSP
Graeme Russbc761932011-02-12 15:11:52 +110097 /*
98 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
99 * or fully initialised SDRAM - we really don't care which)
100 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
Simon Glass611f7492015-07-31 09:31:25 -0600101 * and early malloc() area. The MRC requires some space at the top.
Simon Glassa4fd0db2014-11-06 13:20:04 -0700102 *
103 * Stack grows down from top of CAR. We have:
104 *
105 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
Simon Glass268eefd2014-11-12 22:42:28 -0700106 * MRC area
Simon Glass0e27b872015-08-10 20:44:32 -0600107 * global_data with x86 global descriptor table
Simon Glassa4fd0db2014-11-06 13:20:04 -0700108 * early malloc area
109 * stack
110 * bottom-> CONFIG_SYS_CAR_ADDR
Graeme Russbc761932011-02-12 15:11:52 +1100111 */
Simon Glass268eefd2014-11-12 22:42:28 -0700112 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
113#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
114 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
115#endif
Bin Meng005f0af2014-12-12 21:05:31 +0800116#else
117 /*
Simon Glass611f7492015-07-31 09:31:25 -0600118 * When we get here after car_init(), esp points to a temporary stack
Bin Meng005f0af2014-12-12 21:05:31 +0800119 * and esi holds the HOB list address returned by the FSP.
120 */
121#endif
Simon Glass0e27b872015-08-10 20:44:32 -0600122 /* Set up global data */
123 mov %esp, %eax
124 call board_init_f_mem
125 mov %eax, %esp
Graeme Russ007818a2012-11-27 15:38:36 +0000126
Simon Glass9bbb37f2015-08-02 18:07:21 -0600127 /*
128 * Debug UART is available here although it may not be plumbed out
129 * to pins depending on the board. To use it:
130 *
131 * call debug_uart_init
132 * mov $'a', %eax
133 * call printch
134 */
135
Simon Glass0e27b872015-08-10 20:44:32 -0600136 /* Get address of global_data */
137 mov %fs:0, %edx
Bin Meng005f0af2014-12-12 21:05:31 +0800138#ifdef CONFIG_HAVE_FSP
Simon Glass0e27b872015-08-10 20:44:32 -0600139 /* Store the HOB list if we have one */
Bin Mengd560c5c2015-06-07 11:33:14 +0800140 test %esi, %esi
141 jz skip_hob
Simon Glass0e27b872015-08-10 20:44:32 -0600142 movl %esi, GD_HOB_LIST(%edx)
Bin Meng005f0af2014-12-12 21:05:31 +0800143
Bin Meng12440cd2015-08-20 06:40:19 -0700144 /*
145 * After fsp_init() returns, the stack has already been switched to a
146 * place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
147 * Enlarge the size of malloc() pool before relocation since we have
148 * plenty of memory now.
149 */
150 subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
151 movl %esp, GD_MALLOC_BASE(%edx)
Bin Mengd560c5c2015-06-07 11:33:14 +0800152skip_hob:
Simon Glassf95ad8c2015-08-04 12:33:57 -0600153#else
154 /* Store table pointer */
Simon Glass0e27b872015-08-10 20:44:32 -0600155 movl %esi, GD_TABLE(%edx)
Bin Mengd560c5c2015-06-07 11:33:14 +0800156#endif
Simon Glass0e27b872015-08-10 20:44:32 -0600157 /* Store BIST */
158 movl %ebp, GD_BIST(%edx)
Graeme Russ35368962011-12-31 22:58:15 +1100159
Graeme Russ38183932011-02-12 15:11:54 +1100160 /* Set parameter to board_init_f() to boot flags */
Simon Glass245561d2014-11-12 22:42:09 -0700161 post_code(POST_START_DONE)
Graeme Russ45fc1d82011-04-13 19:43:26 +1000162 xorl %eax, %eax
Graeme Russ5fb91cc2010-10-07 20:03:29 +1100163
Simon Glass611f7492015-07-31 09:31:25 -0600164 /* Enter, U-Boot! */
Graeme Russ45fc1d82011-04-13 19:43:26 +1000165 call board_init_f
wdenk591dda52002-11-18 00:14:45 +0000166
167 /* indicate (lack of) progress */
wdenk57b2d802003-06-27 21:31:46 +0000168 movw $0x85, %ax
Graeme Russ9c44afc2011-02-12 15:11:58 +1100169 jmp die
170
Graeme Russd7755b42012-01-01 15:06:39 +1100171.globl board_init_f_r_trampoline
172.type board_init_f_r_trampoline, @function
173board_init_f_r_trampoline:
Graeme Russ9c44afc2011-02-12 15:11:58 +1100174 /*
175 * SDRAM has been initialised, U-Boot code has been copied into
176 * RAM, BSS has been cleared and relocation adjustments have been
177 * made. It is now time to jump into the in-RAM copy of U-Boot
178 *
Graeme Russd7755b42012-01-01 15:06:39 +1100179 * %eax = Address of top of new stack
Graeme Russ9c44afc2011-02-12 15:11:58 +1100180 */
181
Graeme Russ007818a2012-11-27 15:38:36 +0000182 /* Stack grows down from top of SDRAM */
Graeme Russ9c44afc2011-02-12 15:11:58 +1100183 movl %eax, %esp
184
Simon Glass0e27b872015-08-10 20:44:32 -0600185 /* See if we need to disable CAR */
Simon Glass78da72c2015-01-01 16:18:13 -0700186.weak car_uninit
187 movl $car_uninit, %eax
188 cmpl $0, %eax
189 jz 1f
190
191 call car_uninit
1921:
Simon Glass611f7492015-07-31 09:31:25 -0600193 /* Re-enter U-Boot by calling board_init_f_r() */
Graeme Russd7755b42012-01-01 15:06:39 +1100194 call board_init_f_r
Graeme Russ9c44afc2011-02-12 15:11:58 +1100195
Graeme Russc379b5d2011-11-08 02:33:23 +0000196die:
197 hlt
wdenk591dda52002-11-18 00:14:45 +0000198 jmp die
wdenk57b2d802003-06-27 21:31:46 +0000199 hlt
Graeme Russ8accbb92010-04-24 00:05:42 +1000200
201blank_idt_ptr:
202 .word 0 /* limit */
203 .long 0 /* base */
Graeme Russ786c3952011-11-08 02:33:19 +0000204
205 .p2align 2 /* force 4-byte alignment */
206
Simon Glass611f7492015-07-31 09:31:25 -0600207 /* Add a multiboot header so U-Boot can be loaded by GRUB2 */
Graeme Russ786c3952011-11-08 02:33:19 +0000208multiboot_header:
209 /* magic */
Simon Glass611f7492015-07-31 09:31:25 -0600210 .long 0x1badb002
Graeme Russ786c3952011-11-08 02:33:19 +0000211 /* flags */
212 .long (1 << 16)
213 /* checksum */
214 .long -0x1BADB002 - (1 << 16)
215 /* header addr */
216 .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
217 /* load addr */
218 .long CONFIG_SYS_TEXT_BASE
219 /* load end addr */
220 .long 0
221 /* bss end addr */
222 .long 0
223 /* entry addr */
224 .long CONFIG_SYS_TEXT_BASE