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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vipin KUMAR4255edc2012-05-07 13:06:45 +05302/*
3 * (C) Copyright 2010
4 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
Vipin KUMAR4255edc2012-05-07 13:06:45 +05305 */
6
7#include <common.h>
8#include <asm/io.h>
9#include <asm/arch/hardware.h>
10#include <asm/arch/spr_misc.h>
11
12int arch_cpu_init(void)
13{
14 struct misc_regs *const misc_p =
15 (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
Shiraz Hashim74a7e052012-05-07 13:06:59 +053016 u32 periph1_clken, periph_clk_cfg;
Vipin KUMAR4255edc2012-05-07 13:06:45 +053017
18 periph1_clken = readl(&misc_p->periph1_clken);
19
20#if defined(CONFIG_SPEAR3XX)
21 periph1_clken |= MISC_GPT2ENB;
22#elif defined(CONFIG_SPEAR600)
23 periph1_clken |= MISC_GPT3ENB;
24#endif
25
26#if defined(CONFIG_PL011_SERIAL)
27 periph1_clken |= MISC_UART0ENB;
Shiraz Hashim74a7e052012-05-07 13:06:59 +053028
29 periph_clk_cfg = readl(&misc_p->periph_clk_cfg);
30 periph_clk_cfg &= ~CONFIG_SPEAR_UARTCLKMSK;
31 periph_clk_cfg |= CONFIG_SPEAR_UART48M;
32 writel(periph_clk_cfg, &misc_p->periph_clk_cfg);
Vipin KUMAR4255edc2012-05-07 13:06:45 +053033#endif
Simon Glass6e378742015-04-05 16:07:34 -060034#if defined(CONFIG_ETH_DESIGNWARE)
Vipin KUMAR4255edc2012-05-07 13:06:45 +053035 periph1_clken |= MISC_ETHENB;
36#endif
37#if defined(CONFIG_DW_UDC)
38 periph1_clken |= MISC_USBDENB;
39#endif
Stefan Roeseef6073e2014-10-28 12:12:00 +010040#if defined(CONFIG_SYS_I2C_DW)
Vipin KUMAR4255edc2012-05-07 13:06:45 +053041 periph1_clken |= MISC_I2CENB;
42#endif
43#if defined(CONFIG_ST_SMI)
44 periph1_clken |= MISC_SMIENB;
45#endif
46#if defined(CONFIG_NAND_FSMC)
47 periph1_clken |= MISC_FSMCENB;
48#endif
Stefan Roese64bbb7d2015-08-18 09:27:18 +020049#if defined(CONFIG_USB_EHCI_SPEAR)
50 periph1_clken |= PERIPH_USBH1 | PERIPH_USBH2;
51#endif
Quentin Schulzf25cdc62018-08-31 16:15:53 +020052#if defined(CONFIG_SPEAR_GPIO)
53 periph1_clken |= MISC_GPIO3ENB | MISC_GPIO4ENB;
54#endif
Quentin Schulzf1c773b2018-08-31 16:28:30 +020055#if defined(CONFIG_PL022_SPI)
56 periph1_clken |= MISC_SSP1ENB | MISC_SSP2ENB | MISC_SSP3ENB;
57#endif
Vipin KUMAR4255edc2012-05-07 13:06:45 +053058
59 writel(periph1_clken, &misc_p->periph1_clken);
Stefan Roese64bbb7d2015-08-18 09:27:18 +020060
Vipin KUMAR4255edc2012-05-07 13:06:45 +053061 return 0;
62}
63
Vipin KUMAR4255edc2012-05-07 13:06:45 +053064#ifdef CONFIG_DISPLAY_CPUINFO
65int print_cpuinfo(void)
66{
67#ifdef CONFIG_SPEAR300
68 printf("CPU: SPEAr300\n");
69#elif defined(CONFIG_SPEAR310)
70 printf("CPU: SPEAr310\n");
71#elif defined(CONFIG_SPEAR320)
72 printf("CPU: SPEAr320\n");
73#elif defined(CONFIG_SPEAR600)
74 printf("CPU: SPEAr600\n");
75#else
76#error CPU not supported in spear platform
77#endif
78 return 0;
79}
80#endif
Stefan Roese69804d42015-09-02 11:10:58 +020081
Thomas Petazzonia9e56092017-08-15 22:52:45 +020082#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_ECC_BCH) && defined(CONFIG_NAND_FSMC)
Stefan Roese69804d42015-09-02 11:10:58 +020083static int do_switch_ecc(cmd_tbl_t *cmdtp, int flag, int argc,
84 char *const argv[])
85{
86 if (argc != 2)
87 goto usage;
88
89 if (strncmp(argv[1], "hw", 2) == 0) {
90 /* 1-bit HW ECC */
91 printf("Switching to 1-bit HW ECC\n");
92 fsmc_nand_switch_ecc(1);
93 } else if (strncmp(argv[1], "bch4", 2) == 0) {
94 /* 4-bit SW ECC BCH4 */
95 printf("Switching to 4-bit SW ECC (BCH4)\n");
96 fsmc_nand_switch_ecc(4);
97 } else {
98 goto usage;
99 }
100
101 return 0;
102
103usage:
104 printf("Usage: nandecc %s\n", cmdtp->usage);
105 return 1;
106}
107
108U_BOOT_CMD(
109 nandecc, 2, 0, do_switch_ecc,
110 "switch NAND ECC calculation algorithm",
111 "hw|bch4 - Switch between NAND hardware 1-bit HW and"
112 " 4-bit SW BCH\n"
113);
114#endif