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Steve Sakoman1ad21582010-06-08 13:07:46 -07001/*
2 *
Sricharan9310ff72011-11-15 09:49:55 -05003 * Common functions for OMAP4/5 based boards
Steve Sakoman1ad21582010-06-08 13:07:46 -07004 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 *
8 * Author :
9 * Aneesh V <aneesh@ti.com>
10 * Steve Sakoman <steve@sakoman.com>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30#include <common.h>
Steve Sakoman1ad21582010-06-08 13:07:46 -070031#include <asm/arch/sys_proto.h>
Aneesh V04bd2b92010-09-12 10:32:55 +053032#include <asm/sizes.h>
Sricharan62a86502011-11-15 09:50:00 -050033#include <asm/emif.h>
Sricharan308fe922011-11-15 09:50:03 -050034#include <asm/omap_common.h>
Steve Sakoman1ad21582010-06-08 13:07:46 -070035
Nishanth Menon4e5dd662010-11-19 11:19:40 -050036DECLARE_GLOBAL_DATA_PTR;
37
Sricharan308fe922011-11-15 09:50:03 -050038/*
39 * This is used to verify if the configuration header
40 * was executed by rom code prior to control of transfer
41 * to the bootloader. SPL is responsible for saving and
42 * passing the boot_params pointer to the u-boot.
43 */
44struct omap_boot_parameters boot_params __attribute__ ((section(".data")));
45
Aneesh V13a74c12011-07-21 09:10:27 -040046#ifdef CONFIG_SPL_BUILD
47/*
48 * We use static variables because global data is not ready yet.
49 * Initialized data is available in SPL right from the beginning.
50 * We would not typically need to save these parameters in regular
51 * U-Boot. This is needed only in SPL at the moment.
52 */
Sricharan9310ff72011-11-15 09:49:55 -050053u32 omap_bootmode = MMCSD_MODE_FAT;
Aneesh V13a74c12011-07-21 09:10:27 -040054
55u32 omap_boot_device(void)
56{
Sricharan308fe922011-11-15 09:50:03 -050057 return (u32) (boot_params.omap_bootdevice);
Aneesh V13a74c12011-07-21 09:10:27 -040058}
59
60u32 omap_boot_mode(void)
61{
Sricharan9310ff72011-11-15 09:49:55 -050062 return omap_bootmode;
Aneesh Vb35f7cb2011-09-08 11:05:56 -040063}
Aneesh V13a74c12011-07-21 09:10:27 -040064#endif
65
Aneesh Vf908b632011-07-21 09:10:01 -040066void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
67{
68 int i;
69 struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
70
71 for (i = 0; i < size; i++, pad++)
72 writew(pad->val, base + pad->offset);
73}
74
Aneesh Vf908b632011-07-21 09:10:01 -040075static void set_mux_conf_regs(void)
76{
Sricharan9310ff72011-11-15 09:49:55 -050077 switch (omap_hw_init_context()) {
Aneesh Vf908b632011-07-21 09:10:01 -040078 case OMAP_INIT_CONTEXT_SPL:
79 set_muxconf_regs_essential();
80 break;
81 case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
Sricharan308fe922011-11-15 09:50:03 -050082#ifdef CONFIG_SYS_ENABLE_PADS_ALL
Aneesh Vf908b632011-07-21 09:10:01 -040083 set_muxconf_regs_non_essential();
Sricharan308fe922011-11-15 09:50:03 -050084#endif
Aneesh Vf908b632011-07-21 09:10:01 -040085 break;
86 case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
87 case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
88 set_muxconf_regs_essential();
Sricharan308fe922011-11-15 09:50:03 -050089#ifdef CONFIG_SYS_ENABLE_PADS_ALL
Aneesh Vf908b632011-07-21 09:10:01 -040090 set_muxconf_regs_non_essential();
Sricharan308fe922011-11-15 09:50:03 -050091#endif
Aneesh Vf908b632011-07-21 09:10:01 -040092 break;
93 }
94}
95
Sricharan9310ff72011-11-15 09:49:55 -050096u32 cortex_rev(void)
Aneesh V162ced32011-07-21 09:10:04 -040097{
98
99 unsigned int rev;
100
101 /* Read Main ID Register (MIDR) */
102 asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
103
104 return rev;
105}
106
Sricharan9310ff72011-11-15 09:49:55 -0500107void omap_rev_string(char *omap_rev_string)
Aneesh V162ced32011-07-21 09:10:04 -0400108{
Sricharan9310ff72011-11-15 09:49:55 -0500109 u32 omap_rev = omap_revision();
110 u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
111 u32 major_rev = (omap_rev & 0x00000F00) >> 8;
112 u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
Aneesh V162ced32011-07-21 09:10:04 -0400113
Sricharan9310ff72011-11-15 09:49:55 -0500114 sprintf(omap_rev_string, "OMAP%x ES%x.%x", omap_variant, major_rev,
Aneesh V162ced32011-07-21 09:10:04 -0400115 minor_rev);
116}
117
Sricharan308fe922011-11-15 09:50:03 -0500118#ifdef CONFIG_SPL_BUILD
119static void init_boot_params(void)
120{
121 boot_params_ptr = (u32 *) &boot_params;
122}
123#endif
124
Steve Sakoman1ad21582010-06-08 13:07:46 -0700125/*
126 * Routine: s_init
Aneesh Vf908b632011-07-21 09:10:01 -0400127 * Description: Does early system init of watchdog, muxing, andclocks
128 * Watchdog disable is done always. For the rest what gets done
129 * depends on the boot mode in which this function is executed
130 * 1. s_init of SPL running from SRAM
131 * 2. s_init of U-Boot running from FLASH
132 * 3. s_init of U-Boot loaded to SDRAM by SPL
133 * 4. s_init of U-Boot loaded to SDRAM by ROM code using the
134 * Configuration Header feature
135 * Please have a look at the respective functions to see what gets
136 * done in each of these cases
137 * This function is called with SRAM stack.
Steve Sakoman1ad21582010-06-08 13:07:46 -0700138 */
139void s_init(void)
140{
Sricharan9310ff72011-11-15 09:49:55 -0500141 init_omap_revision();
Steve Sakoman1ad21582010-06-08 13:07:46 -0700142 watchdog_init();
Aneesh Vf908b632011-07-21 09:10:01 -0400143 set_mux_conf_regs();
Aneesh Vb8e60b92011-07-21 09:10:21 -0400144#ifdef CONFIG_SPL_BUILD
Simon Schwarz01a43322011-09-14 15:14:46 -0400145 setup_clocks_for_console();
Aneesh Vb8e60b92011-07-21 09:10:21 -0400146 preloader_console_init();
Aneesh Vb35f7cb2011-09-08 11:05:56 -0400147 do_io_settings();
Aneesh Vb8e60b92011-07-21 09:10:21 -0400148#endif
Aneesh V0d2628b2011-07-21 09:10:07 -0400149 prcm_init();
Aneesh Vb8e60b92011-07-21 09:10:21 -0400150#ifdef CONFIG_SPL_BUILD
151 /* For regular u-boot sdram_init() is called from dram_init() */
152 sdram_init();
Sricharan308fe922011-11-15 09:50:03 -0500153 init_boot_params();
Aneesh Vb8e60b92011-07-21 09:10:21 -0400154#endif
Steve Sakoman1ad21582010-06-08 13:07:46 -0700155}
156
157/*
158 * Routine: wait_for_command_complete
159 * Description: Wait for posting to finish on watchdog
160 */
161void wait_for_command_complete(struct watchdog *wd_base)
162{
163 int pending = 1;
164 do {
165 pending = readl(&wd_base->wwps);
166 } while (pending);
167}
168
169/*
170 * Routine: watchdog_init
171 * Description: Shut down watch dogs
172 */
173void watchdog_init(void)
174{
175 struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
176
177 writel(WD_UNLOCK1, &wd2_base->wspr);
178 wait_for_command_complete(wd2_base);
179 writel(WD_UNLOCK2, &wd2_base->wspr);
180}
181
Aneesh V04bd2b92010-09-12 10:32:55 +0530182
183/*
184 * This function finds the SDRAM size available in the system
185 * based on DMM section configurations
186 * This is needed because the size of memory installed may be
187 * different on different versions of the board
188 */
Sricharan9310ff72011-11-15 09:49:55 -0500189u32 omap_sdram_size(void)
Aneesh V04bd2b92010-09-12 10:32:55 +0530190{
191 u32 section, i, total_size = 0, size, addr;
Sricharan62a86502011-11-15 09:50:00 -0500192
Aneesh V04bd2b92010-09-12 10:32:55 +0530193 for (i = 0; i < 4; i++) {
Sricharan62a86502011-11-15 09:50:00 -0500194 section = __raw_readl(DMM_BASE + i*4);
195 addr = section & EMIF_SYS_ADDR_MASK;
Aneesh V04bd2b92010-09-12 10:32:55 +0530196 /* See if the address is valid */
Sricharan62a86502011-11-15 09:50:00 -0500197 if ((addr >= DRAM_ADDR_SPACE_START) &&
198 (addr < DRAM_ADDR_SPACE_END)) {
199 size = ((section & EMIF_SYS_SIZE_MASK) >>
200 EMIF_SYS_SIZE_SHIFT);
201 size = 1 << size;
202 size *= SZ_16M;
Aneesh V04bd2b92010-09-12 10:32:55 +0530203 total_size += size;
204 }
205 }
Sricharan62a86502011-11-15 09:50:00 -0500206
Aneesh V04bd2b92010-09-12 10:32:55 +0530207 return total_size;
208}
209
210
Steve Sakoman1ad21582010-06-08 13:07:46 -0700211/*
212 * Routine: dram_init
213 * Description: sets uboots idea of sdram size
214 */
215int dram_init(void)
216{
Aneesh Vcc565582011-07-21 09:10:09 -0400217 sdram_init();
Sricharan9310ff72011-11-15 09:49:55 -0500218 gd->ram_size = omap_sdram_size();
Steve Sakoman1ad21582010-06-08 13:07:46 -0700219 return 0;
220}
221
222/*
223 * Print board information
224 */
225int checkboard(void)
226{
227 puts(sysinfo.board_string);
228 return 0;
229}
230
Steve Sakoman9bb65b52010-07-15 13:43:10 -0700231/*
232* This function is called by start_armboot. You can reliably use static
233* data. Any boot-time function that require static data should be
234* called from here
235*/
236int arch_cpu_init(void)
237{
Steve Sakoman9bb65b52010-07-15 13:43:10 -0700238 return 0;
239}
Aneesh Ve3405bd2011-06-16 23:30:52 +0000240
Sricharan9310ff72011-11-15 09:49:55 -0500241/*
242 * get_device_type(): tell if GP/HS/EMU/TST
243 */
244u32 get_device_type(void)
Aneesh Ve3405bd2011-06-16 23:30:52 +0000245{
Sricharan9310ff72011-11-15 09:49:55 -0500246 return 0;
Aneesh Ve3405bd2011-06-16 23:30:52 +0000247}
248
Sricharan9310ff72011-11-15 09:49:55 -0500249/*
250 * Print CPU information
251 */
252int print_cpuinfo(void)
Aneesh Ve3405bd2011-06-16 23:30:52 +0000253{
Sricharan9310ff72011-11-15 09:49:55 -0500254 char rev_string_buffer[50];
Aneesh V572134b2011-08-11 04:35:43 +0000255
Sricharan9310ff72011-11-15 09:49:55 -0500256 omap_rev_string(rev_string_buffer);
257 printf("CPU : %s\n", rev_string_buffer);
258
259 return 0;
260}
Aneesh V572134b2011-08-11 04:35:43 +0000261#ifndef CONFIG_SYS_DCACHE_OFF
262void enable_caches(void)
263{
264 /* Enable D-cache. I-cache is already enabled in start.S */
265 dcache_enable();
266}
267#endif