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Stelian Pop0bf5cad2008-05-08 18:52:25 +02001/*
2 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Stelian Pop0bf5cad2008-05-08 18:52:25 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9RLEK board.
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Stelian Pop0bf5cad2008-05-08 18:52:25 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Xu, Hong0c0fb212011-08-01 03:56:53 +000014#include <asm/hardware.h>
15
16#define CONFIG_SYS_TEXT_BASE 0x21F00000
Jens Scharsig128ecd02010-02-03 22:45:42 +010017
Stelian Pop0bf5cad2008-05-08 18:52:25 +020018/* ARM asynchronous clock */
Xu, Hong0c0fb212011-08-01 03:56:53 +000019#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
20#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
Stelian Pop0bf5cad2008-05-08 18:52:25 +020021
Xu, Hong0c0fb212011-08-01 03:56:53 +000022#define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */
23
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020024#define CONFIG_ARCH_CPU_INIT
Xu, Hong0c0fb212011-08-01 03:56:53 +000025#define CONFIG_SKIP_LOWLEVEL_INIT
26#define CONFIG_BOARD_EARLY_INIT_F
Stelian Pop0bf5cad2008-05-08 18:52:25 +020027
Xu, Hong0c0fb212011-08-01 03:56:53 +000028#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
29#define CONFIG_SETUP_MEMORY_TAGS 1
30#define CONFIG_INITRD_TAG 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +020031
Xu, Hong0c0fb212011-08-01 03:56:53 +000032#define CONFIG_DISPLAY_CPUINFO
33
Nicolas Ferree4f36232013-02-20 00:16:24 +000034#define CONFIG_CMD_BOOTZ
Wu, Joshef905732014-09-02 18:14:11 +080035
Xu, Hong0c0fb212011-08-01 03:56:53 +000036#define CONFIG_ATMEL_LEGACY
37#define CONFIG_AT91_GPIO 1
38#define CONFIG_AT91_GPIO_PULLUP 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +020039
40/*
41 * Hardware drivers
42 */
Xu, Hong0c0fb212011-08-01 03:56:53 +000043
44/* serial console */
45#define CONFIG_ATMEL_USART
46#define CONFIG_USART_BASE ATMEL_BASE_DBGU
47#define CONFIG_USART_ID ATMEL_ID_SYS
48#define CONFIG_BAUDRATE 115200
Stelian Pop0bf5cad2008-05-08 18:52:25 +020049
Stelian Popcea5c532008-05-08 14:52:32 +020050/* LCD */
51#define CONFIG_LCD 1
52#define LCD_BPP LCD_COLOR8
53#define CONFIG_LCD_LOGO 1
54#undef LCD_TEST_PATTERN
55#define CONFIG_LCD_INFO 1
56#define CONFIG_LCD_INFO_BELOW_LOGO 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000057#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Popcea5c532008-05-08 14:52:32 +020058#define CONFIG_ATMEL_LCD 1
59#define CONFIG_ATMEL_LCD_RGB565 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000060/* Let board_init_f handle the framebuffer allocation */
61#undef CONFIG_FB_ADDR
62#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
63
Stelian Popcea5c532008-05-08 14:52:32 +020064
Jean-Christophe PLAGNIOL-VILLARD476d10e2009-03-21 21:08:00 +010065/* LED */
66#define CONFIG_AT91_LED
67#define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */
68#define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */
69#define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */
70
Stelian Pop0bf5cad2008-05-08 18:52:25 +020071#define CONFIG_BOOTDELAY 3
72
Stelian Pop0bf5cad2008-05-08 18:52:25 +020073/*
74 * Command line configuration.
75 */
Stelian Pop0bf5cad2008-05-08 18:52:25 +020076#undef CONFIG_CMD_USB
77
Xu, Hong0c0fb212011-08-01 03:56:53 +000078#define CONFIG_CMD_NAND 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +020079
80/* SDRAM */
81#define CONFIG_NR_DRAM_BANKS 1
Xu, Hong0c0fb212011-08-01 03:56:53 +000082#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
83#define CONFIG_SYS_SDRAM_SIZE 0x04000000
84
85#define CONFIG_SYS_INIT_SP_ADDR \
86 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
Stelian Pop0bf5cad2008-05-08 18:52:25 +020087
88/* DataFlash */
Jean-Christophe PLAGNIOL-VILLARDe5437ac2009-03-27 23:26:44 +010089#define CONFIG_ATMEL_DATAFLASH_SPI
Xu, Hong0c0fb212011-08-01 03:56:53 +000090#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020091#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
92#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
Xu, Hong0c0fb212011-08-01 03:56:53 +000093#define AT91_SPI_CLK 15000000
94#define DATAFLASH_TCSS (0x1a << 16)
95#define DATAFLASH_TCHS (0x1 << 24)
Stelian Pop0bf5cad2008-05-08 18:52:25 +020096
97/* NOR flash - not present */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020098#define CONFIG_SYS_NO_FLASH 1
Stelian Pop0bf5cad2008-05-08 18:52:25 +020099
100/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100101#ifdef CONFIG_CMD_NAND
102#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200103#define CONFIG_SYS_MAX_NAND_DEVICE 1
Xu, Hong0c0fb212011-08-01 03:56:53 +0000104#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200105#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100106/* our ALE is AD21 */
107#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
108/* our CLE is AD22 */
109#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
110#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
111#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
Wolfgang Denk1f797742009-07-18 21:52:24 +0200112
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100113#endif
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200114
Wu, Joshb12259b2015-02-02 17:51:00 +0800115/* MMC */
116#define CONFIG_CMD_MMC
117
118#ifdef CONFIG_CMD_MMC
119#define CONFIG_MMC
120#define CONFIG_GENERIC_MMC
121#define CONFIG_GENERIC_ATMEL_MCI
122#define CONFIG_CMD_FAT
123#define CONFIG_DOS_PARTITION
124#endif
125
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200126/* Ethernet - not present */
127
128/* USB - not supported */
129
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200130#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200131
Xu, Hong0c0fb212011-08-01 03:56:53 +0000132#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200133#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200134
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200135#ifdef CONFIG_SYS_USE_DATAFLASH
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200136
137/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD2b14d2b2008-09-10 22:47:58 +0200138#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200139#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200140#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200141#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200142#define CONFIG_ENV_SIZE 0x4200
Alexandre Belloni9ef19ba2012-07-02 04:26:58 +0000143#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200144#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
145 "root=/dev/mtdblock0 " \
Albin Tonnerreeaa6db22009-07-22 18:30:03 +0200146 "mtdparts=atmel_nand:-(root) "\
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200147 "rw rootfstype=jffs2"
148
Wu, Josh7ff194f2015-02-02 17:51:01 +0800149#elif CONFIG_SYS_USE_NANDFLASH
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200150
151/* bootstrap + u-boot + env + linux in nandflash */
Xu, Hong0c0fb212011-08-01 03:56:53 +0000152#define CONFIG_ENV_IS_IN_NAND 1
Wu, Joshf8e70d92015-02-03 11:38:30 +0800153#define CONFIG_ENV_OFFSET 0xc0000
154#define CONFIG_ENV_OFFSET_REDUND 0x100000
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200155#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Wu, Joshf8e70d92015-02-03 11:38:30 +0800156#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
157 "nand read 0x21000000 0x180000 0x80000; " \
158 "bootz 0x22000000 - 0x21000000"
159#define CONFIG_BOOTARGS \
160 "console=ttyS0,115200 earlyprintk " \
161 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
Wu, Joshbdfcebb2015-04-30 18:22:02 +0800162 "256K(env),256k(env_redundent),256k(spare)," \
Wu, Joshf8e70d92015-02-03 11:38:30 +0800163 "512k(dtb),6M(kernel)ro,-(rootfs) " \
164 "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200165
Wu, Josh7ff194f2015-02-02 17:51:01 +0800166#else /* CONFIG_SYS_USE_MMC */
167
168/* bootstrap + u-boot + env + linux in mmc */
169#define CONFIG_ENV_IS_IN_FAT
170#define CONFIG_FAT_WRITE
171#define FAT_ENV_INTERFACE "mmc"
172#define FAT_ENV_FILE "uboot.env"
173#define FAT_ENV_DEVICE_AND_PART "0"
174#define CONFIG_ENV_SIZE 0x4000
175#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
176 "fatload mmc 0:1 0x22000000 zImage; " \
177 "bootz 0x22000000 - 0x21000000"
178#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
179 "mtdparts=atmel_nand:" \
180 "8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
181 "root=/dev/mmcblk0p2 rw rootwait"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200182#endif
183
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200184#define CONFIG_SYS_CBSIZE 256
185#define CONFIG_SYS_MAXARGS 16
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200186#define CONFIG_SYS_LONGHELP 1
Xu, Hong0c0fb212011-08-01 03:56:53 +0000187#define CONFIG_CMDLINE_EDITING 1
Alexandre Belloni9ef19ba2012-07-02 04:26:58 +0000188#define CONFIG_AUTO_COMPLETE
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200189
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200190/*
191 * Size of malloc() pool
192 */
Xu, Hong0c0fb212011-08-01 03:56:53 +0000193#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200194
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200195#endif