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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Kever Yangec02b3c2017-02-23 15:37:51 +08002/*
3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd
Kever Yangec02b3c2017-02-23 15:37:51 +08004 */
5
6#ifndef __CONFIG_RK3328_COMMON_H
7#define __CONFIG_RK3328_COMMON_H
8
9#include "rockchip-common.h"
10
FUKAUMI Naoki4913ee92024-07-17 13:47:24 +090011#define CFG_IRAM_BASE 0xff090000
Kever Yangaf376322019-07-22 19:59:09 +080012
Tom Rinibb4dd962022-11-16 13:10:37 -050013#define CFG_SYS_SDRAM_BASE 0
Kever Yang5db9e672017-06-23 16:11:05 +080014#define SDRAM_MAX_SIZE 0xff000000
Kever Yangec02b3c2017-02-23 15:37:51 +080015
FUKAUMI Naoki4913ee92024-07-17 13:47:24 +090016#define ENV_MEM_LAYOUT_SETTINGS \
17 "scriptaddr=0x00500000\0" \
FUKAUMI Naoki8d43a342024-07-17 13:47:25 +090018 "script_offset_f=0xffe000\0" \
19 "script_size_f=0x2000\0" \
FUKAUMI Naoki4913ee92024-07-17 13:47:24 +090020 "pxefile_addr_r=0x00600000\0" \
FUKAUMI Naoki8d43a342024-07-17 13:47:25 +090021 "fdt_addr_r=0x01e00000\0" \
22 "fdtoverlay_addr_r=0x01f00000\0" \
FUKAUMI Naoki4913ee92024-07-17 13:47:24 +090023 "kernel_addr_r=0x02080000\0" \
24 "ramdisk_addr_r=0x06000000\0" \
25 "kernel_comp_addr_r=0x08000000\0" \
Christopher Obbard874de182023-01-27 17:03:56 +000026 "kernel_comp_size=0x2000000\0"
Kever Yangec02b3c2017-02-23 15:37:51 +080027
FUKAUMI Naoki4913ee92024-07-17 13:47:24 +090028#define CFG_EXTRA_ENV_SETTINGS \
29 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
30 "partitions=" PARTS_DEFAULT \
31 ENV_MEM_LAYOUT_SETTINGS \
32 ROCKCHIP_DEVICE_SETTINGS \
Simon Glassf27e9d52023-04-24 13:49:51 +120033 "boot_targets=" BOOT_TARGETS "\0"
Kever Yangec02b3c2017-02-23 15:37:51 +080034
FUKAUMI Naoki4913ee92024-07-17 13:47:24 +090035#endif /* __CONFIG_RK3328_COMMON_H */