Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 2 | /* |
Patrice Chotard | 789ee0e | 2017-10-23 09:53:58 +0200 | [diff] [blame] | 3 | * Copyright (C) 2017, STMicroelectronics - All Rights Reserved |
Patrice Chotard | 5d9950d | 2020-12-02 18:47:30 +0100 | [diff] [blame] | 4 | * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics. |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
Patrick Delaunay | eec21f3 | 2020-11-06 19:01:43 +0100 | [diff] [blame] | 7 | #define LOG_CATEGORY UCLASS_NOP |
| 8 | |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 9 | #include <dm.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 10 | #include <log.h> |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 11 | #include <misc.h> |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 12 | #include <stm32_rcc.h> |
| 13 | #include <dm/device-internal.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 14 | #include <dm/device_compat.h> |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 15 | #include <dm/lists.h> |
| 16 | |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 17 | struct stm32_rcc_clk stm32_rcc_clk_f42x = { |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 18 | .drv_name = "stm32fx_rcc_clock", |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 19 | .soc = STM32F42X, |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 20 | }; |
| 21 | |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 22 | struct stm32_rcc_clk stm32_rcc_clk_f469 = { |
| 23 | .drv_name = "stm32fx_rcc_clock", |
| 24 | .soc = STM32F469, |
| 25 | }; |
| 26 | |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 27 | struct stm32_rcc_clk stm32_rcc_clk_f7 = { |
| 28 | .drv_name = "stm32fx_rcc_clock", |
| 29 | .soc = STM32F7, |
| 30 | }; |
| 31 | |
| 32 | struct stm32_rcc_clk stm32_rcc_clk_h7 = { |
| 33 | .drv_name = "stm32h7_rcc_clock", |
| 34 | }; |
| 35 | |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 36 | struct stm32_rcc_clk stm32_rcc_clk_mp1 = { |
| 37 | .drv_name = "stm32mp1_clk", |
| 38 | .soc = STM32MP1, |
| 39 | }; |
| 40 | |
Patrick Delaunay | 6b4490c | 2022-05-19 17:56:46 +0200 | [diff] [blame] | 41 | struct stm32_rcc_clk stm32_rcc_clk_mp13 = { |
| 42 | .drv_name = "stm32mp13_clk", |
| 43 | .soc = STM32MP1, |
| 44 | }; |
| 45 | |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 46 | static int stm32_rcc_bind(struct udevice *dev) |
| 47 | { |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 48 | struct udevice *child; |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 49 | struct driver *drv; |
| 50 | struct stm32_rcc_clk *rcc_clk = |
| 51 | (struct stm32_rcc_clk *)dev_get_driver_data(dev); |
| 52 | int ret; |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 53 | |
Patrick Delaunay | eec21f3 | 2020-11-06 19:01:43 +0100 | [diff] [blame] | 54 | dev_dbg(dev, "RCC bind\n"); |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 55 | drv = lists_driver_lookup_name(rcc_clk->drv_name); |
| 56 | if (!drv) { |
Patrick Delaunay | eec21f3 | 2020-11-06 19:01:43 +0100 | [diff] [blame] | 57 | dev_err(dev, "Cannot find driver '%s'\n", rcc_clk->drv_name); |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 58 | return -ENOENT; |
| 59 | } |
| 60 | |
Patrick Delaunay | 78075bb | 2020-11-06 19:01:44 +0100 | [diff] [blame] | 61 | ret = device_bind_with_driver_data(dev, drv, dev->name, |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 62 | rcc_clk->soc, |
| 63 | dev_ofnode(dev), &child); |
| 64 | |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 65 | if (ret) |
| 66 | return ret; |
| 67 | |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 68 | drv = lists_driver_lookup_name("stm32_rcc_reset"); |
| 69 | if (!drv) { |
| 70 | dev_err(dev, "Cannot find driver stm32_rcc_reset'\n"); |
| 71 | return -ENOENT; |
| 72 | } |
| 73 | |
Patrick Delaunay | 78075bb | 2020-11-06 19:01:44 +0100 | [diff] [blame] | 74 | return device_bind_with_driver_data(dev, drv, dev->name, |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 75 | rcc_clk->soc, |
| 76 | dev_ofnode(dev), &child); |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 77 | } |
| 78 | |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 79 | |
| 80 | static const struct udevice_id stm32_rcc_ids[] = { |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 81 | {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_clk_f42x }, |
| 82 | {.compatible = "st,stm32f469-rcc", .data = (ulong)&stm32_rcc_clk_f469 }, |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 83 | {.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_clk_f7 }, |
| 84 | {.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_clk_h7 }, |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 85 | {.compatible = "st,stm32mp1-rcc", .data = (ulong)&stm32_rcc_clk_mp1 }, |
Patrick Delaunay | b5b1aa1 | 2022-07-05 16:55:55 +0200 | [diff] [blame] | 86 | {.compatible = "st,stm32mp1-rcc-secure", .data = (ulong)&stm32_rcc_clk_mp1 }, |
Patrick Delaunay | 6b4490c | 2022-05-19 17:56:46 +0200 | [diff] [blame] | 87 | {.compatible = "st,stm32mp13-rcc", .data = (ulong)&stm32_rcc_clk_mp13 }, |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 88 | { } |
| 89 | }; |
| 90 | |
| 91 | U_BOOT_DRIVER(stm32_rcc) = { |
| 92 | .name = "stm32-rcc", |
Patrick Delaunay | d79f8ee | 2019-08-02 13:08:08 +0200 | [diff] [blame] | 93 | .id = UCLASS_NOP, |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 94 | .of_match = stm32_rcc_ids, |
| 95 | .bind = stm32_rcc_bind, |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 96 | }; |