Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 2 | /* |
Patrice Chotard | 789ee0e | 2017-10-23 09:53:58 +0200 | [diff] [blame] | 3 | * Copyright (C) 2017, STMicroelectronics - All Rights Reserved |
Patrice Chotard | 5d9950d | 2020-12-02 18:47:30 +0100 | [diff] [blame] | 4 | * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics. |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
Patrick Delaunay | eec21f3 | 2020-11-06 19:01:43 +0100 | [diff] [blame^] | 7 | #define LOG_CATEGORY UCLASS_NOP |
| 8 | |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 9 | #include <common.h> |
| 10 | #include <dm.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 11 | #include <log.h> |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 12 | #include <misc.h> |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 13 | #include <stm32_rcc.h> |
| 14 | #include <dm/device-internal.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 15 | #include <dm/device_compat.h> |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 16 | #include <dm/lists.h> |
| 17 | |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 18 | struct stm32_rcc_clk stm32_rcc_clk_f42x = { |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 19 | .drv_name = "stm32fx_rcc_clock", |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 20 | .soc = STM32F42X, |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 21 | }; |
| 22 | |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 23 | struct stm32_rcc_clk stm32_rcc_clk_f469 = { |
| 24 | .drv_name = "stm32fx_rcc_clock", |
| 25 | .soc = STM32F469, |
| 26 | }; |
| 27 | |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 28 | struct stm32_rcc_clk stm32_rcc_clk_f7 = { |
| 29 | .drv_name = "stm32fx_rcc_clock", |
| 30 | .soc = STM32F7, |
| 31 | }; |
| 32 | |
| 33 | struct stm32_rcc_clk stm32_rcc_clk_h7 = { |
| 34 | .drv_name = "stm32h7_rcc_clock", |
| 35 | }; |
| 36 | |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 37 | struct stm32_rcc_clk stm32_rcc_clk_mp1 = { |
| 38 | .drv_name = "stm32mp1_clk", |
| 39 | .soc = STM32MP1, |
| 40 | }; |
| 41 | |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 42 | static int stm32_rcc_bind(struct udevice *dev) |
| 43 | { |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 44 | struct udevice *child; |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 45 | struct driver *drv; |
| 46 | struct stm32_rcc_clk *rcc_clk = |
| 47 | (struct stm32_rcc_clk *)dev_get_driver_data(dev); |
| 48 | int ret; |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 49 | |
Patrick Delaunay | eec21f3 | 2020-11-06 19:01:43 +0100 | [diff] [blame^] | 50 | dev_dbg(dev, "RCC bind\n"); |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 51 | drv = lists_driver_lookup_name(rcc_clk->drv_name); |
| 52 | if (!drv) { |
Patrick Delaunay | eec21f3 | 2020-11-06 19:01:43 +0100 | [diff] [blame^] | 53 | dev_err(dev, "Cannot find driver '%s'\n", rcc_clk->drv_name); |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 54 | return -ENOENT; |
| 55 | } |
| 56 | |
| 57 | ret = device_bind_with_driver_data(dev, drv, rcc_clk->drv_name, |
| 58 | rcc_clk->soc, |
| 59 | dev_ofnode(dev), &child); |
| 60 | |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 61 | if (ret) |
| 62 | return ret; |
| 63 | |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 64 | drv = lists_driver_lookup_name("stm32_rcc_reset"); |
| 65 | if (!drv) { |
| 66 | dev_err(dev, "Cannot find driver stm32_rcc_reset'\n"); |
| 67 | return -ENOENT; |
| 68 | } |
| 69 | |
| 70 | return device_bind_with_driver_data(dev, drv, "stm32_rcc_reset", |
| 71 | rcc_clk->soc, |
| 72 | dev_ofnode(dev), &child); |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 73 | } |
| 74 | |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 75 | |
| 76 | static const struct udevice_id stm32_rcc_ids[] = { |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 77 | {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_clk_f42x }, |
| 78 | {.compatible = "st,stm32f469-rcc", .data = (ulong)&stm32_rcc_clk_f469 }, |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 79 | {.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_clk_f7 }, |
| 80 | {.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_clk_h7 }, |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 81 | {.compatible = "st,stm32mp1-rcc", .data = (ulong)&stm32_rcc_clk_mp1 }, |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 82 | { } |
| 83 | }; |
| 84 | |
| 85 | U_BOOT_DRIVER(stm32_rcc) = { |
| 86 | .name = "stm32-rcc", |
Patrick Delaunay | d79f8ee | 2019-08-02 13:08:08 +0200 | [diff] [blame] | 87 | .id = UCLASS_NOP, |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 88 | .of_match = stm32_rcc_ids, |
| 89 | .bind = stm32_rcc_bind, |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 90 | }; |