Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 2 | /* |
Patrice Chotard | 789ee0e | 2017-10-23 09:53:58 +0200 | [diff] [blame] | 3 | * Copyright (C) 2017, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <dm.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame^] | 9 | #include <log.h> |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 10 | #include <misc.h> |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 11 | #include <stm32_rcc.h> |
| 12 | #include <dm/device-internal.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 13 | #include <dm/device_compat.h> |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 14 | #include <dm/lists.h> |
| 15 | |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 16 | struct stm32_rcc_clk stm32_rcc_clk_f42x = { |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 17 | .drv_name = "stm32fx_rcc_clock", |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 18 | .soc = STM32F42X, |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 19 | }; |
| 20 | |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 21 | struct stm32_rcc_clk stm32_rcc_clk_f469 = { |
| 22 | .drv_name = "stm32fx_rcc_clock", |
| 23 | .soc = STM32F469, |
| 24 | }; |
| 25 | |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 26 | struct stm32_rcc_clk stm32_rcc_clk_f7 = { |
| 27 | .drv_name = "stm32fx_rcc_clock", |
| 28 | .soc = STM32F7, |
| 29 | }; |
| 30 | |
| 31 | struct stm32_rcc_clk stm32_rcc_clk_h7 = { |
| 32 | .drv_name = "stm32h7_rcc_clock", |
| 33 | }; |
| 34 | |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 35 | struct stm32_rcc_clk stm32_rcc_clk_mp1 = { |
| 36 | .drv_name = "stm32mp1_clk", |
| 37 | .soc = STM32MP1, |
| 38 | }; |
| 39 | |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 40 | static int stm32_rcc_bind(struct udevice *dev) |
| 41 | { |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 42 | struct udevice *child; |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 43 | struct driver *drv; |
| 44 | struct stm32_rcc_clk *rcc_clk = |
| 45 | (struct stm32_rcc_clk *)dev_get_driver_data(dev); |
| 46 | int ret; |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 47 | |
| 48 | debug("%s(dev=%p)\n", __func__, dev); |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 49 | drv = lists_driver_lookup_name(rcc_clk->drv_name); |
| 50 | if (!drv) { |
| 51 | debug("Cannot find driver '%s'\n", rcc_clk->drv_name); |
| 52 | return -ENOENT; |
| 53 | } |
| 54 | |
| 55 | ret = device_bind_with_driver_data(dev, drv, rcc_clk->drv_name, |
| 56 | rcc_clk->soc, |
| 57 | dev_ofnode(dev), &child); |
| 58 | |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 59 | if (ret) |
| 60 | return ret; |
| 61 | |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 62 | drv = lists_driver_lookup_name("stm32_rcc_reset"); |
| 63 | if (!drv) { |
| 64 | dev_err(dev, "Cannot find driver stm32_rcc_reset'\n"); |
| 65 | return -ENOENT; |
| 66 | } |
| 67 | |
| 68 | return device_bind_with_driver_data(dev, drv, "stm32_rcc_reset", |
| 69 | rcc_clk->soc, |
| 70 | dev_ofnode(dev), &child); |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 71 | } |
| 72 | |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 73 | |
| 74 | static const struct udevice_id stm32_rcc_ids[] = { |
Patrice Chotard | 7264aae | 2018-04-11 17:07:45 +0200 | [diff] [blame] | 75 | {.compatible = "st,stm32f42xx-rcc", .data = (ulong)&stm32_rcc_clk_f42x }, |
| 76 | {.compatible = "st,stm32f469-rcc", .data = (ulong)&stm32_rcc_clk_f469 }, |
Patrice Chotard | 03f10a1 | 2017-11-15 13:14:51 +0100 | [diff] [blame] | 77 | {.compatible = "st,stm32f746-rcc", .data = (ulong)&stm32_rcc_clk_f7 }, |
| 78 | {.compatible = "st,stm32h743-rcc", .data = (ulong)&stm32_rcc_clk_h7 }, |
Patrick Delaunay | b139a5b | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 79 | {.compatible = "st,stm32mp1-rcc", .data = (ulong)&stm32_rcc_clk_mp1 }, |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 80 | { } |
| 81 | }; |
| 82 | |
| 83 | U_BOOT_DRIVER(stm32_rcc) = { |
| 84 | .name = "stm32-rcc", |
Patrick Delaunay | d79f8ee | 2019-08-02 13:08:08 +0200 | [diff] [blame] | 85 | .id = UCLASS_NOP, |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 86 | .of_match = stm32_rcc_ids, |
| 87 | .bind = stm32_rcc_bind, |
Christophe Kerello | 275f706 | 2017-09-13 18:00:08 +0200 | [diff] [blame] | 88 | }; |