Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 2 | /* |
Patrice Chotard | 789ee0e | 2017-10-23 09:53:58 +0200 | [diff] [blame] | 3 | * Copyright (C) 2016, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CONFIG_H |
| 8 | #define __CONFIG_H |
| 9 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 10 | #define CONFIG_SYS_FLASH_BASE 0x08000000 |
| 11 | #define CONFIG_SYS_INIT_SP_ADDR 0x20050000 |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 12 | |
| 13 | #ifdef CONFIG_SUPPORT_SPL |
Vikas Manocha | f0e32c0 | 2017-05-28 12:55:14 -0700 | [diff] [blame] | 14 | #define CONFIG_SYS_LOAD_ADDR 0x08008000 |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 15 | #else |
Vikas Manocha | f0e32c0 | 2017-05-28 12:55:14 -0700 | [diff] [blame] | 16 | #define CONFIG_SYS_LOAD_ADDR 0xC0400000 |
| 17 | #define CONFIG_LOADADDR 0xC0400000 |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 18 | #endif |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 19 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 20 | /* |
| 21 | * Configuration of the external SDRAM memory |
| 22 | */ |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 23 | |
Vikas Manocha | 4940802 | 2016-03-09 15:18:14 -0800 | [diff] [blame] | 24 | #define CONFIG_SYS_MAX_FLASH_SECT 8 |
| 25 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 26 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 27 | #define CONFIG_ENV_SIZE (8 << 10) |
| 28 | |
Vikas Manocha | 4940802 | 2016-03-09 15:18:14 -0800 | [diff] [blame] | 29 | #define CONFIG_STM32_FLASH |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 30 | |
Michael Kurz | 812962b | 2017-01-22 16:04:27 +0100 | [diff] [blame] | 31 | #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) |
| 32 | #define CONFIG_DW_ALTDESCRIPTOR |
Michael Kurz | 2c5a22f | 2017-01-22 16:04:29 +0100 | [diff] [blame] | 33 | #define CONFIG_PHY_SMSC |
Michael Kurz | 812962b | 2017-01-22 16:04:27 +0100 | [diff] [blame] | 34 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 35 | #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */ |
| 36 | |
| 37 | #define CONFIG_CMDLINE_TAG |
| 38 | #define CONFIG_SETUP_MEMORY_TAGS |
| 39 | #define CONFIG_INITRD_TAG |
| 40 | #define CONFIG_REVISION_TAG |
| 41 | |
| 42 | #define CONFIG_SYS_CBSIZE 1024 |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 43 | |
Michael Kurz | 812962b | 2017-01-22 16:04:27 +0100 | [diff] [blame] | 44 | #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 45 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 46 | #define CONFIG_BOOTCOMMAND \ |
| 47 | "run bootcmd_romfs" |
| 48 | |
| 49 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 50 | "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \ |
| 51 | "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \ |
| 52 | "bootm 0x08044000 - 0x08042000\0" |
| 53 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 54 | |
| 55 | /* |
| 56 | * Command line configuration. |
| 57 | */ |
Vikas Manocha | 9c7573e | 2017-04-10 15:03:00 -0700 | [diff] [blame] | 58 | #define CONFIG_BOARD_LATE_INIT |
Vikas Manocha | d7a80fc | 2017-04-10 15:03:02 -0700 | [diff] [blame] | 59 | #define CONFIG_DISPLAY_BOARDINFO |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 60 | |
| 61 | /* For SPL */ |
| 62 | #ifdef CONFIG_SUPPORT_SPL |
| 63 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 64 | #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE |
| 65 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) |
| 66 | #define CONFIG_SYS_SPL_LEN 0x00008000 |
Vikas Manocha | f0e32c0 | 2017-05-28 12:55:14 -0700 | [diff] [blame] | 67 | #define CONFIG_SYS_UBOOT_START 0x080083FD |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 68 | #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \ |
| 69 | CONFIG_SYS_SPL_LEN) |
Vikas Manocha | b785bb4 | 2017-05-28 12:55:13 -0700 | [diff] [blame] | 70 | |
Vikas Manocha | b785bb4 | 2017-05-28 12:55:13 -0700 | [diff] [blame] | 71 | /* DT blob (fdt) address */ |
Vikas Manocha | b785bb4 | 2017-05-28 12:55:13 -0700 | [diff] [blame] | 72 | #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ |
| 73 | 0x1C0000) |
Vikas Manocha | 50218ae | 2017-05-28 12:55:10 -0700 | [diff] [blame] | 74 | #endif |
| 75 | /* For SPL ends */ |
| 76 | |
yannick fertre | 030af82 | 2018-03-02 15:59:28 +0100 | [diff] [blame] | 77 | /* For splashcreen */ |
| 78 | #ifdef CONFIG_DM_VIDEO |
| 79 | #define CONFIG_VIDEO_BMP_RLE8 |
| 80 | #define CONFIG_BMP_16BPP |
| 81 | #define CONFIG_BMP_24BPP |
| 82 | #define CONFIG_BMP_32BPP |
| 83 | #define CONFIG_SPLASH_SCREEN |
| 84 | #define CONFIG_SPLASH_SCREEN_ALIGN |
| 85 | #endif |
| 86 | |
Vikas Manocha | 1b51c93 | 2016-02-11 15:47:20 -0800 | [diff] [blame] | 87 | #endif /* __CONFIG_H */ |