blob: dae402f91b8cc04cfdbe40b2fba40114428c62f6 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Vikas Manocha1b51c932016-02-11 15:47:20 -08002/*
Patrice Chotard789ee0e2017-10-23 09:53:58 +02003 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha1b51c932016-02-11 15:47:20 -08005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Vikas Manocha1b51c932016-02-11 15:47:20 -080010#define CONFIG_SYS_FLASH_BASE 0x08000000
11#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
Vikas Manocha50218ae2017-05-28 12:55:10 -070012
13#ifdef CONFIG_SUPPORT_SPL
Vikas Manochaf0e32c02017-05-28 12:55:14 -070014#define CONFIG_SYS_LOAD_ADDR 0x08008000
Vikas Manocha50218ae2017-05-28 12:55:10 -070015#else
Vikas Manochaf0e32c02017-05-28 12:55:14 -070016#define CONFIG_SYS_LOAD_ADDR 0xC0400000
17#define CONFIG_LOADADDR 0xC0400000
Vikas Manocha50218ae2017-05-28 12:55:10 -070018#endif
Vikas Manocha1b51c932016-02-11 15:47:20 -080019
Vikas Manocha1b51c932016-02-11 15:47:20 -080020/*
21 * Configuration of the external SDRAM memory
22 */
Vikas Manocha1b51c932016-02-11 15:47:20 -080023
Vikas Manocha49408022016-03-09 15:18:14 -080024#define CONFIG_SYS_MAX_FLASH_SECT 8
25#define CONFIG_SYS_MAX_FLASH_BANKS 1
Vikas Manocha1b51c932016-02-11 15:47:20 -080026
Vikas Manocha1b51c932016-02-11 15:47:20 -080027#define CONFIG_ENV_SIZE (8 << 10)
28
Vikas Manocha49408022016-03-09 15:18:14 -080029#define CONFIG_STM32_FLASH
Vikas Manocha1b51c932016-02-11 15:47:20 -080030
Michael Kurz812962b2017-01-22 16:04:27 +010031#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
32#define CONFIG_DW_ALTDESCRIPTOR
Michael Kurz2c5a22f2017-01-22 16:04:29 +010033#define CONFIG_PHY_SMSC
Michael Kurz812962b2017-01-22 16:04:27 +010034
Vikas Manocha1b51c932016-02-11 15:47:20 -080035#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
36
37#define CONFIG_CMDLINE_TAG
38#define CONFIG_SETUP_MEMORY_TAGS
39#define CONFIG_INITRD_TAG
40#define CONFIG_REVISION_TAG
41
42#define CONFIG_SYS_CBSIZE 1024
Vikas Manocha1b51c932016-02-11 15:47:20 -080043
Michael Kurz812962b2017-01-22 16:04:27 +010044#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Vikas Manocha1b51c932016-02-11 15:47:20 -080045
Vikas Manocha1b51c932016-02-11 15:47:20 -080046#define CONFIG_BOOTCOMMAND \
47 "run bootcmd_romfs"
48
49#define CONFIG_EXTRA_ENV_SETTINGS \
50 "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
51 "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
52 "bootm 0x08044000 - 0x08042000\0"
53
Vikas Manocha1b51c932016-02-11 15:47:20 -080054
55/*
56 * Command line configuration.
57 */
Vikas Manocha9c7573e2017-04-10 15:03:00 -070058#define CONFIG_BOARD_LATE_INIT
Vikas Manochad7a80fc2017-04-10 15:03:02 -070059#define CONFIG_DISPLAY_BOARDINFO
Vikas Manocha50218ae2017-05-28 12:55:10 -070060
61/* For SPL */
62#ifdef CONFIG_SUPPORT_SPL
63#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
Vikas Manocha50218ae2017-05-28 12:55:10 -070064#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE
65#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
66#define CONFIG_SYS_SPL_LEN 0x00008000
Vikas Manochaf0e32c02017-05-28 12:55:14 -070067#define CONFIG_SYS_UBOOT_START 0x080083FD
Vikas Manocha50218ae2017-05-28 12:55:10 -070068#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \
69 CONFIG_SYS_SPL_LEN)
Vikas Manochab785bb42017-05-28 12:55:13 -070070
Vikas Manochab785bb42017-05-28 12:55:13 -070071/* DT blob (fdt) address */
Vikas Manochab785bb42017-05-28 12:55:13 -070072#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
73 0x1C0000)
Vikas Manocha50218ae2017-05-28 12:55:10 -070074#endif
75/* For SPL ends */
76
yannick fertre030af822018-03-02 15:59:28 +010077/* For splashcreen */
78#ifdef CONFIG_DM_VIDEO
79#define CONFIG_VIDEO_BMP_RLE8
80#define CONFIG_BMP_16BPP
81#define CONFIG_BMP_24BPP
82#define CONFIG_BMP_32BPP
83#define CONFIG_SPLASH_SCREEN
84#define CONFIG_SPLASH_SCREEN_ALIGN
85#endif
86
Vikas Manocha1b51c932016-02-11 15:47:20 -080087#endif /* __CONFIG_H */