blob: 274e88a4921a16d96d8e0195bf9a77f9c5f9703d [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00002/*
3 * (C) Copyright 2001
4 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
wdenkc6097192002-11-03 00:24:07 +00005 */
6
7/*
8 * This provides a bit-banged interface to the ethernet MII management
9 * channel.
10 */
11
Simon Glassdbad3462015-04-05 16:07:39 -060012#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -060013#include <log.h>
wdenkc6097192002-11-03 00:24:07 +000014#include <miiphy.h>
Andy Flemingaecf6fc2011-04-08 02:10:27 -050015#include <phy.h>
Simon Glassdbd79542020-05-10 11:40:11 -060016#include <linux/delay.h>
wdenkc6097192002-11-03 00:24:07 +000017
Marian Balakowiczaab8c492005-10-28 22:30:33 +020018#include <asm/types.h>
19#include <linux/list.h>
20#include <malloc.h>
21#include <net.h>
22
23/* local debug macro */
Marian Balakowiczaab8c492005-10-28 22:30:33 +020024#undef MII_DEBUG
25
26#undef debug
27#ifdef MII_DEBUG
Andy Flemingaea0c3e2011-04-07 14:38:35 -050028#define debug(fmt, args...) printf(fmt, ##args)
Marian Balakowiczaab8c492005-10-28 22:30:33 +020029#else
Andy Flemingaea0c3e2011-04-07 14:38:35 -050030#define debug(fmt, args...)
Marian Balakowiczaab8c492005-10-28 22:30:33 +020031#endif /* MII_DEBUG */
32
Weijie Gao81d84922025-01-25 23:26:32 +080033static LIST_HEAD(mii_devs);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020034static struct mii_dev *current_mii;
35
Mike Frysinger24a90082010-07-27 18:35:09 -040036/*
37 * Lookup the mii_dev struct by the registered device name.
38 */
Andy Flemingaecf6fc2011-04-08 02:10:27 -050039struct mii_dev *miiphy_get_dev_by_name(const char *devname)
Mike Frysinger24a90082010-07-27 18:35:09 -040040{
41 struct list_head *entry;
42 struct mii_dev *dev;
43
44 if (!devname) {
45 printf("NULL device name!\n");
46 return NULL;
47 }
48
49 list_for_each(entry, &mii_devs) {
50 dev = list_entry(entry, struct mii_dev, link);
51 if (strcmp(dev->name, devname) == 0)
52 return dev;
53 }
54
Mike Frysinger24a90082010-07-27 18:35:09 -040055 return NULL;
56}
57
Andy Flemingaecf6fc2011-04-08 02:10:27 -050058struct mii_dev *mdio_alloc(void)
59{
60 struct mii_dev *bus;
61
62 bus = malloc(sizeof(*bus));
63 if (!bus)
64 return bus;
65
Marek Vasut1de70d52025-03-02 02:24:52 +010066 memset(bus, 0, sizeof(*bus));
67
68 /* initialize mii_dev struct fields */
69 INIT_LIST_HEAD(&bus->link);
Andy Flemingaecf6fc2011-04-08 02:10:27 -050070
71 return bus;
72}
73
Bin Menga961e1f2015-10-07 21:32:37 -070074void mdio_free(struct mii_dev *bus)
75{
76 free(bus);
77}
78
Andy Flemingaecf6fc2011-04-08 02:10:27 -050079int mdio_register(struct mii_dev *bus)
80{
Peng Fancd41c212015-11-24 17:03:47 +080081 if (!bus || !bus->read || !bus->write)
Andy Flemingaecf6fc2011-04-08 02:10:27 -050082 return -1;
83
84 /* check if we have unique name */
85 if (miiphy_get_dev_by_name(bus->name)) {
86 printf("mdio_register: non unique device name '%s'\n",
87 bus->name);
88 return -1;
89 }
90
91 /* add it to the list */
92 list_add_tail(&bus->link, &mii_devs);
93
94 if (!current_mii)
95 current_mii = bus;
96
97 return 0;
98}
99
Michal Simek1a548f52016-12-08 10:06:26 +0100100int mdio_register_seq(struct mii_dev *bus, int seq)
101{
102 int ret;
103
104 /* Setup a unique name for each mdio bus */
105 ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
106 if (ret < 0)
107 return ret;
108
109 return mdio_register(bus);
110}
111
Bin Menga961e1f2015-10-07 21:32:37 -0700112int mdio_unregister(struct mii_dev *bus)
113{
114 if (!bus)
115 return 0;
116
117 /* delete it from the list */
118 list_del(&bus->link);
119
120 if (current_mii == bus)
121 current_mii = NULL;
122
123 return 0;
124}
125
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500126void mdio_list_devices(void)
127{
128 struct list_head *entry;
129
130 list_for_each(entry, &mii_devs) {
131 int i;
132 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
133
134 printf("%s:\n", bus->name);
135
136 for (i = 0; i < PHY_MAX_ADDR; i++) {
137 struct phy_device *phydev = bus->phymap[i];
138
139 if (phydev) {
Michal Simekfca1e842016-11-16 08:41:01 +0100140 printf("%x - %s", i, phydev->drv->name);
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500141
142 if (phydev->dev)
143 printf(" <--> %s\n", phydev->dev->name);
144 else
145 printf("\n");
146 }
147 }
148 }
149}
150
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400151int miiphy_set_current_dev(const char *devname)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200152{
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200153 struct mii_dev *dev;
154
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500155 dev = miiphy_get_dev_by_name(devname);
Mike Frysinger24a90082010-07-27 18:35:09 -0400156 if (dev) {
157 current_mii = dev;
158 return 0;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200159 }
160
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500161 printf("No such device: %s\n", devname);
162
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200163 return 1;
164}
165
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500166struct mii_dev *mdio_get_current_dev(void)
167{
168 return current_mii;
169}
170
Pankaj Bansal7c18fe82018-09-18 15:46:48 +0530171struct list_head *mdio_get_list_head(void)
172{
173 return &mii_devs;
174}
175
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500176struct phy_device *mdio_phydev_for_ethname(const char *ethname)
177{
178 struct list_head *entry;
179 struct mii_dev *bus;
180
181 list_for_each(entry, &mii_devs) {
182 int i;
183 bus = list_entry(entry, struct mii_dev, link);
184
185 for (i = 0; i < PHY_MAX_ADDR; i++) {
186 if (!bus->phymap[i] || !bus->phymap[i]->dev)
187 continue;
188
189 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
190 return bus->phymap[i];
191 }
192 }
193
194 printf("%s is not a known ethernet\n", ethname);
195 return NULL;
196}
197
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400198const char *miiphy_get_current_dev(void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200199{
200 if (current_mii)
201 return current_mii->name;
202
203 return NULL;
204}
205
Mike Frysingerbd17e7a2010-07-27 18:35:10 -0400206static struct mii_dev *miiphy_get_active_dev(const char *devname)
207{
208 /* If the current mii is the one we want, return it */
209 if (current_mii)
210 if (strcmp(current_mii->name, devname) == 0)
211 return current_mii;
212
213 /* Otherwise, set the active one to the one we want */
214 if (miiphy_set_current_dev(devname))
215 return NULL;
216 else
217 return current_mii;
218}
219
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200220/*****************************************************************************
221 *
222 * Read to variable <value> from the PHY attached to device <devname>,
223 * use PHY address <addr> and register <reg>.
224 *
Andy Fleming896a7172011-10-31 09:46:13 -0500225 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
226 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200227 * Returns:
228 * 0 on success
229 */
Wolfgang Denk934fcb62011-12-07 08:35:14 +0100230int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500231 unsigned short *value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200232{
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500233 struct mii_dev *bus;
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000234 int ret;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200235
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500236 bus = miiphy_get_active_dev(devname);
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000237 if (!bus)
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500238 return 1;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200239
Anatolij Gustschin1bbce3a2011-04-30 02:17:44 +0000240 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
241 if (ret < 0)
242 return 1;
243
244 *value = (unsigned short)ret;
245 return 0;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200246}
247
248/*****************************************************************************
249 *
250 * Write <value> to the PHY attached to device <devname>,
251 * use PHY address <addr> and register <reg>.
252 *
Andy Fleming896a7172011-10-31 09:46:13 -0500253 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
254 *
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200255 * Returns:
256 * 0 on success
257 */
Wolfgang Denk934fcb62011-12-07 08:35:14 +0100258int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -0500259 unsigned short value)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200260{
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500261 struct mii_dev *bus;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200262
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500263 bus = miiphy_get_active_dev(devname);
264 if (bus)
265 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200266
Mike Frysinger24a90082010-07-27 18:35:09 -0400267 return 1;
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200268}
269
270/*****************************************************************************
271 *
272 * Print out list of registered MII capable devices.
273 */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500274void miiphy_listdev(void)
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200275{
276 struct list_head *entry;
277 struct mii_dev *dev;
278
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500279 puts("MII devices: ");
280 list_for_each(entry, &mii_devs) {
281 dev = list_entry(entry, struct mii_dev, link);
282 printf("'%s' ", dev->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200283 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500284 puts("\n");
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200285
286 if (current_mii)
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500287 printf("Current device: '%s'\n", current_mii->name);
Marian Balakowiczaab8c492005-10-28 22:30:33 +0200288}
289
wdenkc6097192002-11-03 00:24:07 +0000290/*****************************************************************************
291 *
292 * Read the OUI, manufacture's model number, and revision number.
293 *
294 * OUI: 22 bits (unsigned int)
295 * Model: 6 bits (unsigned char)
296 * Revision: 4 bits (unsigned char)
297 *
Andy Fleming896a7172011-10-31 09:46:13 -0500298 * This API is deprecated.
299 *
wdenkc6097192002-11-03 00:24:07 +0000300 * Returns:
301 * 0 on success
302 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400303int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000304 unsigned char *model, unsigned char *rev)
305{
306 unsigned int reg = 0;
wdenkf4cec3f2003-12-06 23:20:41 +0000307 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000308
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500309 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
310 debug("PHY ID register 2 read failed\n");
311 return -1;
wdenkc6097192002-11-03 00:24:07 +0000312 }
wdenkf4cec3f2003-12-06 23:20:41 +0000313 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000314
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500315 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900316
wdenkc6097192002-11-03 00:24:07 +0000317 if (reg == 0xFFFF) {
318 /* No physical device present at this address */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500319 return -1;
wdenkc6097192002-11-03 00:24:07 +0000320 }
321
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500322 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
323 debug("PHY ID register 1 read failed\n");
324 return -1;
wdenkc6097192002-11-03 00:24:07 +0000325 }
wdenkf4cec3f2003-12-06 23:20:41 +0000326 reg |= tmp << 16;
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500327 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
Shinya Kuribayashi49e42af2008-01-19 10:25:59 +0900328
Larry Johnson81b974b2007-10-31 11:21:29 -0500329 *oui = (reg >> 10);
330 *model = (unsigned char)((reg >> 4) & 0x0000003F);
331 *rev = (unsigned char)(reg & 0x0000000F);
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500332 return 0;
wdenkc6097192002-11-03 00:24:07 +0000333}
334
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500335#ifndef CONFIG_PHYLIB
wdenkc6097192002-11-03 00:24:07 +0000336/*****************************************************************************
337 *
338 * Reset the PHY.
Andy Fleming896a7172011-10-31 09:46:13 -0500339 *
340 * This API is deprecated. Use PHYLIB.
341 *
wdenkc6097192002-11-03 00:24:07 +0000342 * Returns:
343 * 0 on success
344 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400345int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000346{
347 unsigned short reg;
Stefan Roese2e536362010-02-02 13:43:48 +0100348 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000349
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500350 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
351 debug("PHY status read failed\n");
352 return -1;
Wolfgang Denk8ff63c22005-08-12 23:15:53 +0200353 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500354 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
355 debug("PHY reset failed\n");
356 return -1;
wdenkc6097192002-11-03 00:24:07 +0000357 }
Tom Rini6c851512022-03-18 08:38:26 -0400358#if CONFIG_PHY_RESET_DELAY > 0
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500359 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
wdenk2cefd152004-02-08 22:55:38 +0000360#endif
wdenkc6097192002-11-03 00:24:07 +0000361 /*
362 * Poll the control register for the reset bit to go to 0 (it is
363 * auto-clearing). This should happen within 0.5 seconds per the
364 * IEEE spec.
365 */
wdenkc6097192002-11-03 00:24:07 +0000366 reg = 0x8000;
Stefan Roese2e536362010-02-02 13:43:48 +0100367 while (((reg & 0x8000) != 0) && timeout--) {
Mike Frysingerd63ee712010-12-23 15:40:12 -0500368 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
Stefan Roese2e536362010-02-02 13:43:48 +0100369 debug("PHY status read failed\n");
370 return -1;
wdenkc6097192002-11-03 00:24:07 +0000371 }
Stefan Roese2e536362010-02-02 13:43:48 +0100372 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000373 }
374 if ((reg & 0x8000) == 0) {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500375 return 0;
wdenkc6097192002-11-03 00:24:07 +0000376 } else {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500377 puts("PHY reset timed out\n");
378 return -1;
wdenkc6097192002-11-03 00:24:07 +0000379 }
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500380 return 0;
wdenkc6097192002-11-03 00:24:07 +0000381}
Andy Flemingaecf6fc2011-04-08 02:10:27 -0500382#endif /* !PHYLIB */
wdenkc6097192002-11-03 00:24:07 +0000383
wdenkc6097192002-11-03 00:24:07 +0000384/*****************************************************************************
385 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500386 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000387 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400388int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000389{
Dongpo Lice290242016-08-22 21:03:29 +0800390 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000391
wdenkeec9a3d2004-03-23 23:20:24 +0000392#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500393 u16 btsr;
394
395 /*
396 * Check for 1000BASE-X. If it is supported, then assume that the speed
397 * is 1000.
398 */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500399 if (miiphy_is_1000base_x(devname, addr))
Larry Johnson966a80b2007-11-01 08:46:50 -0500400 return _1000BASET;
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500401
Larry Johnson966a80b2007-11-01 08:46:50 -0500402 /*
403 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
404 */
405 /* Check for 1000BASE-T. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500406 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
407 printf("PHY 1000BT status");
Larry Johnson966a80b2007-11-01 08:46:50 -0500408 goto miiphy_read_failed;
409 }
410 if (btsr != 0xFFFF &&
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500411 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
Larry Johnson966a80b2007-11-01 08:46:50 -0500412 return _1000BASET;
wdenkeec9a3d2004-03-23 23:20:24 +0000413#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000414
wdenke3a06802004-06-06 23:13:55 +0000415 /* Check Basic Management Control Register first. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500416 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
417 printf("PHY speed");
Larry Johnson966a80b2007-11-01 08:46:50 -0500418 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000419 }
wdenke3a06802004-06-06 23:13:55 +0000420 /* Check if auto-negotiation is on. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500421 if (bmcr & BMCR_ANENABLE) {
wdenke3a06802004-06-06 23:13:55 +0000422 /* Get auto-negotiation results. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500423 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
424 printf("PHY AN speed");
Larry Johnson966a80b2007-11-01 08:46:50 -0500425 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000426 }
Dongpo Lice290242016-08-22 21:03:29 +0800427
428 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
429 puts("PHY AN adv speed");
430 goto miiphy_read_failed;
431 }
432 return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000433 }
434 /* Get speed from basic control settings. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500435 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
wdenke3a06802004-06-06 23:13:55 +0000436
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200437miiphy_read_failed:
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500438 printf(" read failed, assuming 10BASE-T\n");
Larry Johnson966a80b2007-11-01 08:46:50 -0500439 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000440}
441
wdenkc6097192002-11-03 00:24:07 +0000442/*****************************************************************************
443 *
Larry Johnson966a80b2007-11-01 08:46:50 -0500444 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000445 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400446int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000447{
Dongpo Lice290242016-08-22 21:03:29 +0800448 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000449
wdenkeec9a3d2004-03-23 23:20:24 +0000450#if defined(CONFIG_PHY_GIGE)
Larry Johnson966a80b2007-11-01 08:46:50 -0500451 u16 btsr;
452
453 /* Check for 1000BASE-X. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500454 if (miiphy_is_1000base_x(devname, addr)) {
Larry Johnson966a80b2007-11-01 08:46:50 -0500455 /* 1000BASE-X */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500456 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
457 printf("1000BASE-X PHY AN duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500458 goto miiphy_read_failed;
wdenked2ac4b2004-03-14 18:23:55 +0000459 }
460 }
Larry Johnson966a80b2007-11-01 08:46:50 -0500461 /*
462 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
463 */
464 /* Check for 1000BASE-T. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500465 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
466 printf("PHY 1000BT status");
Larry Johnson966a80b2007-11-01 08:46:50 -0500467 goto miiphy_read_failed;
468 }
469 if (btsr != 0xFFFF) {
470 if (btsr & PHY_1000BTSR_1000FD) {
471 return FULL;
472 } else if (btsr & PHY_1000BTSR_1000HD) {
473 return HALF;
474 }
475 }
wdenkeec9a3d2004-03-23 23:20:24 +0000476#endif /* CONFIG_PHY_GIGE */
wdenked2ac4b2004-03-14 18:23:55 +0000477
wdenke3a06802004-06-06 23:13:55 +0000478 /* Check Basic Management Control Register first. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500479 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
480 puts("PHY duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500481 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000482 }
wdenke3a06802004-06-06 23:13:55 +0000483 /* Check if auto-negotiation is on. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500484 if (bmcr & BMCR_ANENABLE) {
wdenke3a06802004-06-06 23:13:55 +0000485 /* Get auto-negotiation results. */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500486 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
487 puts("PHY AN duplex");
Larry Johnson966a80b2007-11-01 08:46:50 -0500488 goto miiphy_read_failed;
wdenke3a06802004-06-06 23:13:55 +0000489 }
Dongpo Lice290242016-08-22 21:03:29 +0800490
491 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
492 puts("PHY AN adv duplex");
493 goto miiphy_read_failed;
494 }
495 return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
Larry Johnson966a80b2007-11-01 08:46:50 -0500496 FULL : HALF;
wdenke3a06802004-06-06 23:13:55 +0000497 }
498 /* Get speed from basic control settings. */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500499 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
Larry Johnson966a80b2007-11-01 08:46:50 -0500500
Michael Zaidman6dbca5f2010-02-28 16:28:25 +0200501miiphy_read_failed:
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500502 printf(" read failed, assuming half duplex\n");
Larry Johnson966a80b2007-11-01 08:46:50 -0500503 return HALF;
504}
wdenke3a06802004-06-06 23:13:55 +0000505
Larry Johnson966a80b2007-11-01 08:46:50 -0500506/*****************************************************************************
507 *
508 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
509 * 1000BASE-T, or on error.
510 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400511int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson966a80b2007-11-01 08:46:50 -0500512{
513#if defined(CONFIG_PHY_GIGE)
514 u16 exsr;
515
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500516 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
517 printf("PHY extended status read failed, assuming no "
Larry Johnson966a80b2007-11-01 08:46:50 -0500518 "1000BASE-X\n");
519 return 0;
520 }
Mike Frysingerd63ee712010-12-23 15:40:12 -0500521 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
Larry Johnson966a80b2007-11-01 08:46:50 -0500522#else
523 return 0;
524#endif
wdenkc6097192002-11-03 00:24:07 +0000525}
526
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200527#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenk49c3f672003-10-08 22:33:00 +0000528/*****************************************************************************
529 *
530 * Determine link status
531 */
Mike Frysinger5ff5fdb2010-07-27 18:35:08 -0400532int miiphy_link(const char *devname, unsigned char addr)
wdenk49c3f672003-10-08 22:33:00 +0000533{
534 unsigned short reg;
535
wdenk145d2c12004-04-15 21:48:45 +0000536 /* dummy read; needed to latch some phys */
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500537 (void)miiphy_read(devname, addr, MII_BMSR, &reg);
538 if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
539 puts("MII_BMSR read failed, assuming no link\n");
540 return 0;
wdenk49c3f672003-10-08 22:33:00 +0000541 }
542
543 /* Determine if a link is active */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500544 if ((reg & BMSR_LSTATUS) != 0) {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500545 return 1;
wdenk49c3f672003-10-08 22:33:00 +0000546 } else {
Andy Flemingaea0c3e2011-04-07 14:38:35 -0500547 return 0;
wdenk49c3f672003-10-08 22:33:00 +0000548 }
549}
550#endif