Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Nobuhiro Iwamatsu | 868b52b | 2008-03-25 17:11:24 +0900 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2007,2008 |
| 4 | * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
Nobuhiro Iwamatsu | 868b52b | 2008-03-25 17:11:24 +0900 | [diff] [blame] | 5 | */ |
| 6 | |
Nobuhiro Iwamatsu | 868b52b | 2008-03-25 17:11:24 +0900 | [diff] [blame] | 7 | #include <ide.h> |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 8 | #include <init.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 9 | #include <net.h> |
Nobuhiro Iwamatsu | 4b366be | 2008-09-11 17:28:18 +0900 | [diff] [blame] | 10 | #include <netdev.h> |
Nobuhiro Iwamatsu | 868b52b | 2008-03-25 17:11:24 +0900 | [diff] [blame] | 11 | #include <asm/processor.h> |
Nobuhiro Iwamatsu | 51fe0b2 | 2008-06-17 16:27:44 +0900 | [diff] [blame] | 12 | #include <asm/io.h> |
Nobuhiro Iwamatsu | 868b52b | 2008-03-25 17:11:24 +0900 | [diff] [blame] | 13 | |
| 14 | int checkboard(void) |
| 15 | { |
| 16 | puts("BOARD: Renesas Solutions R2D Plus\n"); |
| 17 | return 0; |
| 18 | } |
| 19 | |
| 20 | int board_init(void) |
| 21 | { |
Nobuhiro Iwamatsu | 868b52b | 2008-03-25 17:11:24 +0900 | [diff] [blame] | 22 | return 0; |
| 23 | } |
| 24 | |
| 25 | int board_late_init(void) |
| 26 | { |
| 27 | return 0; |
| 28 | } |
| 29 | |
Nobuhiro Iwamatsu | 51fe0b2 | 2008-06-17 16:27:44 +0900 | [diff] [blame] | 30 | #define FPGA_BASE 0xA4000000 |
| 31 | #define FPGA_CFCTL (FPGA_BASE + 0x04) |
| 32 | #define CFCTL_EN (0x432) |
| 33 | #define FPGA_CFPOW (FPGA_BASE + 0x06) |
| 34 | #define CFPOW_ON (0x02) |
| 35 | #define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A) |
| 36 | #define CFCDINTCLR_EN (0x01) |
Nobuhiro Iwamatsu | 868b52b | 2008-03-25 17:11:24 +0900 | [diff] [blame] | 37 | |
Nobuhiro Iwamatsu | 51fe0b2 | 2008-06-17 16:27:44 +0900 | [diff] [blame] | 38 | void ide_set_reset(int idereset) |
Nobuhiro Iwamatsu | 868b52b | 2008-03-25 17:11:24 +0900 | [diff] [blame] | 39 | { |
| 40 | /* if reset = 1 IDE reset will be asserted */ |
Nobuhiro Iwamatsu | 51fe0b2 | 2008-06-17 16:27:44 +0900 | [diff] [blame] | 41 | if (idereset) { |
| 42 | outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */ |
| 43 | outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */ |
| 44 | outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */ |
Nobuhiro Iwamatsu | 868b52b | 2008-03-25 17:11:24 +0900 | [diff] [blame] | 45 | } |
| 46 | } |
| 47 | |
Marek Vasut | 2e4b09c | 2020-05-09 16:07:18 +0200 | [diff] [blame] | 48 | #ifndef CONFIG_DM_ETH |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 49 | int board_eth_init(struct bd_info *bis) |
Ben Warren | 65b8623 | 2008-08-31 21:41:08 -0700 | [diff] [blame] | 50 | { |
| 51 | return pci_eth_init(bis); |
| 52 | } |
Marek Vasut | 2e4b09c | 2020-05-09 16:07:18 +0200 | [diff] [blame] | 53 | #endif |