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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu868b52b2008-03-25 17:11:24 +09002/*
3 * Copyright (C) 2007,2008
4 * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu868b52b2008-03-25 17:11:24 +09005 */
6
7#include <common.h>
8#include <ide.h>
Simon Glassa7b51302019-11-14 12:57:46 -07009#include <init.h>
Nobuhiro Iwamatsu4b366be2008-09-11 17:28:18 +090010#include <netdev.h>
Nobuhiro Iwamatsu868b52b2008-03-25 17:11:24 +090011#include <asm/processor.h>
Nobuhiro Iwamatsu51fe0b22008-06-17 16:27:44 +090012#include <asm/io.h>
Nobuhiro Iwamatsu868b52b2008-03-25 17:11:24 +090013
14int checkboard(void)
15{
16 puts("BOARD: Renesas Solutions R2D Plus\n");
17 return 0;
18}
19
20int board_init(void)
21{
Nobuhiro Iwamatsu868b52b2008-03-25 17:11:24 +090022 return 0;
23}
24
25int board_late_init(void)
26{
27 return 0;
28}
29
Nobuhiro Iwamatsu51fe0b22008-06-17 16:27:44 +090030#define FPGA_BASE 0xA4000000
31#define FPGA_CFCTL (FPGA_BASE + 0x04)
32#define CFCTL_EN (0x432)
33#define FPGA_CFPOW (FPGA_BASE + 0x06)
34#define CFPOW_ON (0x02)
35#define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A)
36#define CFCDINTCLR_EN (0x01)
Nobuhiro Iwamatsu868b52b2008-03-25 17:11:24 +090037
Nobuhiro Iwamatsu51fe0b22008-06-17 16:27:44 +090038void ide_set_reset(int idereset)
Nobuhiro Iwamatsu868b52b2008-03-25 17:11:24 +090039{
40 /* if reset = 1 IDE reset will be asserted */
Nobuhiro Iwamatsu51fe0b22008-06-17 16:27:44 +090041 if (idereset) {
42 outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */
43 outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */
44 outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */
Nobuhiro Iwamatsu868b52b2008-03-25 17:11:24 +090045 }
46}
47
Ben Warren65b86232008-08-31 21:41:08 -070048int board_eth_init(bd_t *bis)
49{
50 return pci_eth_init(bis);
51}