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git01.mediatek.com / filogic / uboot / 1d52512b2e81dbfae2cf11f6ef886bc22a7cd4d8 / . / arch / arm / dts / rk3399-u-boot.dtsi
blob: 2bec139d8338216a013386beb5cbfab2f83039d1 [file] [log] [blame]
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
4 */
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]5#include "rockchip-u-boot.dtsi"
6
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]7/ {
8 aliases {
9 mmc0 = &sdhci;
10 mmc1 = &sdmmc;
Jagan Teki77c31a82020-05-09 22:26:23 +0530[diff] [blame]11 pci0 = &pcie0;
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]12 spi1 = &spi1;
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]13 };
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]14
Jonas Karlman747c9572024-04-30 15:30:18 +0000[diff] [blame]15 chosen {
16 u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
17 };
18
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]19 pmusgrf: syscon@ff330000 {
20 compatible = "rockchip,rk3399-pmusgrf", "syscon";
21 reg = <0x0 0xff330000 0x0 0xe3d4>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]22 bootph-all;
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]23 };
24
25 cic: syscon@ff620000 {
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]26 compatible = "rockchip,rk3399-cic", "syscon";
27 reg = <0x0 0xff620000 0x0 0x100>;
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]28 bootph-all;
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]29 };
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]30};
31
Quentin Schulz12df9cf2022-09-02 15:10:54 +0200[diff] [blame]32#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]33&binman {
Simon Glassf1268222023-01-07 14:07:17 -0700[diff] [blame]34 multiple-images;
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]35 rom {
36 filename = "u-boot.rom";
37 size = <0x400000>;
38 pad-byte = <0xff>;
39
40 mkimage {
41 args = "-n rk3399 -T rkspi";
42 u-boot-spl {
43 };
44 };
45 u-boot-img {
46 offset = <0x40000>;
47 };
48 u-boot {
49 offset = <0x300000>;
50 };
51 fdtmap {
52 };
53 };
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]54};
Simon Glassf1268222023-01-07 14:07:17 -0700[diff] [blame]55#endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]56
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]57&cru {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]58 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]59};
60
Jonas Karlmane872ddc2024-05-01 16:22:22 +0000[diff] [blame]61&dfi {
62 bootph-all;
63};
64
65&dmc {
66 reg = <0x0 0xffa80000 0x0 0x0800
67 0x0 0xffa80800 0x0 0x1800
68 0x0 0xffa82000 0x0 0x2000
69 0x0 0xffa84000 0x0 0x1000
70 0x0 0xffa88000 0x0 0x0800
71 0x0 0xffa88800 0x0 0x1800
72 0x0 0xffa8a000 0x0 0x2000
73 0x0 0xffa8c000 0x0 0x1000>;
74 bootph-all;
75 status = "okay";
76};
77
Yifeng Zhaod7e4c322021-11-01 12:43:47 +0800[diff] [blame]78&emmc_phy {
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]79 bootph-pre-ram;
80 bootph-some-ram;
Yifeng Zhaod7e4c322021-11-01 12:43:47 +0800[diff] [blame]81};
82
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]83&grf {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]84 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]85};
86
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]87&pcfg_pull_none {
88 bootph-all;
89};
90
91&pcfg_pull_up {
92 bootph-all;
93};
94
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]95&pinctrl {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]96 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]97};
98
Jagan Teki9b545852019-07-16 17:27:34 +0530[diff] [blame]99&pmu {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]100 bootph-all;
Jagan Teki9b545852019-07-16 17:27:34 +0530[diff] [blame]101};
102
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]103&pmucru {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]104 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]105};
106
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]107&pmugrf {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]108 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]109};
110
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]111&sdhci {
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]112 bootph-pre-ram;
113 bootph-some-ram;
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]114 max-frequency = <200000000>;
115
116 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
Jonas Karlmanf79c5372023-05-06 17:41:11 +0000[diff] [blame]117 u-boot,spl-fifo-mode;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]118};
119
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]120&sdmmc {
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]121 bootph-pre-ram;
122 bootph-some-ram;
Deepak Das4ef2ded2020-04-15 08:55:24 +0530[diff] [blame]123
124 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
125 u-boot,spl-fifo-mode;
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]126};
Jagan Teki60c5fed2019-05-07 23:51:51 +0530[diff] [blame]127
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]128&sdmmc_bus4 {
129 bootph-pre-ram;
130 bootph-some-ram;
131};
132
133&sdmmc_cd {
134 bootph-pre-ram;
135 bootph-some-ram;
136};
137
138&sdmmc_clk {
139 bootph-pre-ram;
140 bootph-some-ram;
141};
142
143&sdmmc_cmd {
144 bootph-pre-ram;
145 bootph-some-ram;
146};
147
Quentin Schulz419beef2024-06-17 15:10:08 +0200[diff] [blame]148&spi1 {
149 bootph-pre-ram;
150 bootph-some-ram;
151};
152
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]153&spi1_clk {
154 bootph-pre-ram;
155 bootph-some-ram;
156};
157
158&spi1_cs0 {
159 bootph-pre-ram;
160 bootph-some-ram;
161};
162
163&spi1_rx {
164 bootph-pre-ram;
165 bootph-some-ram;
166};
167
168&spi1_tx {
169 bootph-pre-ram;
170 bootph-some-ram;
Jagan Teki60c5fed2019-05-07 23:51:51 +0530[diff] [blame]171};
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]172
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]173&uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]174 bootph-all;
Jonas Karlmanfab0bd32024-04-30 15:30:23 +0000[diff] [blame]175 clock-frequency = <24000000>;
176};
177
178&uart2c_xfer {
179 bootph-pre-sram;
180 bootph-pre-ram;
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]181};
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]182
183&vopb {
Jonas Karlman98519912024-04-30 15:30:21 +0000[diff] [blame]184 bootph-some-ram;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]185};
186
187&vopl {
Jonas Karlman98519912024-04-30 15:30:21 +0000[diff] [blame]188 bootph-some-ram;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]189};
Jonas Karlmane872ddc2024-05-01 16:22:22 +0000[diff] [blame]190
191&xin24m {
192 bootph-all;
193};