Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 2 | /* |
Hannes Schmelzer | 2d9a3cd | 2018-01-09 19:01:32 +0100 | [diff] [blame] | 3 | * Copyright (C) 2013-2018 Hannes Schmelzer <oe5hpm@oevsv.at> - |
| 4 | * B&R Industrial Automation GmbH - http://www.br-automation.com |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef AM335X_FB_H |
| 8 | #define AM335X_FB_H |
| 9 | |
Dario Binacchi | 017b469 | 2020-02-22 14:05:45 +0100 | [diff] [blame] | 10 | #if !CONFIG_IS_ENABLED(DM_VIDEO) |
| 11 | |
Dario Binacchi | 3d9a713 | 2020-02-22 14:05:37 +0100 | [diff] [blame] | 12 | #define HSVS_CONTROL BIT(25) /* |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 13 | * 0 = lcd_lp and lcd_fp are driven on |
| 14 | * opposite edges of pixel clock than |
| 15 | * the lcd_pixel_o |
| 16 | * 1 = lcd_lp and lcd_fp are driven |
| 17 | * according to bit 24 Note that this |
| 18 | * bit MUST be set to '0' for Passive |
| 19 | * Matrix displays the edge timing is |
| 20 | * fixed |
| 21 | */ |
Dario Binacchi | 3d9a713 | 2020-02-22 14:05:37 +0100 | [diff] [blame] | 22 | #define HSVS_RISEFALL BIT(24) /* |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 23 | * 0 = lcd_lp and lcd_fp are driven on |
| 24 | * the rising edge of pixel clock (bit |
| 25 | * 25 must be set to 1) |
| 26 | * 1 = lcd_lp and lcd_fp are driven on |
| 27 | * the falling edge of pixel clock (bit |
| 28 | * 25 must be set to 1) |
| 29 | */ |
Dario Binacchi | 3d9a713 | 2020-02-22 14:05:37 +0100 | [diff] [blame] | 30 | #define DE_INVERT BIT(23) /* |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 31 | * 0 = DE is low-active |
| 32 | * 1 = DE is high-active |
| 33 | */ |
Dario Binacchi | 3d9a713 | 2020-02-22 14:05:37 +0100 | [diff] [blame] | 34 | #define PXCLK_INVERT BIT(22) /* |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 35 | * 0 = pix-clk is high-active |
| 36 | * 1 = pic-clk is low-active |
| 37 | */ |
Dario Binacchi | 3d9a713 | 2020-02-22 14:05:37 +0100 | [diff] [blame] | 38 | #define HSYNC_INVERT BIT(21) /* |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 39 | * 0 = HSYNC is active high |
| 40 | * 1 = HSYNC is avtive low |
| 41 | */ |
Dario Binacchi | 3d9a713 | 2020-02-22 14:05:37 +0100 | [diff] [blame] | 42 | #define VSYNC_INVERT BIT(20) /* |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 43 | * 0 = VSYNC is active high |
| 44 | * 1 = VSYNC is active low |
| 45 | */ |
| 46 | |
| 47 | struct am335x_lcdpanel { |
| 48 | unsigned int hactive; /* Horizontal active area */ |
| 49 | unsigned int vactive; /* Vertical active area */ |
| 50 | unsigned int bpp; /* bits per pixel */ |
| 51 | unsigned int hfp; /* Horizontal front porch */ |
| 52 | unsigned int hbp; /* Horizontal back porch */ |
| 53 | unsigned int hsw; /* Horizontal Sync Pulse Width */ |
| 54 | unsigned int vfp; /* Vertical front porch */ |
| 55 | unsigned int vbp; /* Vertical back porch */ |
| 56 | unsigned int vsw; /* Vertical Sync Pulse Width */ |
Hannes Schmelzer | 6e1e428 | 2018-01-09 19:01:34 +0100 | [diff] [blame] | 57 | unsigned int pxl_clk; /* Pixel clock */ |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 58 | unsigned int pol; /* polarity of sync, clock signals */ |
Hannes Petermaier | 169aa70 | 2015-02-03 13:22:23 +0100 | [diff] [blame] | 59 | unsigned int pup_delay; /* |
| 60 | * time in ms after power on to |
| 61 | * initialization of lcd-controller |
| 62 | * (VCC ramp up time) |
| 63 | */ |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 64 | unsigned int pon_delay; /* |
Hannes Petermaier | 169aa70 | 2015-02-03 13:22:23 +0100 | [diff] [blame] | 65 | * time in ms after initialization of |
| 66 | * lcd-controller (pic stabilization) |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 67 | */ |
| 68 | void (*panel_power_ctrl)(int); /* fp for power on/off display */ |
| 69 | }; |
| 70 | |
| 71 | int am335xfb_init(struct am335x_lcdpanel *panel); |
| 72 | |
Dario Binacchi | 017b469 | 2020-02-22 14:05:45 +0100 | [diff] [blame] | 73 | #endif /* CONFIG_DM_VIDEO */ |
| 74 | |
Hannes Petermaier | f04e999 | 2014-03-06 14:39:06 +0100 | [diff] [blame] | 75 | #endif /* AM335X_FB_H */ |