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git01.mediatek.com / filogic / uboot / 1842283c663b0ffd5c12819413e519d67e0758a1 / . / configs / phycore-imx8mp_defconfig
blob: 7eb958fbebb862690573cdc775ceae178d5d0e31 [file] [log] [blame]
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_IMX8M=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]3CONFIG_TEXT_BASE=0x40200000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x2000000
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]5CONFIG_SPL_GPIO=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini800a8e62024-07-01 08:49:37 -0600[diff] [blame]8CONFIG_PHYTEC_SOM_DETECTION=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]9CONFIG_ENV_SIZE=0x10000
10CONFIG_ENV_OFFSET=0x3C0000
11CONFIG_SYS_I2C_MXC_I2C1=y
12CONFIG_DM_GPIO=y
Yannic Moog7f8e7c32024-05-28 13:25:00 +0200[diff] [blame]13CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-phyboard-pollux-rdk"
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]14CONFIG_SPL_TEXT_BASE=0x920000
15CONFIG_TARGET_PHYCORE_IMX8MP=y
Benjamin Hahn28540b72024-07-16 22:11:27 -0700[diff] [blame]16CONFIG_OF_LIBFDT_OVERLAY=y
Tom Rini3d2b97c2023-05-29 10:43:26 -0400[diff] [blame]17CONFIG_SYS_MONITOR_LEN=524288
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]18CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]19CONFIG_SPL_SERIAL=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]20CONFIG_SPL_DRIVERS_MISC=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]21CONFIG_SPL_STACK=0x960000
Tom Rinib9dc6842024-04-22 17:24:09 -0600[diff] [blame]22CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
23CONFIG_SPL_BSS_START_ADDR=0x98fc00
24CONFIG_SPL_BSS_MAX_SIZE=0x400
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]25CONFIG_SPL=y
Leonard Anderweit4181b3d2024-03-12 15:30:31 +0100[diff] [blame]26CONFIG_ENV_OFFSET_REDUND=0x3e0000
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]27CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]28CONFIG_SYS_LOAD_ADDR=0x40480000
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]29CONFIG_FIT=y
30CONFIG_FIT_EXTERNAL_OFFSET=0x3000
31CONFIG_SPL_LOAD_FIT=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]32CONFIG_OF_SYSTEM_SETUP=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]33CONFIG_DEFAULT_FDT_FILE="oftree"
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]34CONFIG_SYS_CBSIZE=2048
35CONFIG_SYS_PBSIZE=2074
Leonard Anderweit23ec2d42024-07-05 14:11:21 +0200[diff] [blame]36CONFIG_ARCH_MISC_INIT=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]37CONFIG_BOARD_LATE_INIT=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]38CONFIG_SPL_MAX_SIZE=0x26000
Teresa Remmetfe1f1072021-07-07 12:58:01 +0000[diff] [blame]39CONFIG_SPL_BOARD_INIT=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]40CONFIG_SPL_BOOTROM_SUPPORT=y
41CONFIG_SPL_SYS_MALLOC_SIMPLE=y
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]42# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Simon Glass67e3fca2023-09-26 08:14:16 -0600[diff] [blame]43CONFIG_SPL_SYS_MALLOC=y
44CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
45CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000
46CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
Simon Glass18422832024-08-22 07:55:00 -0600[diff] [blame^]47CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]48CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
49CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
Leonard Anderweit23ec2d42024-07-05 14:11:21 +0200[diff] [blame]50# CONFIG_SPL_CRYPTO is not set
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]51CONFIG_SPL_I2C=y
Simon Glasse91ac4c2021-07-10 21:14:24 -0600[diff] [blame]52CONFIG_SPL_POWER=y
Simon Glass1ba1d4e2021-07-10 21:14:28 -0600[diff] [blame]53CONFIG_SPL_WATCHDOG=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]54CONFIG_HUSH_PARSER=y
Tom Rinic4359852023-10-02 10:35:27 -0400[diff] [blame]55CONFIG_SYS_PROMPT="u-boot=> "
Yannic Moog170142a2024-07-31 09:53:03 -0300[diff] [blame]56CONFIG_CMD_ERASEENV=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]57# CONFIG_CMD_CRC32 is not set
58CONFIG_CMD_EEPROM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]59CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
60CONFIG_SYS_EEPROM_SIZE=4096
61CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
62CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]63CONFIG_CMD_CLK=y
64CONFIG_CMD_FUSE=y
65CONFIG_CMD_GPIO=y
66CONFIG_CMD_I2C=y
67CONFIG_CMD_MMC=y
Benjamin Hahn00176322024-02-08 13:03:09 +0100[diff] [blame]68CONFIG_CMD_USB=y
Benjamin Hahn46eab9c2024-02-08 13:03:11 +0100[diff] [blame]69CONFIG_CMD_USB_SDP=y
Benjamin Hahn887d2c92024-02-08 13:03:10 +0100[diff] [blame]70CONFIG_CMD_USB_MASS_STORAGE=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]71CONFIG_CMD_DHCP=y
72CONFIG_CMD_MII=y
73CONFIG_CMD_PING=y
74CONFIG_CMD_CACHE=y
75CONFIG_CMD_REGULATOR=y
76CONFIG_CMD_EXT2=y
77CONFIG_CMD_EXT4=y
78CONFIG_CMD_EXT4_WRITE=y
79CONFIG_CMD_FAT=y
Benjamin Hahn28540b72024-07-16 22:11:27 -0700[diff] [blame]80CONFIG_CMD_FS_GENERIC=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]81CONFIG_OF_CONTROL=y
82CONFIG_SPL_OF_CONTROL=y
83CONFIG_ENV_OVERWRITE=y
84CONFIG_ENV_IS_IN_MMC=y
Leonard Anderweit4181b3d2024-03-12 15:30:31 +0100[diff] [blame]85CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]86CONFIG_SYS_RELOC_GD_ENV_ADDR=y
87CONFIG_SYS_MMC_ENV_DEV=2
88CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
Teresa Remmet7de60a62021-07-07 12:58:00 +0000[diff] [blame]89CONFIG_NET_RANDOM_ETHADDR=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]90CONFIG_SPL_DM=y
91CONFIG_CLK_COMPOSITE_CCF=y
92CONFIG_CLK_IMX8MP=y
Leonard Anderweit23ec2d42024-07-05 14:11:21 +0200[diff] [blame]93CONFIG_FSL_CAAM=y
Benjamin Hahn46eab9c2024-02-08 13:03:11 +0100[diff] [blame]94CONFIG_USB_FUNCTION_FASTBOOT=y
95CONFIG_FASTBOOT_BUF_ADDR=0x42800000
96CONFIG_FASTBOOT_BUF_SIZE=0x13000000
97CONFIG_FASTBOOT_FLASH=y
98CONFIG_FASTBOOT_UUU_SUPPORT=y
99CONFIG_FASTBOOT_FLASH_MMC_DEV=2
100CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y
101CONFIG_FASTBOOT_MMC_BOOT1_NAME="mmc2boot0"
102CONFIG_FASTBOOT_MMC_BOOT2_NAME="mmc2boot1"
103CONFIG_FASTBOOT_MMC_USER_SUPPORT=y
104CONFIG_FASTBOOT_MMC_USER_NAME="mmc2"
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]105CONFIG_MXC_GPIO=y
106CONFIG_DM_I2C=y
Igor Opaniuk5f4de782021-02-09 13:52:44 +0200[diff] [blame]107# CONFIG_SPL_DM_I2C is not set
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]108CONFIG_SPL_SYS_I2C_LEGACY=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]109CONFIG_I2C_EEPROM=y
110CONFIG_SYS_I2C_EEPROM_ADDR=0x51
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]111CONFIG_SUPPORT_EMMC_BOOT=y
112CONFIG_MMC_IO_VOLTAGE=y
113CONFIG_MMC_UHS_SUPPORT=y
114CONFIG_MMC_HS400_ES_SUPPORT=y
115CONFIG_MMC_HS400_SUPPORT=y
Tom Rinid479a9f2021-11-07 22:59:37 -0500[diff] [blame]116CONFIG_FSL_USDHC=y
Teresa Remmet7de60a62021-07-07 12:58:00 +0000[diff] [blame]117CONFIG_PHYLIB=y
118CONFIG_PHY_TI_DP83867=y
Teresa Remmet7de60a62021-07-07 12:58:00 +0000[diff] [blame]119CONFIG_DM_ETH_PHY=y
120CONFIG_FEC_MXC=y
121CONFIG_RGMII=y
122CONFIG_MII=y
Benjamin Hahn00176322024-02-08 13:03:09 +0100[diff] [blame]123CONFIG_PHY_IMX8MQ_USB=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]124CONFIG_PINCTRL=y
125CONFIG_SPL_PINCTRL=y
126CONFIG_PINCTRL_IMX8M=y
Simon Glass31339412021-08-08 12:20:27 -0600[diff] [blame]127CONFIG_SPL_POWER_LEGACY=y
Benjamin Hahn46eab9c2024-02-08 13:03:11 +0100[diff] [blame]128CONFIG_POWER_DOMAIN=y
129CONFIG_IMX8M_POWER_DOMAIN=y
130CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y
Tom Rinib2f15962022-12-02 16:42:26 -0500[diff] [blame]131CONFIG_POWER_PCA9450=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]132CONFIG_DM_REGULATOR=y
133CONFIG_DM_REGULATOR_FIXED=y
134CONFIG_DM_REGULATOR_GPIO=y
Simon Glass31339412021-08-08 12:20:27 -0600[diff] [blame]135CONFIG_SPL_POWER_I2C=y
Peng Fan38aeb5f2022-06-11 20:20:58 +0800[diff] [blame]136CONFIG_DM_SERIAL=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]137CONFIG_MXC_UART=y
138CONFIG_SYSRESET=y
139CONFIG_SPL_SYSRESET=y
140CONFIG_SYSRESET_PSCI=y
141CONFIG_SYSRESET_WATCHDOG=y
142CONFIG_DM_THERMAL=y
Benjamin Hahn3d491612024-02-20 11:41:43 +0100[diff] [blame]143CONFIG_IMX_TMU=y
Benjamin Hahn00176322024-02-08 13:03:09 +0100[diff] [blame]144CONFIG_USB=y
Benjamin Hahn887d2c92024-02-08 13:03:10 +0100[diff] [blame]145CONFIG_DM_USB_GADGET=y
Benjamin Hahn00176322024-02-08 13:03:09 +0100[diff] [blame]146CONFIG_USB_XHCI_HCD=y
147CONFIG_USB_XHCI_DWC3=y
148CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
149CONFIG_USB_EHCI_HCD=y
150CONFIG_USB_DWC3=y
151CONFIG_USB_DWC3_GENERIC=y
152CONFIG_USB_STORAGE=y
Benjamin Hahn887d2c92024-02-08 13:03:10 +0100[diff] [blame]153CONFIG_USB_GADGET=y
Benjamin Hahn5f49b152024-05-03 09:00:38 +0200[diff] [blame]154CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
Benjamin Hahn887d2c92024-02-08 13:03:10 +0100[diff] [blame]155CONFIG_USB_GADGET_VENDOR_NUM=0x0525
156CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]157CONFIG_IMX_WATCHDOG=y
Leonard Anderweit23ec2d42024-07-05 14:11:21 +0200[diff] [blame]158# CONFIG_SPL_SHA_HW_ACCEL is not set