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git01.mediatek.com / filogic / uboot / d391d8baf49b1ca857d4ee81dbdad767ed1ed2f2 / . / configs / phycore-imx8mp_defconfig
blob: 2391aa4914104dd78ab4d02ddedf3d96639bef22 [file] [log] [blame]
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_IMX8M=y
3CONFIG_SYS_TEXT_BASE=0x40200000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x2000000
5CONFIG_SYS_MALLOC_F_LEN=0x10000
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]6CONFIG_SPL_GPIO=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]7CONFIG_SPL_LIBCOMMON_SUPPORT=y
8CONFIG_SPL_LIBGENERIC_SUPPORT=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]9CONFIG_ENV_SIZE=0x10000
10CONFIG_ENV_OFFSET=0x3C0000
11CONFIG_SYS_I2C_MXC_I2C1=y
12CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]13CONFIG_DEFAULT_DEVICE_TREE="imx8mp-phyboard-pollux-rdk"
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]14CONFIG_SPL_TEXT_BASE=0x920000
15CONFIG_TARGET_PHYCORE_IMX8MP=y
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]16CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]17CONFIG_SPL_SERIAL=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]18CONFIG_SPL_DRIVERS_MISC=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]19CONFIG_SPL=y
20CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]21CONFIG_SYS_LOAD_ADDR=0x40480000
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]22CONFIG_FIT=y
23CONFIG_FIT_EXTERNAL_OFFSET=0x3000
24CONFIG_SPL_LOAD_FIT=y
Teresa Remmet9acb7012021-07-07 12:58:04 +0000[diff] [blame]25# CONFIG_USE_SPL_FIT_GENERATOR is not set
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]26CONFIG_OF_SYSTEM_SETUP=y
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]27CONFIG_USE_BOOTCOMMAND=y
28CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;"
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]29CONFIG_DEFAULT_FDT_FILE="oftree"
30CONFIG_BOARD_LATE_INIT=y
Teresa Remmetfe1f1072021-07-07 12:58:01 +0000[diff] [blame]31CONFIG_SPL_BOARD_INIT=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]32CONFIG_SPL_BOOTROM_SUPPORT=y
33CONFIG_SPL_SYS_MALLOC_SIMPLE=y
34CONFIG_SPL_SEPARATE_BSS=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame^]35CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
36CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]37CONFIG_SPL_I2C=y
Simon Glasse91ac4c2021-07-10 21:14:24 -0600[diff] [blame]38CONFIG_SPL_POWER=y
Simon Glass1ba1d4e2021-07-10 21:14:28 -0600[diff] [blame]39CONFIG_SPL_WATCHDOG=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]40CONFIG_HUSH_PARSER=y
41CONFIG_SYS_PROMPT="u-boot=> "
42# CONFIG_CMD_EXPORTENV is not set
43# CONFIG_CMD_IMPORTENV is not set
44# CONFIG_CMD_CRC32 is not set
45CONFIG_CMD_EEPROM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]46CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
47CONFIG_SYS_EEPROM_SIZE=4096
48CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
49CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]50CONFIG_CMD_CLK=y
51CONFIG_CMD_FUSE=y
52CONFIG_CMD_GPIO=y
53CONFIG_CMD_I2C=y
54CONFIG_CMD_MMC=y
55CONFIG_CMD_DHCP=y
56CONFIG_CMD_MII=y
57CONFIG_CMD_PING=y
58CONFIG_CMD_CACHE=y
59CONFIG_CMD_REGULATOR=y
60CONFIG_CMD_EXT2=y
61CONFIG_CMD_EXT4=y
62CONFIG_CMD_EXT4_WRITE=y
63CONFIG_CMD_FAT=y
64CONFIG_OF_CONTROL=y
65CONFIG_SPL_OF_CONTROL=y
66CONFIG_ENV_OVERWRITE=y
67CONFIG_ENV_IS_IN_MMC=y
68CONFIG_SYS_RELOC_GD_ENV_ADDR=y
69CONFIG_SYS_MMC_ENV_DEV=2
70CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
Teresa Remmet7de60a62021-07-07 12:58:00 +0000[diff] [blame]71CONFIG_NET_RANDOM_ETHADDR=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]72CONFIG_SPL_DM=y
73CONFIG_CLK_COMPOSITE_CCF=y
74CONFIG_CLK_IMX8MP=y
75CONFIG_MXC_GPIO=y
76CONFIG_DM_I2C=y
Igor Opaniuk5f4de782021-02-09 13:52:44 +0200[diff] [blame]77# CONFIG_SPL_DM_I2C is not set
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]78CONFIG_SPL_SYS_I2C_LEGACY=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]79CONFIG_MISC=y
80CONFIG_I2C_EEPROM=y
81CONFIG_SYS_I2C_EEPROM_ADDR=0x51
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]82CONFIG_SUPPORT_EMMC_BOOT=y
83CONFIG_MMC_IO_VOLTAGE=y
84CONFIG_MMC_UHS_SUPPORT=y
85CONFIG_MMC_HS400_ES_SUPPORT=y
86CONFIG_MMC_HS400_SUPPORT=y
Tom Rinid479a9f2021-11-07 22:59:37 -0500[diff] [blame]87CONFIG_FSL_USDHC=y
Teresa Remmet7de60a62021-07-07 12:58:00 +0000[diff] [blame]88CONFIG_PHYLIB=y
89CONFIG_PHY_TI_DP83867=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]90CONFIG_DM_ETH=y
Teresa Remmet7de60a62021-07-07 12:58:00 +0000[diff] [blame]91CONFIG_DM_ETH_PHY=y
92CONFIG_FEC_MXC=y
93CONFIG_RGMII=y
94CONFIG_MII=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]95CONFIG_PINCTRL=y
96CONFIG_SPL_PINCTRL=y
97CONFIG_PINCTRL_IMX8M=y
Simon Glass31339412021-08-08 12:20:27 -0600[diff] [blame]98CONFIG_SPL_POWER_LEGACY=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]99CONFIG_DM_REGULATOR=y
100CONFIG_DM_REGULATOR_FIXED=y
101CONFIG_DM_REGULATOR_GPIO=y
Simon Glass31339412021-08-08 12:20:27 -0600[diff] [blame]102CONFIG_SPL_POWER_I2C=y
Teresa Remmet30fb74d2021-01-13 16:28:09 +0100[diff] [blame]103CONFIG_MXC_UART=y
104CONFIG_SYSRESET=y
105CONFIG_SPL_SYSRESET=y
106CONFIG_SYSRESET_PSCI=y
107CONFIG_SYSRESET_WATCHDOG=y
108CONFIG_DM_THERMAL=y
109CONFIG_IMX_WATCHDOG=y