blob: 7b7fd5a6f1a03692f19dc9f21c191a1aa637b013 [file] [log] [blame]
Simon Glass2cffe662015-08-30 16:55:38 -06001/*
2 * (C) Copyright 2015 Google, Inc
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <debug_uart.h>
9#include <dm.h>
10#include <fdtdec.h>
Wadim Egorov6ee2d012017-06-19 12:36:40 +020011#include <i2c.h>
Simon Glass2cffe662015-08-30 16:55:38 -060012#include <led.h>
13#include <malloc.h>
14#include <ram.h>
15#include <spl.h>
16#include <asm/gpio.h>
17#include <asm/io.h>
Heiko Stübner5c43acb2017-02-18 19:46:26 +010018#include <asm/arch/bootrom.h>
Simon Glass2cffe662015-08-30 16:55:38 -060019#include <asm/arch/clock.h>
20#include <asm/arch/hardware.h>
21#include <asm/arch/periph.h>
Jagan Teki536e4d32017-09-27 23:03:14 +053022#include <asm/arch/pmu_rk3288.h>
Simon Glass2cffe662015-08-30 16:55:38 -060023#include <asm/arch/sdram.h>
Jagan Teki536e4d32017-09-27 23:03:14 +053024#include <asm/arch/sdram_common.h>
Jagan Tekib0f52952017-09-27 23:03:11 +053025#include <asm/arch/sys_proto.h>
huang lin8db3e242015-11-17 14:20:09 +080026#include <asm/arch/timer.h>
Simon Glass2cffe662015-08-30 16:55:38 -060027#include <dm/pinctrl.h>
28#include <dm/root.h>
29#include <dm/test.h>
30#include <dm/util.h>
31#include <power/regulator.h>
Wadim Egorov6ee2d012017-06-19 12:36:40 +020032#include <power/rk8xx_pmic.h>
Simon Glass2cffe662015-08-30 16:55:38 -060033
34DECLARE_GLOBAL_DATA_PTR;
35
36u32 spl_boot_device(void)
37{
Simon Glass26158ef2016-07-04 11:58:32 -060038#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Simon Glass2cffe662015-08-30 16:55:38 -060039 const void *blob = gd->fdt_blob;
40 struct udevice *dev;
41 const char *bootdev;
42 int node;
43 int ret;
44
45 bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
46 debug("Boot device %s\n", bootdev);
47 if (!bootdev)
48 goto fallback;
49
50 node = fdt_path_offset(blob, bootdev);
51 if (node < 0) {
52 debug("node=%d\n", node);
53 goto fallback;
54 }
55 ret = device_get_global_by_of_offset(node, &dev);
56 if (ret) {
57 debug("device at node %s/%d not found: %d\n", bootdev, node,
58 ret);
59 goto fallback;
60 }
61 debug("Found device %s\n", dev->name);
62 switch (device_get_uclass_id(dev)) {
63 case UCLASS_SPI_FLASH:
64 return BOOT_DEVICE_SPI;
65 case UCLASS_MMC:
66 return BOOT_DEVICE_MMC1;
67 default:
68 debug("Booting from device uclass '%s' not supported\n",
69 dev_get_uclass_name(dev));
70 }
71
72fallback:
Simon Glassbf8d7bf2016-11-13 14:22:16 -070073#elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
Simon Glasse51b2e72016-11-13 14:24:54 -070074 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
75 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
Simon Glass6f9087c2016-11-13 14:21:57 -070076 return BOOT_DEVICE_SPI;
Simon Glass26158ef2016-07-04 11:58:32 -060077#endif
Simon Glass2cffe662015-08-30 16:55:38 -060078 return BOOT_DEVICE_MMC1;
79}
80
Marek Vasut64d64bb2016-05-14 23:42:07 +020081u32 spl_boot_mode(const u32 boot_device)
Simon Glass2cffe662015-08-30 16:55:38 -060082{
83 return MMCSD_MODE_RAW;
84}
85
Simon Glass4ba12932016-01-21 19:45:13 -070086#ifdef CONFIG_SPL_MMC_SUPPORT
Simon Glass2cffe662015-08-30 16:55:38 -060087static int configure_emmc(struct udevice *pinctrl)
88{
jk.kernel@gmail.comb1aeb092016-07-26 18:28:29 +080089#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY)
jk.kernel@gmail.com2b87b932016-07-26 18:28:23 +080090
Simon Glass2cffe662015-08-30 16:55:38 -060091 struct gpio_desc desc;
92 int ret;
93
94 pinctrl_request_noflags(pinctrl, PERIPH_ID_EMMC);
95
96 /*
97 * TODO(sjg@chromium.org): Pick this up from device tree or perhaps
98 * use the EMMC_PWREN setting.
99 */
100 ret = dm_gpio_lookup_name("D9", &desc);
101 if (ret) {
102 debug("gpio ret=%d\n", ret);
103 return ret;
104 }
105 ret = dm_gpio_request(&desc, "emmc_pwren");
106 if (ret) {
107 debug("gpio_request ret=%d\n", ret);
108 return ret;
109 }
110 ret = dm_gpio_set_dir_flags(&desc, GPIOD_IS_OUT);
111 if (ret) {
112 debug("gpio dir ret=%d\n", ret);
113 return ret;
114 }
115 ret = dm_gpio_set_value(&desc, 1);
116 if (ret) {
117 debug("gpio value ret=%d\n", ret);
118 return ret;
119 }
jk.kernel@gmail.com2b87b932016-07-26 18:28:23 +0800120#endif
Simon Glass2cffe662015-08-30 16:55:38 -0600121 return 0;
122}
Simon Glass4ba12932016-01-21 19:45:13 -0700123#endif
Heiko Stübner5c43acb2017-02-18 19:46:26 +0100124
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200125#if !defined(CONFIG_SPL_OF_PLATDATA)
126static int phycore_init(void)
127{
128 struct udevice *pmic;
129 int ret;
130
131 ret = uclass_first_device_err(UCLASS_PMIC, &pmic);
132 if (ret)
133 return ret;
134
135#if defined(CONFIG_SPL_POWER_SUPPORT)
136 /* Increase USB input current to 2A */
137 ret = rk818_spl_configure_usb_input_current(pmic, 2000);
138 if (ret)
139 return ret;
140
141 /* Close charger when USB lower then 3.26V */
142 ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000);
143 if (ret)
144 return ret;
145#endif
146
147 return 0;
148}
149#endif
150
Simon Glass2cffe662015-08-30 16:55:38 -0600151void board_init_f(ulong dummy)
152{
153 struct udevice *pinctrl;
154 struct udevice *dev;
155 int ret;
156
157 /* Example code showing how to enable the debug UART on RK3288 */
Simon Glass2cffe662015-08-30 16:55:38 -0600158#include <asm/arch/grf_rk3288.h>
159 /* Enable early UART on the RK3288 */
160#define GRF_BASE 0xff770000
161 struct rk3288_grf * const grf = (void *)GRF_BASE;
162
163 rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
164 GPIO7C6_MASK << GPIO7C6_SHIFT,
165 GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
166 GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
167 /*
168 * Debug UART can be used from here if required:
169 *
170 * debug_uart_init();
171 * printch('a');
172 * printhex8(0x1234);
173 * printascii("string");
174 */
175 debug_uart_init();
Eddie Cai9d62e822017-04-18 19:17:27 +0800176 debug("\nspl:debug uart enabled in %s\n", __func__);
Eddie Cai3e2b61c2017-03-15 08:43:29 -0600177 ret = spl_early_init();
Simon Glass2cffe662015-08-30 16:55:38 -0600178 if (ret) {
Eddie Cai3e2b61c2017-03-15 08:43:29 -0600179 debug("spl_early_init() failed: %d\n", ret);
Simon Glass2cffe662015-08-30 16:55:38 -0600180 hang();
181 }
182
huang lin8db3e242015-11-17 14:20:09 +0800183 rockchip_timer_init();
Simon Glass2cffe662015-08-30 16:55:38 -0600184 configure_l2ctlr();
185
Simon Glassae8fe412016-07-17 15:23:17 -0600186 ret = rockchip_get_clk(&dev);
Simon Glass2cffe662015-08-30 16:55:38 -0600187 if (ret) {
188 debug("CLK init failed: %d\n", ret);
189 return;
190 }
191
192 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
193 if (ret) {
194 debug("Pinctrl init failed: %d\n", ret);
195 return;
196 }
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200197
198#if !defined(CONFIG_SPL_OF_PLATDATA)
199 if (of_machine_is_compatible("phytec,rk3288-phycore-som")) {
200 ret = phycore_init();
201 if (ret) {
202 debug("Failed to set up phycore power settings: %d\n",
203 ret);
204 return;
205 }
206 }
207#endif
208
Jagan Teki387fd4b2017-09-27 23:03:12 +0530209#if !defined(CONFIG_SUPPORT_TPL)
Eddie Cai9d62e822017-04-18 19:17:27 +0800210 debug("\nspl:init dram\n");
Simon Glass2cffe662015-08-30 16:55:38 -0600211 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
212 if (ret) {
213 debug("DRAM init failed: %d\n", ret);
214 return;
215 }
Jagan Teki387fd4b2017-09-27 23:03:12 +0530216#endif
217
Philipp Tomsich798370f2017-06-29 11:21:15 +0200218#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
Xu Ziyuan5401eb82016-07-12 19:09:49 +0800219 back_to_bootrom();
220#endif
Simon Glass2cffe662015-08-30 16:55:38 -0600221}
222
223static int setup_led(void)
224{
225#ifdef CONFIG_SPL_LED
226 struct udevice *dev;
227 char *led_name;
228 int ret;
229
230 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
231 if (!led_name)
232 return 0;
233 ret = led_get_by_label(led_name, &dev);
234 if (ret) {
235 debug("%s: get=%d\n", __func__, ret);
236 return ret;
237 }
238 ret = led_set_on(dev, 1);
239 if (ret)
240 return ret;
241#endif
242
243 return 0;
244}
245
246void spl_board_init(void)
247{
248 struct udevice *pinctrl;
249 int ret;
250
251 ret = setup_led();
252
253 if (ret) {
254 debug("LED ret=%d\n", ret);
255 hang();
256 }
257
258 ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
259 if (ret) {
260 debug("%s: Cannot find pinctrl device\n", __func__);
261 goto err;
262 }
jk.kernel@gmail.com2b87b932016-07-26 18:28:23 +0800263
Simon Glass4ba12932016-01-21 19:45:13 -0700264#ifdef CONFIG_SPL_MMC_SUPPORT
jk.kernel@gmail.com2b87b932016-07-26 18:28:23 +0800265 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
266 if (ret) {
267 debug("%s: Failed to set up SD card\n", __func__);
268 goto err;
269 }
270 ret = configure_emmc(pinctrl);
271 if (ret) {
272 debug("%s: Failed to set up eMMC\n", __func__);
273 goto err;
Simon Glass2cffe662015-08-30 16:55:38 -0600274 }
Simon Glass4ba12932016-01-21 19:45:13 -0700275#endif
Simon Glass2cffe662015-08-30 16:55:38 -0600276
277 /* Enable debug UART */
278 ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
279 if (ret) {
280 debug("%s: Failed to set up console UART\n", __func__);
281 goto err;
282 }
283
284 preloader_console_init();
Philipp Tomsich798370f2017-06-29 11:21:15 +0200285#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
Sandy Pattersona9e92ee2016-08-10 10:21:47 -0400286 back_to_bootrom();
287#endif
Simon Glass2cffe662015-08-30 16:55:38 -0600288 return;
289err:
290 printf("spl_board_init: Error %d\n", ret);
291
292 /* No way to report error here */
293 hang();
294}
Jagan Teki536e4d32017-09-27 23:03:14 +0530295
296#ifdef CONFIG_SPL_OS_BOOT
297
298#define PMU_BASE 0xff730000
299int dram_init_banksize(void)
300{
301 struct rk3288_pmu *const pmu = (void *)PMU_BASE;
302 size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
303
304 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
305 gd->bd->bi_dram[0].size = size;
306
307 return 0;
308}
309#endif