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Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +02001/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
Andreas Bießmannfb378682010-09-03 10:28:05 +02004 * Modified to support C structur SoC access by
5 * Andreas Bießmann <biessmann@corscience.de>
6 *
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +02007 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <common.h>
Jean-Christophe PLAGNIOL-VILLARDd5ee38e2009-03-27 23:26:42 +010022#include <watchdog.h>
Marek Vasutff093ed2012-09-13 16:50:30 +020023#include <serial.h>
24#include <linux/compiler.h>
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020025
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020026#include <asm/io.h>
Haavard Skinnemoen0a2743f2006-11-19 18:06:53 +010027#include <asm/arch/clk.h>
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010028#include <asm/arch/hardware.h>
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020029
30#include "atmel_usart.h"
31
32DECLARE_GLOBAL_DATA_PTR;
33
Marek Vasutff093ed2012-09-13 16:50:30 +020034static void atmel_serial_setbrg(void)
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020035{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010036 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020037 unsigned long divisor;
38 unsigned long usart_hz;
39
40 /*
41 * Master Clock
42 * Baud Rate = --------------
43 * 16 * CD
44 */
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010045 usart_hz = get_usart_clk_rate(CONFIG_USART_ID);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020046 divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate;
Andreas Bießmannfb378682010-09-03 10:28:05 +020047 writel(USART3_BF(CD, divisor), &usart->brgr);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020048}
49
Marek Vasutff093ed2012-09-13 16:50:30 +020050static int atmel_serial_init(void)
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020051{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010052 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Andreas Bießmannfb378682010-09-03 10:28:05 +020053
Xu, Hong9db57992011-08-02 01:05:04 +000054 /*
55 * Just in case: drain transmitter register
56 * 1000us is enough for baudrate >= 9600
57 */
58 if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY)))
59 __udelay(1000);
60
Andreas Bießmannfb378682010-09-03 10:28:05 +020061 writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020062
63 serial_setbrg();
64
Andreas Bießmannfb378682010-09-03 10:28:05 +020065 writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
Haavard Skinnemoen0a2743f2006-11-19 18:06:53 +010066 | USART3_BF(USCLKS, USART3_USCLKS_MCK)
67 | USART3_BF(CHRL, USART3_CHRL_8)
68 | USART3_BF(PAR, USART3_PAR_NONE)
Andreas Bießmannfb378682010-09-03 10:28:05 +020069 | USART3_BF(NBSTOP, USART3_NBSTOP_1)),
70 &usart->mr);
Xu, Hong9db57992011-08-02 01:05:04 +000071 writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
72 /* 100us is enough for the new settings to be settled */
73 __udelay(100);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020074
75 return 0;
76}
77
Marek Vasutff093ed2012-09-13 16:50:30 +020078static void atmel_serial_putc(char c)
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020079{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010080 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Andreas Bießmannfb378682010-09-03 10:28:05 +020081
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020082 if (c == '\n')
83 serial_putc('\r');
84
Andreas Bießmannfb378682010-09-03 10:28:05 +020085 while (!(readl(&usart->csr) & USART3_BIT(TXRDY)));
86 writel(c, &usart->thr);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020087}
88
Marek Vasutff093ed2012-09-13 16:50:30 +020089static int atmel_serial_getc(void)
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020090{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010091 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Andreas Bießmannfb378682010-09-03 10:28:05 +020092
93 while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
Jean-Christophe PLAGNIOL-VILLARDd5ee38e2009-03-27 23:26:42 +010094 WATCHDOG_RESET();
Andreas Bießmannfb378682010-09-03 10:28:05 +020095 return readl(&usart->rhr);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020096}
97
Marek Vasutff093ed2012-09-13 16:50:30 +020098static int atmel_serial_tstc(void)
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020099{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +0100100 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Andreas Bießmannfb378682010-09-03 10:28:05 +0200101 return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +0200102}
Marek Vasutff093ed2012-09-13 16:50:30 +0200103
Marek Vasutff093ed2012-09-13 16:50:30 +0200104static struct serial_device atmel_serial_drv = {
105 .name = "atmel_serial",
106 .start = atmel_serial_init,
107 .stop = NULL,
108 .setbrg = atmel_serial_setbrg,
109 .putc = atmel_serial_putc,
Marek Vasutd9c64492012-10-06 14:07:02 +0000110 .puts = default_serial_puts,
Marek Vasutff093ed2012-09-13 16:50:30 +0200111 .getc = atmel_serial_getc,
112 .tstc = atmel_serial_tstc,
113};
114
115void atmel_serial_initialize(void)
116{
117 serial_register(&atmel_serial_drv);
118}
119
120__weak struct serial_device *default_serial_console(void)
121{
122 return &atmel_serial_drv;
123}