blob: 301ab0f8f211a95d986732c98cc20fd482223b24 [file] [log] [blame]
Vikas Manocha1b51c932016-02-11 15:47:20 -08001/*
Patrice Chotard789ee0e2017-10-23 09:53:58 +02002 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
3 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha1b51c932016-02-11 15:47:20 -08004 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Vikas Manocha1b51c932016-02-11 15:47:20 -080011#define CONFIG_SYS_FLASH_BASE 0x08000000
12#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
Vikas Manocha50218ae2017-05-28 12:55:10 -070013
14#ifdef CONFIG_SUPPORT_SPL
Vikas Manochaf0e32c02017-05-28 12:55:14 -070015#define CONFIG_SYS_TEXT_BASE 0x08008000
16#define CONFIG_SYS_LOAD_ADDR 0x08008000
Vikas Manocha50218ae2017-05-28 12:55:10 -070017#else
18#define CONFIG_SYS_TEXT_BASE CONFIG_SYS_FLASH_BASE
Vikas Manochaf0e32c02017-05-28 12:55:14 -070019#define CONFIG_SYS_LOAD_ADDR 0xC0400000
20#define CONFIG_LOADADDR 0xC0400000
Vikas Manocha50218ae2017-05-28 12:55:10 -070021#endif
Vikas Manocha1b51c932016-02-11 15:47:20 -080022
Vikas Manocha1b51c932016-02-11 15:47:20 -080023/*
24 * Configuration of the external SDRAM memory
25 */
26#define CONFIG_NR_DRAM_BANKS 1
Vikas Manocha1b51c932016-02-11 15:47:20 -080027
Vikas Manocha49408022016-03-09 15:18:14 -080028#define CONFIG_SYS_MAX_FLASH_SECT 8
29#define CONFIG_SYS_MAX_FLASH_BANKS 1
Vikas Manocha1b51c932016-02-11 15:47:20 -080030
Vikas Manocha1b51c932016-02-11 15:47:20 -080031#define CONFIG_ENV_SIZE (8 << 10)
32
Vikas Manocha49408022016-03-09 15:18:14 -080033#define CONFIG_STM32_FLASH
Vikas Manocha1b51c932016-02-11 15:47:20 -080034
Michael Kurz812962b2017-01-22 16:04:27 +010035#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
36#define CONFIG_DW_ALTDESCRIPTOR
37#define CONFIG_MII
Michael Kurz2c5a22f2017-01-22 16:04:29 +010038#define CONFIG_PHY_SMSC
Michael Kurz812962b2017-01-22 16:04:27 +010039
Toshifumi NISHINAGA65bfb9c2016-07-08 01:02:24 +090040#define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */
Vikas Manocha1b51c932016-02-11 15:47:20 -080041#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
42
43#define CONFIG_CMDLINE_TAG
44#define CONFIG_SETUP_MEMORY_TAGS
45#define CONFIG_INITRD_TAG
46#define CONFIG_REVISION_TAG
47
48#define CONFIG_SYS_CBSIZE 1024
Vikas Manocha1b51c932016-02-11 15:47:20 -080049
Michael Kurz812962b2017-01-22 16:04:27 +010050#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Vikas Manocha1b51c932016-02-11 15:47:20 -080051
Vikas Manocha1b51c932016-02-11 15:47:20 -080052#define CONFIG_BOOTCOMMAND \
53 "run bootcmd_romfs"
54
55#define CONFIG_EXTRA_ENV_SETTINGS \
56 "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
57 "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
58 "bootm 0x08044000 - 0x08042000\0"
59
Vikas Manocha1b51c932016-02-11 15:47:20 -080060
61/*
62 * Command line configuration.
63 */
64#define CONFIG_SYS_LONGHELP
Vikas Manocha1b51c932016-02-11 15:47:20 -080065#define CONFIG_AUTO_COMPLETE
66#define CONFIG_CMDLINE_EDITING
Vikas Manocha1a1e2752017-03-27 13:02:45 -070067#define CONFIG_CMD_CACHE
Vikas Manocha9c7573e2017-04-10 15:03:00 -070068#define CONFIG_BOARD_LATE_INIT
Vikas Manochad7a80fc2017-04-10 15:03:02 -070069#define CONFIG_DISPLAY_BOARDINFO
Vikas Manocha50218ae2017-05-28 12:55:10 -070070
71/* For SPL */
72#ifdef CONFIG_SUPPORT_SPL
73#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
74#define CONFIG_SPL_FRAMEWORK
75#define CONFIG_SPL_BOARD_INIT
76#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE
77#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
78#define CONFIG_SYS_SPL_LEN 0x00008000
Vikas Manochaf0e32c02017-05-28 12:55:14 -070079#define CONFIG_SYS_UBOOT_START 0x080083FD
Vikas Manocha50218ae2017-05-28 12:55:10 -070080#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \
81 CONFIG_SYS_SPL_LEN)
Vikas Manochab785bb42017-05-28 12:55:13 -070082
Vikas Manochab785bb42017-05-28 12:55:13 -070083/* DT blob (fdt) address */
Vikas Manochab785bb42017-05-28 12:55:13 -070084#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
85 0x1C0000)
Vikas Manocha50218ae2017-05-28 12:55:10 -070086#endif
87/* For SPL ends */
88
Vikas Manocha1b51c932016-02-11 15:47:20 -080089#endif /* __CONFIG_H */